KR20070048247A - 플로팅 게이트 메모리 셀을 위한 프로그래밍 및 소거 구조및 제조방법 - Google Patents

플로팅 게이트 메모리 셀을 위한 프로그래밍 및 소거 구조및 제조방법 Download PDF

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Publication number
KR20070048247A
KR20070048247A KR1020077006135A KR20077006135A KR20070048247A KR 20070048247 A KR20070048247 A KR 20070048247A KR 1020077006135 A KR1020077006135 A KR 1020077006135A KR 20077006135 A KR20077006135 A KR 20077006135A KR 20070048247 A KR20070048247 A KR 20070048247A
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KR
South Korea
Prior art keywords
floating gate
layer
forming
gate layer
etch stop
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
KR1020077006135A
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English (en)
Korean (ko)
Inventor
고리샨카 엘. 친달로어
크래이그 티. 스위프트
Original Assignee
프리스케일 세미컨덕터, 인크.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Application filed by 프리스케일 세미컨덕터, 인크. filed Critical 프리스케일 세미컨덕터, 인크.
Publication of KR20070048247A publication Critical patent/KR20070048247A/ko
Withdrawn legal-status Critical Current

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    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/30—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B69/00—Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/68—Floating-gate IGFETs
    • H10D30/6891—Floating-gate IGFETs characterised by the shapes, relative sizes or dispositions of the floating gate electrode
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/031—Manufacture or treatment of data-storage electrodes
    • H10D64/035—Manufacture or treatment of data-storage electrodes comprising conductor-insulator-conductor-insulator-semiconductor structures

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  • Semiconductor Memories (AREA)
  • Non-Volatile Memory (AREA)
KR1020077006135A 2004-09-17 2005-08-15 플로팅 게이트 메모리 셀을 위한 프로그래밍 및 소거 구조및 제조방법 Withdrawn KR20070048247A (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/944,244 US7183161B2 (en) 2004-09-17 2004-09-17 Programming and erasing structure for a floating gate memory cell and method of making
US10/944,244 2004-09-17

Publications (1)

Publication Number Publication Date
KR20070048247A true KR20070048247A (ko) 2007-05-08

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Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020077006135A Withdrawn KR20070048247A (ko) 2004-09-17 2005-08-15 플로팅 게이트 메모리 셀을 위한 프로그래밍 및 소거 구조및 제조방법

Country Status (7)

Country Link
US (2) US7183161B2 (enExample)
EP (1) EP1792336A2 (enExample)
JP (1) JP5103182B2 (enExample)
KR (1) KR20070048247A (enExample)
CN (1) CN101432858B (enExample)
TW (1) TWI412085B (enExample)
WO (1) WO2006036334A2 (enExample)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4377676B2 (ja) * 2003-12-24 2009-12-02 株式会社東芝 半導体装置およびその製造方法
US7615445B2 (en) * 2006-09-21 2009-11-10 Sandisk Corporation Methods of reducing coupling between floating gates in nonvolatile memory
US8076229B2 (en) * 2008-05-30 2011-12-13 Micron Technology, Inc. Methods of forming data cells and connections to data cells
WO2010086067A1 (en) * 2009-01-29 2010-08-05 International Business Machines Corporation Memory transistor with a non-planar floating gate and manufacturing method thereof
US8415217B2 (en) * 2011-03-31 2013-04-09 Freescale Semiconductor, Inc. Patterning a gate stack of a non-volatile memory (NVM) with formation of a capacitor

Family Cites Families (37)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4288256A (en) * 1977-12-23 1981-09-08 International Business Machines Corporation Method of making FET containing stacked gates
JPH0232539A (ja) * 1988-07-22 1990-02-02 Hitachi Ltd 半導体装置の製造方法及びエッチング方法
JP2908163B2 (ja) * 1993-02-25 1999-06-21 株式会社東芝 半導体装置の製造方法
US5413949A (en) * 1994-04-26 1995-05-09 United Microelectronics Corporation Method of making self-aligned MOSFET
JP2590746B2 (ja) * 1994-07-29 1997-03-12 日本電気株式会社 半導体装置の製造方法
KR0161399B1 (ko) * 1995-03-13 1998-12-01 김광호 불휘발성 메모리장치 및 그 제조방법
JPH09148460A (ja) * 1995-11-28 1997-06-06 Sony Corp 不揮発性半導体記憶装置及びその製造方法
KR0179163B1 (ko) * 1995-12-26 1999-03-20 문정환 비휘발성 메모리 셀 및 그 제조방법
KR100192551B1 (ko) * 1996-05-16 1999-06-15 구본준 반도체 메모리 소자 및 그의 제조방법
US6495487B1 (en) * 1996-12-09 2002-12-17 Uop Llc Selective bifunctional multimetallic reforming catalyst
JP3598197B2 (ja) * 1997-03-19 2004-12-08 株式会社ルネサステクノロジ 半導体装置
US6342715B1 (en) * 1997-06-27 2002-01-29 Kabushiki Kaisha Toshiba Nonvolatile semiconductor memory device
US6243289B1 (en) * 1998-04-08 2001-06-05 Micron Technology Inc. Dual floating gate programmable read only memory cell structure and method for its fabrication and operation
KR100318683B1 (ko) * 1998-12-17 2001-12-28 윤종용 산화막/질화막/산화막 유전층의 형성방법
TW490860B (en) * 1998-12-24 2002-06-11 United Microelectronics Corp Manufacturing of flash memory cell
JP2000311956A (ja) * 1999-04-27 2000-11-07 Toshiba Corp 不揮発性半導体記憶装置とその製造方法
US6323514B1 (en) * 1999-07-06 2001-11-27 Micron Technology, Inc. Container structure for floating gate memory device and method for forming same
JP4443008B2 (ja) * 2000-06-30 2010-03-31 富士通株式会社 半導体装置及びその製造方法
JP2002176114A (ja) * 2000-09-26 2002-06-21 Toshiba Corp 半導体装置及びその製造方法
TW463248B (en) * 2000-09-26 2001-11-11 Macronix Int Co Ltd Method for forming gates
JP3984020B2 (ja) * 2000-10-30 2007-09-26 株式会社東芝 不揮発性半導体記憶装置
KR100375231B1 (ko) * 2001-02-19 2003-03-08 삼성전자주식회사 비휘발성 메모리 소자의 제조방법
US6627942B2 (en) 2001-03-29 2003-09-30 Silicon Storage Technology, Inc Self-aligned floating gate poly for a flash E2PROM cell
US6791142B2 (en) * 2001-04-30 2004-09-14 Vanguard International Semiconductor Co. Stacked-gate flash memory and the method of making the same
US6391722B1 (en) * 2001-07-13 2002-05-21 Vanguard International Semiconductor Corporation Method of making nonvolatile memory having high capacitive coupling ratio
US6537880B1 (en) * 2001-09-13 2003-03-25 Vanguard International Semiconductor Corporation Method of fabricating a high density NAND stacked gate flash memory device having narrow pitch isolation and large capacitance between control and floating gates
DE10146215A1 (de) * 2001-09-19 2003-04-10 Infineon Technologies Ag Verfahren zum Herstellen einer Halbleiterspeicherelement-Anordnung, Verfahren zum Betreiben einer Halbleiterspeicherelement-Anordnung und Halbleiterspeicherelement-Anordnung
KR100426485B1 (ko) * 2001-12-22 2004-04-14 주식회사 하이닉스반도체 플래쉬 메모리 셀의 제조 방법
US6780712B2 (en) * 2002-10-30 2004-08-24 Taiwan Semiconductor Manufacturing Company Method for fabricating a flash memory device having finger-like floating gates structure
US6716705B1 (en) * 2002-06-03 2004-04-06 Lattice Semiconductor Corporation EEPROM device having a retrograde program junction region and process for fabricating the device
EP1376676A3 (en) 2002-06-24 2008-08-20 Interuniversitair Microelektronica Centrum Vzw Multibit non-volatile memory device and method
US6908817B2 (en) * 2002-10-09 2005-06-21 Sandisk Corporation Flash memory array with increased coupling between floating and control gates
KR100454135B1 (ko) * 2002-10-10 2004-10-26 삼성전자주식회사 비휘발성 기억소자의 형성방법
KR100482765B1 (ko) * 2002-12-12 2005-04-14 주식회사 하이닉스반도체 플래쉬 메모리 소자의 플로팅 게이트 형성 방법
US6897116B2 (en) * 2003-09-12 2005-05-24 United Microelectronics Corp. Method and structure to improve the gate coupling ratio (GCR) for manufacturing a flash memory device
US6943118B2 (en) * 2003-09-18 2005-09-13 Macronix International Co., Ltd. Method of fabricating flash memory
US7557042B2 (en) * 2004-06-28 2009-07-07 Freescale Semiconductor, Inc. Method for making a semiconductor device with reduced spacing

Also Published As

Publication number Publication date
JP5103182B2 (ja) 2012-12-19
CN101432858A (zh) 2009-05-13
TWI412085B (zh) 2013-10-11
US7745870B2 (en) 2010-06-29
EP1792336A2 (en) 2007-06-06
JP2008513999A (ja) 2008-05-01
WO2006036334A2 (en) 2006-04-06
TW200623275A (en) 2006-07-01
WO2006036334A3 (en) 2009-04-02
CN101432858B (zh) 2012-06-27
US20070117319A1 (en) 2007-05-24
US20060063328A1 (en) 2006-03-23
US7183161B2 (en) 2007-02-27

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PA0105 International application

Patent event date: 20070316

Patent event code: PA01051R01D

Comment text: International Patent Application

PG1501 Laying open of application
PC1203 Withdrawal of no request for examination
WITN Application deemed withdrawn, e.g. because no request for examination was filed or no examination fee was paid