JP5103182B2 - フローティングゲート素子を形成する方法 - Google Patents

フローティングゲート素子を形成する方法 Download PDF

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Publication number
JP5103182B2
JP5103182B2 JP2007532334A JP2007532334A JP5103182B2 JP 5103182 B2 JP5103182 B2 JP 5103182B2 JP 2007532334 A JP2007532334 A JP 2007532334A JP 2007532334 A JP2007532334 A JP 2007532334A JP 5103182 B2 JP5103182 B2 JP 5103182B2
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Japan
Prior art keywords
layer
floating gate
forming
etch stop
gate layer
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Expired - Fee Related
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JP2007532334A
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Japanese (ja)
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JP2008513999A5 (enExample
JP2008513999A (ja
Inventor
エル. チンダロア、ゴーリシャンカー
ティ. スウィフト、クレイグ
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NXP USA Inc
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NXP USA Inc
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    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/10Programming or data input circuits
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B41/00Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/30Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B69/00Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/68Floating-gate IGFETs
    • H10D30/6891Floating-gate IGFETs characterised by the shapes, relative sizes or dispositions of the floating gate electrode
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00Electrodes of devices having potential barriers
    • H10D64/01Manufacture or treatment
    • H10D64/031Manufacture or treatment of data-storage electrodes
    • H10D64/035Manufacture or treatment of data-storage electrodes comprising conductor-insulator-conductor-insulator-semiconductor structures

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  • Semiconductor Memories (AREA)
  • Non-Volatile Memory (AREA)
JP2007532334A 2004-09-17 2005-08-15 フローティングゲート素子を形成する方法 Expired - Fee Related JP5103182B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US10/944,244 US7183161B2 (en) 2004-09-17 2004-09-17 Programming and erasing structure for a floating gate memory cell and method of making
US10/944,244 2004-09-17
PCT/US2005/028828 WO2006036334A2 (en) 2004-09-17 2005-08-15 Programming and erasing structure for a floating gate memory cell and method of making

Publications (3)

Publication Number Publication Date
JP2008513999A JP2008513999A (ja) 2008-05-01
JP2008513999A5 JP2008513999A5 (enExample) 2008-09-18
JP5103182B2 true JP5103182B2 (ja) 2012-12-19

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ID=36074588

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2007532334A Expired - Fee Related JP5103182B2 (ja) 2004-09-17 2005-08-15 フローティングゲート素子を形成する方法

Country Status (7)

Country Link
US (2) US7183161B2 (enExample)
EP (1) EP1792336A2 (enExample)
JP (1) JP5103182B2 (enExample)
KR (1) KR20070048247A (enExample)
CN (1) CN101432858B (enExample)
TW (1) TWI412085B (enExample)
WO (1) WO2006036334A2 (enExample)

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US7615445B2 (en) * 2006-09-21 2009-11-10 Sandisk Corporation Methods of reducing coupling between floating gates in nonvolatile memory
US8076229B2 (en) * 2008-05-30 2011-12-13 Micron Technology, Inc. Methods of forming data cells and connections to data cells
WO2010086067A1 (en) * 2009-01-29 2010-08-05 International Business Machines Corporation Memory transistor with a non-planar floating gate and manufacturing method thereof
US8415217B2 (en) * 2011-03-31 2013-04-09 Freescale Semiconductor, Inc. Patterning a gate stack of a non-volatile memory (NVM) with formation of a capacitor

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US6342715B1 (en) * 1997-06-27 2002-01-29 Kabushiki Kaisha Toshiba Nonvolatile semiconductor memory device
US6243289B1 (en) * 1998-04-08 2001-06-05 Micron Technology Inc. Dual floating gate programmable read only memory cell structure and method for its fabrication and operation
KR100318683B1 (ko) * 1998-12-17 2001-12-28 윤종용 산화막/질화막/산화막 유전층의 형성방법
TW490860B (en) * 1998-12-24 2002-06-11 United Microelectronics Corp Manufacturing of flash memory cell
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JP4443008B2 (ja) * 2000-06-30 2010-03-31 富士通株式会社 半導体装置及びその製造方法
JP2002176114A (ja) * 2000-09-26 2002-06-21 Toshiba Corp 半導体装置及びその製造方法
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JP3984020B2 (ja) * 2000-10-30 2007-09-26 株式会社東芝 不揮発性半導体記憶装置
KR100375231B1 (ko) * 2001-02-19 2003-03-08 삼성전자주식회사 비휘발성 메모리 소자의 제조방법
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US6780712B2 (en) * 2002-10-30 2004-08-24 Taiwan Semiconductor Manufacturing Company Method for fabricating a flash memory device having finger-like floating gates structure
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KR100482765B1 (ko) * 2002-12-12 2005-04-14 주식회사 하이닉스반도체 플래쉬 메모리 소자의 플로팅 게이트 형성 방법
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Also Published As

Publication number Publication date
KR20070048247A (ko) 2007-05-08
CN101432858A (zh) 2009-05-13
TWI412085B (zh) 2013-10-11
US7745870B2 (en) 2010-06-29
EP1792336A2 (en) 2007-06-06
JP2008513999A (ja) 2008-05-01
WO2006036334A2 (en) 2006-04-06
TW200623275A (en) 2006-07-01
WO2006036334A3 (en) 2009-04-02
CN101432858B (zh) 2012-06-27
US20070117319A1 (en) 2007-05-24
US20060063328A1 (en) 2006-03-23
US7183161B2 (en) 2007-02-27

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