KR20030014372A - Mram에서 사용하기 위한 자속 집중 층을 제조하는 방법 - Google Patents
Mram에서 사용하기 위한 자속 집중 층을 제조하는 방법 Download PDFInfo
- Publication number
- KR20030014372A KR20030014372A KR1020027012470A KR20027012470A KR20030014372A KR 20030014372 A KR20030014372 A KR 20030014372A KR 1020027012470 A KR1020027012470 A KR 1020027012470A KR 20027012470 A KR20027012470 A KR 20027012470A KR 20030014372 A KR20030014372 A KR 20030014372A
- Authority
- KR
- South Korea
- Prior art keywords
- layer
- forming
- barrier layer
- copper
- clad
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
- G11C11/14—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using thin-film elements
- G11C11/15—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using thin-film elements using multiple magnetic layers
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B82—NANOTECHNOLOGY
- B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
- B82Y10/00—Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B61/00—Magnetic memory devices, e.g. magnetoresistive RAM [MRAM] devices
Landscapes
- Engineering & Computer Science (AREA)
- Chemical & Material Sciences (AREA)
- Nanotechnology (AREA)
- Physics & Mathematics (AREA)
- Mathematical Physics (AREA)
- Theoretical Computer Science (AREA)
- Crystallography & Structural Chemistry (AREA)
- Computer Hardware Design (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Semiconductor Memories (AREA)
- Mram Or Spin Memory Techniques (AREA)
Abstract
Description
Claims (9)
- 자기 메모리 디바이스들에서 사용하기 위한 자속 집중기(flux concentrator)를 제조하는 방법에 있어서,제 1 장벽 층, 자속 집중 층(flux concentrating layer), 제 2 장벽 층 및 구리(Cu) 도전 선(copper conducting line)을 포함하는 클래드된 디지트 선(cladded digit line)을 형성하는 단계와;상기 클래드된 디지트 선의 최상위 표면상에 유전층을 침착하는 단계와;상기 유전층상에 적어도 하나의 자기 메모리 비트를 제공하는 단계와;구리(Cu) 도전 선, 제 1 외부 장벽 층, 자속 집중 층 및 제 2 외부 장벽 층을 포함하는 클래드된 비트 선을 형성하는 단계를 포함하는, 방법.
- 제 1 항에 있어서, 상기 클래드된 디지트 선을 형성하는 단계는 내열성 금속 재료(refractory metal material)를 갖는 상기 제 1 장벽 층과 코발트(Co) 재료 또는 코발트 철(CoFe) 재료 중 하나를 갖는 상기 제 2 장벽 층을 형성하고 니켈 철(NiFe) 재료로 된 자속 집중 층을 형성하는 단계를 포함하는, 방법.
- 제 2 항에 있어서, 클래드된 비트 선을 형성하는 단계는 내열성 금속 재료를 갖는 제 1 외부 장벽 층과 코발트(Co) 재료 또는 코발트 철(CoFe) 재료 중 하나를 갖는 제 2 외부 장벽 층을 형성하고 니켈 철(NiFe) 재료로 된 자속 집중 층을 형성하는 단계를 포함하는, 방법.
- 제 1 항에 있어서, 상기 클래드된 디지트 선을 형성하는 단계는 단일 다마신 공정(single damascene process)을 이용하여 상기 클래드된 비트 선을 형성하는 단계를 포함하는, 방법.
- 제 1 항에 있어서, 상기 클래드된 디지트 선을 형성하는 단계는 이중 다마신 공정을 이용하여 상기 클래드된 비트 선을 형성하는 단계를 포함하는, 방법.
- 제 1 항에 있어서, 상기 클래드된 비트 선을 형성하는 단계는 단일 다마신 공정을 이용하여 상기 클래드된 디지트 선을 형성하는 단계를 포함하는, 방법.
- 제 1 항에 있어서, 상기 클래드된 비트 선을 형성하는 단계는 이중 다마신 공정을 이용하여 상기 클래드된 디지트 선을 형성하는 단계를 포함하는, 방법.
- 자기 메모리 디바이스들에서 사용하기 위한 자속 집중기(flux concentrator)를 제조하는 방법에 있어서,적어도 하나의 자기 메모리 비트를 제공하는 단계와;상기 적어도 하나의 자기 메모리 비트 아주 가까이에 하부 유전층 및 상부 유전층을 침착하는 단계와;상부 유전층 및 하부 유전층 내에 적어도 하나의 트렌치(trench)를 형성하는 단계와;상기 적어도 하나의 트렌치 내에 제 1 장벽 층을 침착하는 단계와;상기 제 1 장벽 층의 표면상에 자속 집중 층을 포함하는 금속 시스템을 침착하는 단계와;구리(Cu) 다마신 비트 선을 규정하기 위해 상기 금속 시스템을 패터닝하는 단계를 포함하는, 방법.
- 자기 메모리 디바이스들에서 사용하기 위한 자속 집중기(flux concentrator)를 제조하는 방법에 있어서,유전 재료를 제공하는 단계와;유전 재료의 일부내에 제 1 장벽 층, 자속 집중 층, 제 2 장벽 층 및 구리(Cu) 도전 선을 포함하는 클래드된 디지트 선을 형성하는 단계와;상기 클래드된 디지트 선의 최상부 표면상에 유전층을 침착하는 단계와;상기 유전층상에 적어도 하나의 자기 메모리 비트를 제공하는 단계와;제 1 외부 장벽 층, 자속 집중 층, 제 2 외부 장벽 층 및 구리(Cu) 선을 포함하는 클래드된 비트 선을 형성하는 단계를 포함하며,상기 클래드된 비트 선을 형성하는 단계는,자기 메모리 비트의 상부 표면상에 하부 유전층 및 상부 유전층을 침착하는 단계로서, 상기 하부 유전층은 절연 재료로 형성되며 상기 상부 유전층은 절연 재료로 형성되는, 상기 하부 유전층 및 상부 유전층을 침착하는 단계와;다마신 비트 선의 형성을 위해 트렌치를 형성하기 위해 상기 상부 유전층 내에서 상기 하부 유전층 쪽으로 적어도 하나의 트렌치를 에칭하는 단계와;자기 메모리 비트와 물리적인 접촉을 만들기 위해 자기 메모리 비트 쪽으로 하부 유전층 내에서 적어도 하나의 비아를 형성하는 단계와;상기 자기 메모리 비트 쪽으로 적어도 하나의 트렌치 및 적어도 하나의 비아내에 제 1 장벽 층을 침착하는 단계와;상기 제 1 장벽 층의 표면상에 금속 시스템을 침착하는 단계로서, 상기 금속 시스템을 침착하는 단계는 적어도 하나의 트렌치 및 비아 내에 구리(Cu) 시드(seed) 재료를 침착하는 단계와, 상기 구리(Cu) 시드 재료의 표면상에 도금된 구리(Cu) 재료를 침착하는 단계와, 상기 도금된 구리(Cu)를 버퍼링하고 연마하는 단계와, 구리 시스템의 상부 유전체를 제거하는 단계와, 상기 도금된 구리(Cu)의 표면상에 상기 제 1 외부 장벽 층, 상기 자속 집중 층 및 상기 제 2 외부 장벽 층을 침착하는 단계를 포함하는, 상기 금속 시스템을 침착하는 단계와;구리(Cu) 다마신 비트 선을 규정하기 위해 상기 금속 시스템을 패터닝하는 단계를 포함하는, 방법.
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US09/528,971 US6211090B1 (en) | 2000-03-21 | 2000-03-21 | Method of fabricating flux concentrating layer for use with magnetoresistive random access memories |
US09/528,971 | 2000-03-21 | ||
PCT/US2001/008981 WO2001071777A2 (en) | 2000-03-21 | 2001-03-21 | Method of fabricating flux concentrating layer for use with magnetoresistive random access memories |
Publications (2)
Publication Number | Publication Date |
---|---|
KR20030014372A true KR20030014372A (ko) | 2003-02-17 |
KR100801455B1 KR100801455B1 (ko) | 2008-02-11 |
Family
ID=24107980
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1020027012470A KR100801455B1 (ko) | 2000-03-21 | 2001-03-21 | Mram에서 사용하기 위한 자속 집중층을 제조하는 방법 |
Country Status (7)
Country | Link |
---|---|
US (1) | US6211090B1 (ko) |
EP (1) | EP1284010A2 (ko) |
JP (1) | JP2003528458A (ko) |
KR (1) | KR100801455B1 (ko) |
AU (1) | AU2001247628A1 (ko) |
TW (1) | TW492156B (ko) |
WO (1) | WO2001071777A2 (ko) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100741303B1 (ko) * | 2004-06-21 | 2007-07-23 | 헤드웨이 테크놀로지스 인코포레이티드 | 결합된 인접 연자성 층을 갖는 자기 랜덤 액세스 메모리어레이 |
Families Citing this family (137)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6420262B1 (en) * | 2000-01-18 | 2002-07-16 | Micron Technology, Inc. | Structures and methods to enhance copper metallization |
CN1319083C (zh) * | 2000-06-21 | 2007-05-30 | 皇家菲利浦电子有限公司 | 具有改进的磁场范围的磁多层结构 |
US6392922B1 (en) * | 2000-08-14 | 2002-05-21 | Micron Technology, Inc. | Passivated magneto-resistive bit structure and passivation method therefor |
US6515352B1 (en) * | 2000-09-25 | 2003-02-04 | Micron Technology, Inc. | Shielding arrangement to protect a circuit from stray magnetic fields |
US6555858B1 (en) * | 2000-11-15 | 2003-04-29 | Motorola, Inc. | Self-aligned magnetic clad write line and its method of formation |
US6511609B2 (en) * | 2001-02-20 | 2003-01-28 | Industrial Technology Research Institute | Cu seed layer deposition for ULSI metalization |
US6413788B1 (en) * | 2001-02-28 | 2002-07-02 | Micron Technology, Inc. | Keepers for MRAM electrodes |
US6475812B2 (en) * | 2001-03-09 | 2002-11-05 | Hewlett Packard Company | Method for fabricating cladding layer in top conductor |
JP5013494B2 (ja) * | 2001-04-06 | 2012-08-29 | ルネサスエレクトロニクス株式会社 | 磁性メモリの製造方法 |
JP2002367998A (ja) * | 2001-06-11 | 2002-12-20 | Ebara Corp | 半導体装置及びその製造方法 |
US6510080B1 (en) | 2001-08-28 | 2003-01-21 | Micron Technology Inc. | Three terminal magnetic random access memory |
US6545906B1 (en) * | 2001-10-16 | 2003-04-08 | Motorola, Inc. | Method of writing to scalable magnetoresistance random access memory element |
US6720597B2 (en) * | 2001-11-13 | 2004-04-13 | Motorola, Inc. | Cladding of a conductive interconnect for programming a MRAM device using multiple magnetic layers |
KR100452618B1 (ko) * | 2001-11-20 | 2004-10-15 | 한국과학기술연구원 | 자기 메모리 및 센서에 응용 가능한 워드선 제조방법 |
TW569442B (en) * | 2001-12-18 | 2004-01-01 | Toshiba Corp | Magnetic memory device having magnetic shield layer, and manufacturing method thereof |
US6743641B2 (en) | 2001-12-20 | 2004-06-01 | Micron Technology, Inc. | Method of improving surface planarity prior to MRAM bit material deposition |
US6525957B1 (en) * | 2001-12-21 | 2003-02-25 | Motorola, Inc. | Magnetic memory cell having magnetic flux wrapping around a bit line and method of manufacturing thereof |
JP2003197875A (ja) * | 2001-12-28 | 2003-07-11 | Toshiba Corp | 磁気記憶装置 |
US7167372B2 (en) * | 2003-08-26 | 2007-01-23 | Belkin Corporation | Universal serial bus hub and method of manufacturing same |
US6906305B2 (en) * | 2002-01-08 | 2005-06-14 | Brion Technologies, Inc. | System and method for aerial image sensing |
US6906396B2 (en) * | 2002-01-15 | 2005-06-14 | Micron Technology, Inc. | Magnetic shield for integrated circuit packaging |
TWI266443B (en) * | 2002-01-16 | 2006-11-11 | Toshiba Corp | Magnetic memory |
JP4053825B2 (ja) * | 2002-01-22 | 2008-02-27 | 株式会社東芝 | 半導体集積回路装置 |
US6548849B1 (en) * | 2002-01-31 | 2003-04-15 | Sharp Laboratories Of America, Inc. | Magnetic yoke structures in MRAM devices to reduce programming power consumption and a method to make the same |
US6927072B2 (en) * | 2002-03-08 | 2005-08-09 | Freescale Semiconductor, Inc. | Method of applying cladding material on conductive lines of MRAM devices |
US6812040B2 (en) * | 2002-03-12 | 2004-11-02 | Freescale Semiconductor, Inc. | Method of fabricating a self-aligned via contact for a magnetic memory element |
JP3596536B2 (ja) * | 2002-03-26 | 2004-12-02 | ソニー株式会社 | 磁気メモリ装置およびその製造方法 |
JP3993522B2 (ja) * | 2002-03-29 | 2007-10-17 | 株式会社東芝 | 磁気記憶装置の製造方法 |
US6903396B2 (en) * | 2002-04-12 | 2005-06-07 | Micron Technology, Inc. | Control of MTJ tunnel area |
US6815248B2 (en) * | 2002-04-18 | 2004-11-09 | Infineon Technologies Ag | Material combinations for tunnel junction cap layer, tunnel junction hard mask and tunnel junction stack seed layer in MRAM processing |
US6783995B2 (en) * | 2002-04-30 | 2004-08-31 | Micron Technology, Inc. | Protective layers for MRAM devices |
US6724652B2 (en) * | 2002-05-02 | 2004-04-20 | Micron Technology, Inc. | Low remanence flux concentrator for MRAM devices |
WO2003098632A2 (en) * | 2002-05-16 | 2003-11-27 | Nova Research, Inc. | Methods of fabricating magnetoresistive memory devices |
US6778433B1 (en) | 2002-06-06 | 2004-08-17 | Taiwan Semiconductor Manufacturing Company | High programming efficiency MRAM cell structure |
US6780653B2 (en) | 2002-06-06 | 2004-08-24 | Micron Technology, Inc. | Methods of forming magnetoresistive memory device assemblies |
JP2004040006A (ja) * | 2002-07-08 | 2004-02-05 | Sony Corp | 磁気メモリ装置およびその製造方法 |
US6806523B2 (en) * | 2002-07-15 | 2004-10-19 | Micron Technology, Inc. | Magnetoresistive memory devices |
US7095646B2 (en) * | 2002-07-17 | 2006-08-22 | Freescale Semiconductor, Inc. | Multi-state magnetoresistance random access cell with improved memory storage density |
US6770491B2 (en) * | 2002-08-07 | 2004-08-03 | Micron Technology, Inc. | Magnetoresistive memory and method of manufacturing the same |
US6914805B2 (en) * | 2002-08-21 | 2005-07-05 | Micron Technology, Inc. | Method for building a magnetic keeper or flux concentrator used for writing magnetic bits on a MRAM device |
US6831312B2 (en) * | 2002-08-30 | 2004-12-14 | Freescale Semiconductor, Inc. | Amorphous alloys for magnetic devices |
US6740948B2 (en) * | 2002-08-30 | 2004-05-25 | Hewlett-Packard Development Company, L.P. | Magnetic shielding for reducing magnetic interference |
JP3866641B2 (ja) * | 2002-09-24 | 2007-01-10 | 株式会社東芝 | 磁気記憶装置およびその製造方法 |
KR100515053B1 (ko) * | 2002-10-02 | 2005-09-14 | 삼성전자주식회사 | 비트라인 클램핑 전압 레벨에 대해 안정적인 독출 동작이가능한 마그네틱 메모리 장치 |
JP3906139B2 (ja) * | 2002-10-16 | 2007-04-18 | 株式会社東芝 | 磁気ランダムアクセスメモリ |
US7183120B2 (en) * | 2002-10-31 | 2007-02-27 | Honeywell International Inc. | Etch-stop material for improved manufacture of magnetic devices |
JP3935049B2 (ja) * | 2002-11-05 | 2007-06-20 | 株式会社東芝 | 磁気記憶装置及びその製造方法 |
US6660568B1 (en) | 2002-11-07 | 2003-12-09 | International Business Machines Corporation | BiLevel metallization for embedded back end of the line structures |
US6740947B1 (en) * | 2002-11-13 | 2004-05-25 | Hewlett-Packard Development Company, L.P. | MRAM with asymmetric cladded conductor |
CN102312214B (zh) * | 2002-11-15 | 2013-10-23 | 哈佛学院院长等 | 使用脒基金属的原子层沉积 |
US6885074B2 (en) * | 2002-11-27 | 2005-04-26 | Freescale Semiconductor, Inc. | Cladded conductor for use in a magnetoelectronics device and method for fabricating the same |
US6870759B2 (en) * | 2002-12-09 | 2005-03-22 | Applied Spintronics Technology, Inc. | MRAM array with segmented magnetic write lines |
US6909633B2 (en) * | 2002-12-09 | 2005-06-21 | Applied Spintronics Technology, Inc. | MRAM architecture with a flux closed data storage layer |
US6909630B2 (en) * | 2002-12-09 | 2005-06-21 | Applied Spintronics Technology, Inc. | MRAM memories utilizing magnetic write lines |
US6943038B2 (en) * | 2002-12-19 | 2005-09-13 | Freescale Semiconductor, Inc. | Method for fabricating a flux concentrating system for use in a magnetoelectronics device |
US6812538B2 (en) * | 2003-02-05 | 2004-11-02 | Applied Spintronics Technology, Inc. | MRAM cells having magnetic write lines with a stable magnetic state at the end regions |
US6864551B2 (en) * | 2003-02-05 | 2005-03-08 | Applied Spintronics Technology, Inc. | High density and high programming efficiency MRAM design |
US7002228B2 (en) * | 2003-02-18 | 2006-02-21 | Micron Technology, Inc. | Diffusion barrier for improving the thermal stability of MRAM devices |
US6940749B2 (en) * | 2003-02-24 | 2005-09-06 | Applied Spintronics Technology, Inc. | MRAM array with segmented word and bit lines |
US6759297B1 (en) | 2003-02-28 | 2004-07-06 | Union Semiconductor Technology Corporatin | Low temperature deposition of dielectric materials in magnetoresistive random access memory devices |
US20040175845A1 (en) * | 2003-03-03 | 2004-09-09 | Molla Jaynal A. | Method of forming a flux concentrating layer of a magnetic device |
JP2004273969A (ja) * | 2003-03-12 | 2004-09-30 | Sony Corp | 磁気記憶装置の製造方法 |
US6963500B2 (en) * | 2003-03-14 | 2005-11-08 | Applied Spintronics Technology, Inc. | Magnetic tunneling junction cell array with shared reference layer for MRAM applications |
US6933550B2 (en) * | 2003-03-31 | 2005-08-23 | Applied Spintronics Technology, Inc. | Method and system for providing a magnetic memory having a wrapped write line |
US7067866B2 (en) * | 2003-03-31 | 2006-06-27 | Applied Spintronics Technology, Inc. | MRAM architecture and a method and system for fabricating MRAM memories utilizing the architecture |
US6921953B2 (en) * | 2003-04-09 | 2005-07-26 | Micron Technology, Inc. | Self-aligned, low-resistance, efficient MRAM read/write conductors |
US6982445B2 (en) * | 2003-05-05 | 2006-01-03 | Applied Spintronics Technology, Inc. | MRAM architecture with a bit line located underneath the magnetic tunneling junction device |
KR100552682B1 (ko) * | 2003-06-02 | 2006-02-20 | 삼성전자주식회사 | 고밀도 자기저항 메모리 및 그 제조방법 |
JP2005005605A (ja) * | 2003-06-13 | 2005-01-06 | Fujitsu Ltd | 半導体装置 |
WO2004114409A1 (ja) * | 2003-06-20 | 2004-12-29 | Nec Corporation | 磁気ランダムアクセスメモリ |
US6956763B2 (en) * | 2003-06-27 | 2005-10-18 | Freescale Semiconductor, Inc. | MRAM element and methods for writing the MRAM element |
US7220665B2 (en) * | 2003-08-05 | 2007-05-22 | Micron Technology, Inc. | H2 plasma treatment |
KR100555514B1 (ko) * | 2003-08-22 | 2006-03-03 | 삼성전자주식회사 | 저 저항 텅스텐 배선을 갖는 반도체 메모리 소자 및 그제조방법 |
US6967366B2 (en) * | 2003-08-25 | 2005-11-22 | Freescale Semiconductor, Inc. | Magnetoresistive random access memory with reduced switching field variation |
US7329152B2 (en) * | 2003-08-26 | 2008-02-12 | Belkin International, Inc. | Universal serial bus hub and method of manufacturing same |
US8014170B2 (en) | 2003-08-26 | 2011-09-06 | Belkin International, Inc. | Cable management device and method of cable management |
US7078239B2 (en) * | 2003-09-05 | 2006-07-18 | Micron Technology, Inc. | Integrated circuit structure formed by damascene process |
US6990012B2 (en) * | 2003-10-07 | 2006-01-24 | Hewlett-Packard Development Company, L.P. | Magnetic memory device |
US20050095855A1 (en) * | 2003-11-05 | 2005-05-05 | D'urso John J. | Compositions and methods for the electroless deposition of NiFe on a work piece |
US7053429B2 (en) * | 2003-11-06 | 2006-05-30 | Honeywell International Inc. | Bias-adjusted giant magnetoresistive (GMR) devices for magnetic random access memory (MRAM) applications |
US7114240B2 (en) * | 2003-11-12 | 2006-10-03 | Honeywell International, Inc. | Method for fabricating giant magnetoresistive (GMR) devices |
US9029189B2 (en) | 2003-11-14 | 2015-05-12 | President And Fellows Of Harvard College | Bicyclic guanidines, metal complexes thereof and their use in vapor deposition |
US7072209B2 (en) * | 2003-12-29 | 2006-07-04 | Micron Technology, Inc. | Magnetic memory having synthetic antiferromagnetic pinned layer |
US7211874B2 (en) * | 2004-04-06 | 2007-05-01 | Headway Technologies, Inc. | Magnetic random access memory array with free layer locking mechanism |
US7105879B2 (en) * | 2004-04-20 | 2006-09-12 | Taiwan Semiconductor Manufacturing Co., Ltd. | Write line design in MRAM |
US7112861B2 (en) * | 2004-05-14 | 2006-09-26 | International Business Machines Corporation | Magnetic tunnel junction cap structure and method for forming the same |
JP3863536B2 (ja) * | 2004-05-17 | 2006-12-27 | 株式会社東芝 | 磁気ランダムアクセスメモリ及びその磁気ランダムアクセスメモリのデータ書き込み方法 |
US7067330B2 (en) | 2004-07-16 | 2006-06-27 | Headway Technologies, Inc. | Magnetic random access memory array with thin conduction electrical read and write lines |
US7132707B2 (en) * | 2004-08-03 | 2006-11-07 | Headway Technologies, Inc. | Magnetic random access memory array with proximate read and write lines cladded with magnetic material |
US7576956B2 (en) * | 2004-07-26 | 2009-08-18 | Grandis Inc. | Magnetic tunnel junction having diffusion stop layer |
US7344896B2 (en) * | 2004-07-26 | 2008-03-18 | Infineon Technologies Ag | Ferromagnetic liner for conductive lines of magnetic memory cells and methods of manufacturing thereof |
US7072208B2 (en) * | 2004-07-28 | 2006-07-04 | Headway Technologies, Inc. | Vortex magnetic random access memory |
US20060022286A1 (en) * | 2004-07-30 | 2006-02-02 | Rainer Leuschner | Ferromagnetic liner for conductive lines of magnetic memory cells |
US7075807B2 (en) * | 2004-08-18 | 2006-07-11 | Infineon Technologies Ag | Magnetic memory with static magnetic offset field |
CN1328781C (zh) * | 2004-09-08 | 2007-07-25 | 中芯国际集成电路制造(上海)有限公司 | 半导体装置的制造方法 |
US7129098B2 (en) * | 2004-11-24 | 2006-10-31 | Freescale Semiconductor, Inc. | Reduced power magnetoresistive random access memory elements |
TWI297928B (en) * | 2005-01-20 | 2008-06-11 | Macronix Int Co Ltd | Memory cell |
US7083990B1 (en) * | 2005-01-28 | 2006-08-01 | Infineon Technologies Ag | Method of fabricating MRAM cells |
US7444740B1 (en) | 2005-01-31 | 2008-11-04 | Western Digital (Fremont), Llc | Damascene process for fabricating poles in recording heads |
US7087972B1 (en) * | 2005-01-31 | 2006-08-08 | Freescale Semiconductor, Inc. | Magnetoelectronic devices utilizing protective capping layers and methods of fabricating the same |
US7806723B2 (en) * | 2007-01-05 | 2010-10-05 | Belkin International, Inc. | Electrical grommet device |
US20060258195A1 (en) * | 2005-05-11 | 2006-11-16 | Ameriwood Industries, Inc. | Connectivity system, method of assembling same, and desk containing same |
US7381095B2 (en) * | 2005-06-20 | 2008-06-03 | Belkin International, Inc. | Multi-standard connection hub and method of manufacturing same |
KR100744672B1 (ko) * | 2005-06-24 | 2007-08-01 | 주식회사 하이닉스반도체 | 반도체 소자의 콘택홀 형성 방법 |
US7973349B2 (en) * | 2005-09-20 | 2011-07-05 | Grandis Inc. | Magnetic device having multilayered free ferromagnetic layer |
US7859034B2 (en) * | 2005-09-20 | 2010-12-28 | Grandis Inc. | Magnetic devices having oxide antiferromagnetic layer next to free ferromagnetic layer |
US7777261B2 (en) * | 2005-09-20 | 2010-08-17 | Grandis Inc. | Magnetic device having stabilized free ferromagnetic layer |
US7430135B2 (en) * | 2005-12-23 | 2008-09-30 | Grandis Inc. | Current-switched spin-transfer magnetic devices with reduced spin-transfer switching current density |
UA90089C2 (ru) * | 2006-02-08 | 2010-04-12 | Григорий БЕРЕЗИН | Способ производства кокса из неспекающихся марок угля и устройство для его осуществления |
US7432150B2 (en) * | 2006-02-10 | 2008-10-07 | Everspin Technologies, Inc. | Method of manufacturing a magnetoelectronic device |
US20070246787A1 (en) * | 2006-03-29 | 2007-10-25 | Lien-Chang Wang | On-plug magnetic tunnel junction devices based on spin torque transfer switching |
US8141235B1 (en) | 2006-06-09 | 2012-03-27 | Western Digital (Fremont), Llc | Method for manufacturing a perpendicular magnetic recording transducers |
US7532505B1 (en) | 2006-07-17 | 2009-05-12 | Grandis, Inc. | Method and system for using a pulsed field to assist spin transfer induced switching of magnetic memory elements |
US7502249B1 (en) | 2006-07-17 | 2009-03-10 | Grandis, Inc. | Method and system for using a pulsed field to assist spin transfer induced switching of magnetic memory elements |
KR100744419B1 (ko) | 2006-08-03 | 2007-07-30 | 동부일렉트로닉스 주식회사 | 반도체 소자 및 반도체 소자의 제조 방법 |
US7851840B2 (en) * | 2006-09-13 | 2010-12-14 | Grandis Inc. | Devices and circuits based on magnetic tunnel junctions utilizing a multilayer barrier |
US7738287B2 (en) * | 2007-03-27 | 2010-06-15 | Grandis, Inc. | Method and system for providing field biased magnetic memory devices |
US20080296711A1 (en) * | 2007-05-30 | 2008-12-04 | Freescale Semiconductor, Inc. | Magnetoelectronic device having enhanced permeability dielectric and method of manufacture |
US7957179B2 (en) * | 2007-06-27 | 2011-06-07 | Grandis Inc. | Magnetic shielding in magnetic multilayer structures |
US7982275B2 (en) * | 2007-08-22 | 2011-07-19 | Grandis Inc. | Magnetic element having low saturation magnetization |
US8015692B1 (en) | 2007-11-07 | 2011-09-13 | Western Digital (Fremont), Llc | Method for providing a perpendicular magnetic recording (PMR) head |
US7894248B2 (en) * | 2008-09-12 | 2011-02-22 | Grandis Inc. | Programmable and redundant circuitry based on magnetic tunnel junction (MTJ) |
US7833806B2 (en) * | 2009-01-30 | 2010-11-16 | Everspin Technologies, Inc. | Structure and method for fabricating cladded conductive lines in magnetic memories |
US9099118B1 (en) * | 2009-05-26 | 2015-08-04 | Western Digital (Fremont), Llc | Dual damascene process for producing a PMR write pole |
US8486285B2 (en) | 2009-08-20 | 2013-07-16 | Western Digital (Fremont), Llc | Damascene write poles produced via full film plating |
JP5527649B2 (ja) * | 2009-08-28 | 2014-06-18 | ルネサスエレクトロニクス株式会社 | 半導体装置およびその製造方法 |
US8169816B2 (en) * | 2009-09-15 | 2012-05-01 | Magic Technologies, Inc. | Fabrication methods of partial cladded write line to enhance write margin for magnetic random access memory |
US8390283B2 (en) * | 2009-09-25 | 2013-03-05 | Everspin Technologies, Inc. | Three axis magnetic field sensor |
US8518734B2 (en) | 2010-03-31 | 2013-08-27 | Everspin Technologies, Inc. | Process integration of a single chip three axis magnetic field sensor |
US8411497B2 (en) | 2010-05-05 | 2013-04-02 | Grandis, Inc. | Method and system for providing a magnetic field aligned spin transfer torque random access memory |
US9070456B2 (en) | 2011-04-07 | 2015-06-30 | Tom A. Agan | High density magnetic random access memory |
US8976577B2 (en) | 2011-04-07 | 2015-03-10 | Tom A. Agan | High density magnetic random access memory |
US9297959B2 (en) * | 2011-09-29 | 2016-03-29 | Seagate Technology Llc | Optical articles and methods of making same |
ITTO20121080A1 (it) * | 2012-12-14 | 2014-06-15 | St Microelectronics Srl | Dispositivo a semiconduttore con elemento magnetico integrato provvisto di una struttura di barriera da contaminazione metallica e metodo di fabbricazione del dispositivo a semiconduttore |
US10043967B2 (en) * | 2014-08-07 | 2018-08-07 | Qualcomm Incorporated | Self-compensation of stray field of perpendicular magnetic elements |
US9614143B2 (en) * | 2015-06-09 | 2017-04-04 | Qualcomm Incorporated | De-integrated trench formation for advanced MRAM integration |
US9917027B2 (en) * | 2015-12-30 | 2018-03-13 | Globalfoundries Singapore Pte. Ltd. | Integrated circuits with aluminum via structures and methods for fabricating the same |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2601022B2 (ja) * | 1990-11-30 | 1997-04-16 | 日本電気株式会社 | 半導体装置の製造方法 |
JP3076244B2 (ja) * | 1996-06-04 | 2000-08-14 | 日本電気株式会社 | 多層配線の研磨方法 |
US5861328A (en) | 1996-10-07 | 1999-01-19 | Motorola, Inc. | Method of fabricating GMR devices |
US5902690A (en) | 1997-02-25 | 1999-05-11 | Motorola, Inc. | Stray magnetic shielding for a non-volatile MRAM |
US5990011A (en) * | 1997-09-18 | 1999-11-23 | Micron Technology, Inc. | Titanium aluminum alloy wetting layer for improved aluminum filling of damescene trenches |
US5956267A (en) * | 1997-12-18 | 1999-09-21 | Honeywell Inc | Self-aligned wordline keeper and method of manufacture therefor |
DE19836567C2 (de) * | 1998-08-12 | 2000-12-07 | Siemens Ag | Speicherzellenanordnung mit Speicherelementen mit magnetoresistivem Effekt und Verfahren zu deren Herstellung |
US5940319A (en) * | 1998-08-31 | 1999-08-17 | Motorola, Inc. | Magnetic random access memory and fabricating method thereof |
US6165803A (en) * | 1999-05-17 | 2000-12-26 | Motorola, Inc. | Magnetic random access memory and fabricating method thereof |
US6872993B1 (en) | 1999-05-25 | 2005-03-29 | Micron Technology, Inc. | Thin film memory device having local and external magnetic shielding |
-
2000
- 2000-03-21 US US09/528,971 patent/US6211090B1/en not_active Expired - Lifetime
-
2001
- 2001-03-20 TW TW090106479A patent/TW492156B/zh not_active IP Right Cessation
- 2001-03-21 WO PCT/US2001/008981 patent/WO2001071777A2/en active Application Filing
- 2001-03-21 JP JP2001569859A patent/JP2003528458A/ja not_active Ceased
- 2001-03-21 AU AU2001247628A patent/AU2001247628A1/en not_active Abandoned
- 2001-03-21 EP EP01920594A patent/EP1284010A2/en not_active Withdrawn
- 2001-03-21 KR KR1020027012470A patent/KR100801455B1/ko active IP Right Grant
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100741303B1 (ko) * | 2004-06-21 | 2007-07-23 | 헤드웨이 테크놀로지스 인코포레이티드 | 결합된 인접 연자성 층을 갖는 자기 랜덤 액세스 메모리어레이 |
Also Published As
Publication number | Publication date |
---|---|
TW492156B (en) | 2002-06-21 |
AU2001247628A1 (en) | 2001-10-03 |
WO2001071777A3 (en) | 2002-11-07 |
US6211090B1 (en) | 2001-04-03 |
JP2003528458A (ja) | 2003-09-24 |
EP1284010A2 (en) | 2003-02-19 |
KR100801455B1 (ko) | 2008-02-11 |
WO2001071777A2 (en) | 2001-09-27 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
KR100801455B1 (ko) | Mram에서 사용하기 위한 자속 집중층을 제조하는 방법 | |
US6784510B1 (en) | Magnetoresistive random access memory device structures | |
US7105363B2 (en) | Cladded conductor for use in a magnetoelectronics device and method for fabricating the same | |
US7402529B2 (en) | Method of applying cladding material on conductive lines of MRAM devices | |
TW519680B (en) | Self-aligned magnetic clad write line and its method of formation | |
KR100544085B1 (ko) | 프로그래밍 소비 전력을 감소시키기 위한 mram 장치의자기 요크 구조체 및 그 제조 방법 | |
CN101118922B (zh) | 以上电极作为保护层的CuxO电阻存储器及其制造方法 | |
US7279341B2 (en) | Method for fabricating a flux concentrating system for use in a magnetoelectronics device | |
KR20070084565A (ko) | 자기저항 랜덤 액세스 메모리 디바이스 구조 및 그 제조방법 | |
US7381574B2 (en) | Method of forming dual interconnects in manufacturing MRAM cells | |
US7787287B2 (en) | Magnetic storage device with curved interconnects | |
US20050095855A1 (en) | Compositions and methods for the electroless deposition of NiFe on a work piece | |
US20050270830A1 (en) | Integrated circuit structure formed by damascene process | |
US7442647B1 (en) | Structure and method for formation of cladded interconnects for MRAMs |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
N231 | Notification of change of applicant | ||
A201 | Request for examination | ||
E902 | Notification of reason for refusal | ||
E701 | Decision to grant or registration of patent right | ||
GRNT | Written decision to grant | ||
FPAY | Annual fee payment |
Payment date: 20130110 Year of fee payment: 6 |
|
FPAY | Annual fee payment |
Payment date: 20140121 Year of fee payment: 7 |
|
FPAY | Annual fee payment |
Payment date: 20150121 Year of fee payment: 8 |
|
FPAY | Annual fee payment |
Payment date: 20160113 Year of fee payment: 9 |
|
FPAY | Annual fee payment |
Payment date: 20170123 Year of fee payment: 10 |
|
FPAY | Annual fee payment |
Payment date: 20180111 Year of fee payment: 11 |
|
FPAY | Annual fee payment |
Payment date: 20200114 Year of fee payment: 13 |