KR102904259B1 - 기억 장치 - Google Patents
기억 장치Info
- Publication number
- KR102904259B1 KR102904259B1 KR1020217027126A KR20217027126A KR102904259B1 KR 102904259 B1 KR102904259 B1 KR 102904259B1 KR 1020217027126 A KR1020217027126 A KR 1020217027126A KR 20217027126 A KR20217027126 A KR 20217027126A KR 102904259 B1 KR102904259 B1 KR 102904259B1
- Authority
- KR
- South Korea
- Prior art keywords
- oxide
- insulator
- transistor
- wiring
- layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C5/00—Details of stores covered by group G11C11/00
- G11C5/06—Arrangements for interconnecting storage elements electrically, e.g. by wiring
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/403—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh
- G11C11/405—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh with three charge-transfer gates, e.g. MOS transistors, per cell
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C5/00—Details of stores covered by group G11C11/00
- G11C5/02—Disposition of storage elements, e.g. in the form of a matrix array
- G11C5/025—Geometric lay-out considerations of storage- and peripheral-blocks in a semiconductor storage device
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/67—Thin-film transistors [TFT]
- H10D30/6729—Thin-film transistors [TFT] characterised by the electrodes
- H10D30/673—Thin-film transistors [TFT] characterised by the electrodes characterised by the shapes, relative sizes or dispositions of the gate electrodes
- H10D30/6733—Multi-gate TFTs
- H10D30/6734—Multi-gate TFTs having gate electrodes arranged on both top and bottom sides of the channel, e.g. dual-gate TFTs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/67—Thin-film transistors [TFT]
- H10D30/674—Thin-film transistors [TFT] characterised by the active materials
- H10D30/6741—Group IV materials, e.g. germanium or silicon carbide
- H10D30/6743—Silicon
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/67—Thin-film transistors [TFT]
- H10D30/674—Thin-film transistors [TFT] characterised by the active materials
- H10D30/6755—Oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
- H10D86/421—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs having a particular composition, shape or crystalline structure of the active layer
- H10D86/423—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs having a particular composition, shape or crystalline structure of the active layer comprising semiconductor materials not belonging to the Group IV, e.g. InGaZnO
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
- H10D86/441—Interconnections, e.g. scanning lines
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
- H10D86/481—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs integrated with passive devices, e.g. auxiliary capacitors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
- H10D86/60—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Thin Film Transistor (AREA)
- Semiconductor Memories (AREA)
- Non-Volatile Memory (AREA)
- Dram (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Applications Claiming Priority (9)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JPJP-P-2019-012887 | 2019-01-29 | ||
| JP2019013607 | 2019-01-29 | ||
| JPJP-P-2019-013607 | 2019-01-29 | ||
| JP2019012887 | 2019-01-29 | ||
| JP2019021404 | 2019-02-08 | ||
| JPJP-P-2019-021404 | 2019-02-08 | ||
| JPJP-P-2019-091842 | 2019-05-15 | ||
| JP2019091842 | 2019-05-15 | ||
| PCT/IB2019/059859 WO2020157553A1 (ja) | 2019-01-29 | 2019-11-18 | 記憶装置 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR20210121143A KR20210121143A (ko) | 2021-10-07 |
| KR102904259B1 true KR102904259B1 (ko) | 2025-12-24 |
Family
ID=71841365
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1020217027126A Active KR102904259B1 (ko) | 2019-01-29 | 2019-11-18 | 기억 장치 |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US12069846B2 (https=) |
| JP (2) | JP7361730B2 (https=) |
| KR (1) | KR102904259B1 (https=) |
| CN (1) | CN113330554B (https=) |
| TW (1) | TWI846763B (https=) |
| WO (1) | WO2020157553A1 (https=) |
Families Citing this family (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP7581209B2 (ja) * | 2019-08-08 | 2024-11-12 | 株式会社半導体エネルギー研究所 | 半導体装置 |
| KR20220050134A (ko) | 2019-08-22 | 2022-04-22 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | 메모리 셀 및 기억 장치 |
| KR20240093546A (ko) | 2021-10-27 | 2024-06-24 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | 표시 장치 |
| WO2023144653A1 (ja) * | 2022-01-28 | 2023-08-03 | 株式会社半導体エネルギー研究所 | 記憶装置 |
| US20250131949A1 (en) * | 2022-01-28 | 2025-04-24 | Semiconductor Energy Laboratory Co., Ltd. | Storage Device |
| KR20240152330A (ko) * | 2022-02-10 | 2024-10-21 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | 반도체 장치, 및 반도체 장치의 제작 방법 |
| JPWO2023156883A1 (https=) * | 2022-02-18 | 2023-08-24 | ||
| CN116209245B (zh) * | 2022-04-25 | 2024-06-18 | 北京超弦存储器研究院 | 一种动态存储器及其制作方法、存储装置 |
| JPWO2023223126A1 (https=) * | 2022-05-16 | 2023-11-23 | ||
| US11984165B2 (en) | 2022-05-24 | 2024-05-14 | Taiwan Semiconductor Manufacturing Company, Ltd. | Memory device with reduced area |
| US20250098187A1 (en) * | 2023-09-18 | 2025-03-20 | Taiwan Semiconductor Manufacturing Company, Ltd. | Semiconductor memory cell structure including a hydrogen absorption layer |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20070115710A1 (en) | 2005-11-22 | 2007-05-24 | Nam-Seog Kim | Semiconductor memory device with hierarchical bit line structure |
| US20090086525A1 (en) * | 2007-09-12 | 2009-04-02 | Jaechul Park | Multi-layered memory devices |
| US20140312402A1 (en) | 2011-04-15 | 2014-10-23 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor memory device |
Family Cites Families (58)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8559209B2 (en) * | 2011-06-10 | 2013-10-15 | Unity Semiconductor Corporation | Array voltage regulating technique to enable data operations on large cross-point memory arrays with resistive memory elements |
| US8270193B2 (en) * | 2010-01-29 | 2012-09-18 | Unity Semiconductor Corporation | Local bit lines and methods of selecting the same to access memory elements in cross-point arrays |
| US7606066B2 (en) * | 2005-09-07 | 2009-10-20 | Innovative Silicon Isi Sa | Memory cell and memory cell array having an electrically floating body transistor, and methods of operating same |
| US7606098B2 (en) * | 2006-04-18 | 2009-10-20 | Innovative Silicon Isi Sa | Semiconductor memory array architecture with grouped memory cells, and method of controlling same |
| US7542340B2 (en) * | 2006-07-11 | 2009-06-02 | Innovative Silicon Isi Sa | Integrated circuit including memory array having a segmented bit line architecture and method of controlling and/or operating same |
| JP2009211735A (ja) * | 2008-02-29 | 2009-09-17 | Toshiba Corp | 不揮発性記憶装置 |
| US7852114B2 (en) * | 2008-08-14 | 2010-12-14 | Nantero, Inc. | Nonvolatile nanotube programmable logic devices and a nonvolatile nanotube field programmable gate array using same |
| US8295073B2 (en) * | 2009-01-30 | 2012-10-23 | Unity Semiconductor Corporation | Non-volatile dual port third dimensional memory |
| JP4856202B2 (ja) * | 2009-03-12 | 2012-01-18 | 株式会社東芝 | 半導体記憶装置 |
| US8259520B2 (en) * | 2009-03-13 | 2012-09-04 | Unity Semiconductor Corporation | Columnar replacement of defective memory cells |
| KR101566407B1 (ko) * | 2009-03-25 | 2015-11-05 | 삼성전자주식회사 | 적층 메모리 소자 |
| KR101698193B1 (ko) * | 2009-09-15 | 2017-01-19 | 삼성전자주식회사 | 3차원 반도체 메모리 장치 및 그 제조 방법 |
| WO2012029638A1 (en) | 2010-09-03 | 2012-03-08 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device |
| KR102130257B1 (ko) * | 2010-11-05 | 2020-07-03 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | 반도체 장치 |
| US11121021B2 (en) * | 2010-11-18 | 2021-09-14 | Monolithic 3D Inc. | 3D semiconductor device and structure |
| US8625322B2 (en) * | 2010-12-14 | 2014-01-07 | Sandisk 3D Llc | Non-volatile memory having 3D array of read/write elements with low current structures and methods thereof |
| US9601178B2 (en) | 2011-01-26 | 2017-03-21 | Semiconductor Energy Laboratory Co., Ltd. | Memory device and semiconductor device |
| JP5736224B2 (ja) * | 2011-04-12 | 2015-06-17 | ルネサスエレクトロニクス株式会社 | 半導体記憶装置 |
| US9117495B2 (en) * | 2011-06-10 | 2015-08-25 | Unity Semiconductor Corporation | Global bit line pre-charge circuit that compensates for process, operating voltage, and temperature variations |
| US9276121B2 (en) | 2012-04-12 | 2016-03-01 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and method for manufacturing the same |
| JP6026844B2 (ja) * | 2012-10-17 | 2016-11-16 | 株式会社半導体エネルギー研究所 | 半導体装置 |
| US9389876B2 (en) * | 2013-10-24 | 2016-07-12 | International Business Machines Corporation | Three-dimensional processing system having independent calibration and statistical collection layer |
| US9875789B2 (en) * | 2013-11-22 | 2018-01-23 | Taiwan Semiconductor Manufacturing Company, Ltd. | 3D structure for advanced SRAM design to avoid half-selected issue |
| KR20150093473A (ko) | 2014-02-07 | 2015-08-18 | 에스케이하이닉스 주식회사 | 반도체 메모리 장치 및 그것을 포함하는 메모리 시스템 |
| JP6607681B2 (ja) | 2014-03-07 | 2019-11-20 | 株式会社半導体エネルギー研究所 | 半導体装置 |
| JP2016111677A (ja) * | 2014-09-26 | 2016-06-20 | 株式会社半導体エネルギー研究所 | 半導体装置、無線センサ、及び電子機器 |
| WO2016055903A1 (en) * | 2014-10-10 | 2016-04-14 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device, circuit board, and electronic device |
| US9634097B2 (en) | 2014-11-25 | 2017-04-25 | Sandisk Technologies Llc | 3D NAND with oxide semiconductor channel |
| US20170330876A1 (en) * | 2014-12-02 | 2017-11-16 | Glenn J. Leedy | Vertical system integration |
| WO2016099580A2 (en) * | 2014-12-23 | 2016-06-23 | Lupino James John | Three dimensional integrated circuits employing thin film transistors |
| US10095651B2 (en) * | 2015-03-10 | 2018-10-09 | Toshiba Memory Corporation | Semiconductor storage device |
| US9589611B2 (en) * | 2015-04-01 | 2017-03-07 | Semiconductor Energy Laboratory Co., Ltd. | Memory device, semiconductor device, and electronic device |
| DE102016207737A1 (de) * | 2015-05-11 | 2016-11-17 | Semiconductor Energy Laboratory Co., Ltd. | Halbleitervorrichtung, Verfahren zum Herstellen der Halbleitervorrichtung, Reifen und beweglicher Gegenstand |
| JP6773453B2 (ja) * | 2015-05-26 | 2020-10-21 | 株式会社半導体エネルギー研究所 | 記憶装置及び電子機器 |
| JP2016225613A (ja) * | 2015-05-26 | 2016-12-28 | 株式会社半導体エネルギー研究所 | 半導体装置及び半導体装置の駆動方法 |
| JP2017054573A (ja) * | 2015-09-11 | 2017-03-16 | 株式会社東芝 | 半導体記憶装置 |
| US10121553B2 (en) | 2015-09-30 | 2018-11-06 | Sunrise Memory Corporation | Capacitive-coupled non-volatile thin-film transistor NOR strings in three-dimensional arrays |
| KR20170042121A (ko) * | 2015-10-08 | 2017-04-18 | 삼성전자주식회사 | 파워-업 시퀀스를 제어하는 반도체 장치 |
| KR102389077B1 (ko) * | 2015-11-05 | 2022-04-22 | 에스케이하이닉스 주식회사 | 3 차원 비휘발성 메모리 소자의 초기화 방법 및 이의 프로그래밍 방법 |
| KR102005849B1 (ko) * | 2015-11-14 | 2019-07-31 | 에스케이하이닉스 주식회사 | 3 차원 비휘발성 메모리 소자의 초기화 방법 |
| JP2017123208A (ja) * | 2016-01-06 | 2017-07-13 | ルネサスエレクトロニクス株式会社 | 半導体記憶装置 |
| US9721663B1 (en) | 2016-02-18 | 2017-08-01 | Sandisk Technologies Llc | Word line decoder circuitry under a three-dimensional memory array |
| WO2017178923A1 (en) * | 2016-04-15 | 2017-10-19 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device, electronic component, and electronic device |
| US10236875B2 (en) | 2016-04-15 | 2019-03-19 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and method for operating the semiconductor device |
| JP6495878B2 (ja) | 2016-10-13 | 2019-04-03 | 株式会社半導体エネルギー研究所 | 半導体装置 |
| JP6942612B2 (ja) * | 2016-11-17 | 2021-09-29 | 株式会社半導体エネルギー研究所 | 記憶装置、半導体ウエハ、電子機器 |
| DE112018000380T5 (de) | 2017-01-13 | 2019-09-26 | Semiconductor Energy Laboratory Co., Ltd. | Speichervorrichtung, Halbleitervorrichtung, elektronisches Bauelement und elektronisches Gerät |
| JP2018195794A (ja) * | 2017-05-19 | 2018-12-06 | 株式会社半導体エネルギー研究所 | 記憶装置 |
| WO2018224911A1 (ja) * | 2017-06-08 | 2018-12-13 | 株式会社半導体エネルギー研究所 | 半導体装置及び半導体装置の駆動方法 |
| KR102365684B1 (ko) * | 2017-06-27 | 2022-02-21 | 삼성전자주식회사 | 메모리 소자 및 그 제조 방법 |
| CN111656512B (zh) | 2018-01-25 | 2025-02-14 | 株式会社半导体能源研究所 | 存储装置、半导体装置及电子设备 |
| JPWO2019202440A1 (ja) * | 2018-04-20 | 2021-05-13 | 株式会社半導体エネルギー研究所 | 記憶装置および電子機器 |
| US10868025B2 (en) * | 2018-11-26 | 2020-12-15 | Sandisk Technologies Llc | Three-dimensional memory device including replacement crystalline channels and methods of making the same |
| US11101284B2 (en) * | 2018-12-18 | 2021-08-24 | Sandisk Technologies Llc | Three-dimensional memory device containing etch stop structures and methods of making the same |
| US11984147B2 (en) * | 2019-04-26 | 2024-05-14 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device including sense amplifier and operation method of semiconductor device |
| WO2021009607A1 (ja) * | 2019-07-12 | 2021-01-21 | 株式会社半導体エネルギー研究所 | 記憶装置、半導体装置、及び電子機器 |
| US12002535B2 (en) * | 2019-09-20 | 2024-06-04 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device comprising memory cell array and arithmetic circuit |
| JP2022102917A (ja) * | 2020-12-25 | 2022-07-07 | キオクシア株式会社 | 半導体記憶装置 |
-
2019
- 2019-11-18 WO PCT/IB2019/059859 patent/WO2020157553A1/ja not_active Ceased
- 2019-11-18 CN CN201980089912.1A patent/CN113330554B/zh active Active
- 2019-11-18 JP JP2020568866A patent/JP7361730B2/ja active Active
- 2019-11-18 KR KR1020217027126A patent/KR102904259B1/ko active Active
- 2019-11-18 US US17/424,621 patent/US12069846B2/en active Active
- 2019-11-25 TW TW108142818A patent/TWI846763B/zh active
-
2023
- 2023-10-03 JP JP2023171998A patent/JP2023181189A/ja not_active Withdrawn
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20070115710A1 (en) | 2005-11-22 | 2007-05-24 | Nam-Seog Kim | Semiconductor memory device with hierarchical bit line structure |
| US20090086525A1 (en) * | 2007-09-12 | 2009-04-02 | Jaechul Park | Multi-layered memory devices |
| US20140312402A1 (en) | 2011-04-15 | 2014-10-23 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor memory device |
Also Published As
| Publication number | Publication date |
|---|---|
| CN113330554B (zh) | 2025-06-06 |
| TWI846763B (zh) | 2024-07-01 |
| JP2023181189A (ja) | 2023-12-21 |
| KR20210121143A (ko) | 2021-10-07 |
| CN113330554A (zh) | 2021-08-31 |
| WO2020157553A1 (ja) | 2020-08-06 |
| JPWO2020157553A1 (https=) | 2020-08-06 |
| US20220085020A1 (en) | 2022-03-17 |
| US12069846B2 (en) | 2024-08-20 |
| JP7361730B2 (ja) | 2023-10-16 |
| TW202030730A (zh) | 2020-08-16 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| KR102904259B1 (ko) | 기억 장치 | |
| JP7615370B2 (ja) | 半導体装置 | |
| KR102919551B1 (ko) | 반도체 장치 및 상기 반도체 장치를 가지는 전자 기기 | |
| JP7745059B2 (ja) | 半導体装置 | |
| JP7639207B2 (ja) | 半導体装置 | |
| JP7711271B2 (ja) | 記憶装置 | |
| KR20260030959A (ko) | 반도체 장치 및 상기 반도체 장치를 가지는 전기 기기 | |
| JP2025094087A (ja) | 記憶装置 | |
| JP7839928B2 (ja) | 記憶装置 | |
| KR102851545B1 (ko) | 기억 장치 및 전자 기기 | |
| JP7788384B2 (ja) | 半導体装置 | |
| CN119586340A (zh) | 半导体装置以及电子设备 | |
| WO2024100489A1 (ja) | 半導体装置、半導体装置の作製方法、及び電子機器 | |
| WO2024089571A1 (ja) | 半導体装置、半導体装置の作製方法、及び電子機器 | |
| KR20250018102A (ko) | 기억 장치 | |
| KR20250119475A (ko) | 반도체 장치, 기억 장치 | |
| CN120660458A (zh) | 半导体装置 | |
| KR20230091874A (ko) | 반도체 장치 및 전자 기기 |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PA0105 | International application |
St.27 status event code: A-0-1-A10-A15-nap-PA0105 |
|
| PG1501 | Laying open of application |
St.27 status event code: A-1-1-Q10-Q12-nap-PG1501 |
|
| A201 | Request for examination | ||
| E13-X000 | Pre-grant limitation requested |
St.27 status event code: A-2-3-E10-E13-lim-X000 |
|
| P11-X000 | Amendment of application requested |
St.27 status event code: A-2-2-P10-P11-nap-X000 |
|
| P13-X000 | Application amended |
St.27 status event code: A-2-2-P10-P13-nap-X000 |
|
| PA0201 | Request for examination |
St.27 status event code: A-1-2-D10-D11-exm-PA0201 |
|
| P22-X000 | Classification modified |
St.27 status event code: A-2-2-P10-P22-nap-X000 |
|
| P22-X000 | Classification modified |
St.27 status event code: A-2-2-P10-P22-nap-X000 |
|
| D18-X000 | Deferred examination requested |
St.27 status event code: A-1-2-D10-D18-exm-X000 |
|
| D19-X000 | Deferred examination accepted |
St.27 status event code: A-1-2-D10-D19-exm-X000 |
|
| D20-X000 | Deferred examination resumed |
St.27 status event code: A-1-2-D10-D20-exm-X000 |
|
| E902 | Notification of reason for refusal | ||
| PE0902 | Notice of grounds for rejection |
St.27 status event code: A-1-2-D10-D21-exm-PE0902 |
|
| P22-X000 | Classification modified |
St.27 status event code: A-2-2-P10-P22-nap-X000 |
|
| T11-X000 | Administrative time limit extension requested |
St.27 status event code: U-3-3-T10-T11-oth-X000 |
|
| P11-X000 | Amendment of application requested |
St.27 status event code: A-2-2-P10-P11-nap-X000 |
|
| D22 | Grant of ip right intended |
Free format text: ST27 STATUS EVENT CODE: A-1-2-D10-D22-EXM-PE0701 (AS PROVIDED BY THE NATIONAL OFFICE) |
|
| PE0701 | Decision of registration |
St.27 status event code: A-1-2-D10-D22-exm-PE0701 |
|
| F11 | Ip right granted following substantive examination |
Free format text: ST27 STATUS EVENT CODE: A-2-4-F10-F11-EXM-PR0701 (AS PROVIDED BY THE NATIONAL OFFICE) |
|
| PR0701 | Registration of establishment |
St.27 status event code: A-2-4-F10-F11-exm-PR0701 |
|
| PR1002 | Payment of registration fee |
St.27 status event code: A-2-2-U10-U12-oth-PR1002 Fee payment year number: 1 |
|
| U12 | Designation fee paid |
Free format text: ST27 STATUS EVENT CODE: A-2-2-U10-U12-OTH-PR1002 (AS PROVIDED BY THE NATIONAL OFFICE) Year of fee payment: 1 |
|
| PG1601 | Publication of registration |
St.27 status event code: A-4-4-Q10-Q13-nap-PG1601 |
|
| Q13 | Ip right document published |
Free format text: ST27 STATUS EVENT CODE: A-4-4-Q10-Q13-NAP-PG1601 (AS PROVIDED BY THE NATIONAL OFFICE) |