KR102213034B1 - 임베디드 다이 기판 및 임베디드 다이 기판을 제조하는 방법 - Google Patents

임베디드 다이 기판 및 임베디드 다이 기판을 제조하는 방법 Download PDF

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KR102213034B1
KR102213034B1 KR1020187029732A KR20187029732A KR102213034B1 KR 102213034 B1 KR102213034 B1 KR 102213034B1 KR 1020187029732 A KR1020187029732 A KR 1020187029732A KR 20187029732 A KR20187029732 A KR 20187029732A KR 102213034 B1 KR102213034 B1 KR 102213034B1
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die
layer
substrate
conductive
dielectric layer
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KR20180124932A (ko
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대익 김
지에 푸
창한 윤
진관 김
마누엘 올드릿
쳉지에 주오
마리오 벨레즈
종해 김
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퀄컴 인코포레이티드
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/611—Insulating or insulated package substrates; Interposers; Redistribution layers for connecting multiple chips together
    • H10W70/614—Insulating or insulated package substrates; Interposers; Redistribution layers for connecting multiple chips together the multiple chips being integrally enclosed
    • H01L23/5383—
    • H01L21/4853—
    • H01L21/4857—
    • H01L21/486—
    • H01L23/481—
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    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/021—Manufacture or treatment of interconnections within wafers or substrates
    • H10W20/023—Manufacture or treatment of interconnections within wafers or substrates the interconnections being through-semiconductor vias
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    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/021—Manufacture or treatment of interconnections within wafers or substrates
    • H10W20/023—Manufacture or treatment of interconnections within wafers or substrates the interconnections being through-semiconductor vias
    • H10W20/0234—Manufacture or treatment of interconnections within wafers or substrates the interconnections being through-semiconductor vias comprising etching via holes that stop on pads or on electrodes
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    • H10W20/00—Interconnections in chips, wafers or substrates
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    • H10W20/021—Manufacture or treatment of interconnections within wafers or substrates
    • H10W20/023—Manufacture or treatment of interconnections within wafers or substrates the interconnections being through-semiconductor vias
    • H10W20/0242—Manufacture or treatment of interconnections within wafers or substrates the interconnections being through-semiconductor vias comprising etching via holes from the back sides of the chips, wafers or substrates
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    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/20—Interconnections within wafers or substrates, e.g. through-silicon vias [TSV]
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    • H10W70/01—Manufacture or treatment
    • H10W70/05—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers
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    • H10W70/01—Manufacture or treatment
    • H10W70/05—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers
    • H10W70/08—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers by depositing layers on the chip or wafer, e.g. "chip-first" RDLs
    • H10W70/09—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers by depositing layers on the chip or wafer, e.g. "chip-first" RDLs extending onto an encapsulation that laterally surrounds the chip or wafer, e.g. fan-out wafer level package [FOWLP] RDLs
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    • H10W70/01—Manufacture or treatment
    • H10W70/05—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers
    • H10W70/095—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers of vias therein
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    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/611—Insulating or insulated package substrates; Interposers; Redistribution layers for connecting multiple chips together
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    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/62—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
    • H10W70/63—Vias, e.g. via plugs
    • H10W70/635—Through-vias
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    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/68—Shapes or dispositions thereof
    • H10W70/685—Shapes or dispositions thereof comprising multiple insulating layers
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    • H10W70/01—Manufacture or treatment
    • H10W70/05—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers
    • H10W70/093—Connecting or disconnecting other interconnections thereto or therefrom, e.g. connecting bond wires or bumps
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    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/68—Shapes or dispositions thereof
    • H10W70/682—Shapes or dispositions thereof comprising holes having chips therein
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    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/0198—Manufacture or treatment batch processes
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    • H10W72/071—Connecting or disconnecting
    • H10W72/073—Connecting or disconnecting of die-attach connectors
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    • H10W72/00—Interconnections or connectors in packages
    • H10W72/30—Die-attach connectors
    • H10W72/351—Materials of die-attach connectors
    • H10W72/352—Materials of die-attach connectors comprising metals or metalloids, e.g. solders
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    • H10W72/00—Interconnections or connectors in packages
    • H10W72/30—Die-attach connectors
    • H10W72/351—Materials of die-attach connectors
    • H10W72/353—Materials of die-attach connectors not comprising solid metals or solid metalloids, e.g. ceramics
    • H10W72/354—Materials of die-attach connectors not comprising solid metals or solid metalloids, e.g. ceramics comprising polymers
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    • H10W72/00—Interconnections or connectors in packages
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    • H10W72/874—On different surfaces
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    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/941—Dispositions of bond pads
    • H10W72/9413—Dispositions of bond pads on encapsulations
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    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/734—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked insulating package substrate, interposer or RDL

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  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Structure Of Printed Boards (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
KR1020187029732A 2016-03-18 2017-03-16 임베디드 다이 기판 및 임베디드 다이 기판을 제조하는 방법 Active KR102213034B1 (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US15/074,750 2016-03-18
US15/074,750 US10325855B2 (en) 2016-03-18 2016-03-18 Backside drill embedded die substrate
PCT/US2017/022829 WO2017161199A1 (en) 2016-03-18 2017-03-16 Backside drill embedded die substrate

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KR20180124932A KR20180124932A (ko) 2018-11-21
KR102213034B1 true KR102213034B1 (ko) 2021-02-04

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US (1) US10325855B2 (https=)
EP (1) EP3430644B1 (https=)
JP (1) JP6679748B2 (https=)
KR (1) KR102213034B1 (https=)
CN (1) CN109075154B (https=)
BR (1) BR112018068970B1 (https=)
ES (1) ES2821728T3 (https=)
TW (1) TWI692048B (https=)
WO (1) WO2017161199A1 (https=)

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US10325855B2 (en) 2019-06-18
TW201737394A (zh) 2017-10-16
JP6679748B2 (ja) 2020-04-15
US20170271266A1 (en) 2017-09-21
ES2821728T3 (es) 2021-04-27
JP2019511120A (ja) 2019-04-18
BR112018068970A2 (pt) 2019-03-06
BR112018068970B1 (pt) 2023-01-31
CN109075154B (zh) 2022-06-03
EP3430644A1 (en) 2019-01-23
KR20180124932A (ko) 2018-11-21
CN109075154A (zh) 2018-12-21
WO2017161199A1 (en) 2017-09-21
EP3430644B1 (en) 2020-07-01
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