KR102028870B1 - 반도체 장치의 제조 방법 - Google Patents

반도체 장치의 제조 방법 Download PDF

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Publication number
KR102028870B1
KR102028870B1 KR1020197009608A KR20197009608A KR102028870B1 KR 102028870 B1 KR102028870 B1 KR 102028870B1 KR 1020197009608 A KR1020197009608 A KR 1020197009608A KR 20197009608 A KR20197009608 A KR 20197009608A KR 102028870 B1 KR102028870 B1 KR 102028870B1
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South Korea
Prior art keywords
resin composition
photosensitive resin
semiconductor device
film
manufacturing
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KR1020197009608A
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English (en)
Korean (ko)
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KR20190039613A (ko
Inventor
유마 다나까
슈사꾸 오까묘
도모노리 겐모찌
Original Assignee
스미또모 베이크라이트 가부시키가이샤
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Publication of KR20190039613A publication Critical patent/KR20190039613A/ko
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    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/004—Photosensitive materials
    • G03F7/022—Quinonediazides
    • G03F7/023—Macromolecular quinonediazides; Macromolecular additives, e.g. binders
    • C—CHEMISTRY; METALLURGY
    • C08—ORGANIC MACROMOLECULAR COMPOUNDS; THEIR PREPARATION OR CHEMICAL WORKING-UP; COMPOSITIONS BASED THEREON
    • C08L—COMPOSITIONS OF MACROMOLECULAR COMPOUNDS
    • C08L63/00—Compositions of epoxy resins; Compositions of derivatives of epoxy resins
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/004—Photosensitive materials
    • G03F7/0048—Photosensitive materials characterised by the solvents or agents facilitating spreading, e.g. tensio-active agents
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/004—Photosensitive materials
    • G03F7/075—Silicon-containing compounds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/12—Mountings, e.g. non-detachable insulating substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/29—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
    • H01L23/293—Organic, e.g. plastic
    • H01L23/295—Organic, e.g. plastic containing a filler
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/04105—Bonding areas formed on an encapsulation of the semiconductor or solid-state body, e.g. bonding areas on chip-scale packages
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/12105—Bump connectors formed on an encapsulation of the semiconductor or solid-state body, e.g. bumps on chip-scale packages
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/93—Batch processes
    • H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L2224/96—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being encapsulated in a common layer, e.g. neo-wafer or pseudo-wafer, said common layer being separable into individual assemblies after connecting

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  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Spectroscopy & Molecular Physics (AREA)
  • Health & Medical Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Medicinal Chemistry (AREA)
  • Polymers & Plastics (AREA)
  • Organic Chemistry (AREA)
  • Manufacturing & Machinery (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Macromolecular Compounds Obtained By Forming Nitrogen-Containing Linkages In General (AREA)
KR1020197009608A 2016-09-08 2017-09-04 반도체 장치의 제조 방법 KR102028870B1 (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2016175593 2016-09-08
JPJP-P-2016-175593 2016-09-08
PCT/JP2017/031795 WO2018047770A1 (ja) 2016-09-08 2017-09-04 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
KR20190039613A KR20190039613A (ko) 2019-04-12
KR102028870B1 true KR102028870B1 (ko) 2019-10-04

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KR1020197009608A KR102028870B1 (ko) 2016-09-08 2017-09-04 반도체 장치의 제조 방법

Country Status (5)

Country Link
JP (1) JP6477925B2 (zh)
KR (1) KR102028870B1 (zh)
CN (1) CN109690759B (zh)
TW (1) TWI745426B (zh)
WO (1) WO2018047770A1 (zh)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11024593B2 (en) * 2018-09-28 2021-06-01 Taiwan Semiconductor Manufacturing Co., Ltd. Metal bumps and method forming same
JP7322580B2 (ja) * 2019-08-09 2023-08-08 住友ベークライト株式会社 電子装置の製造方法
JPWO2021241447A1 (zh) * 2020-05-26 2021-12-02
KR102587322B1 (ko) * 2021-05-28 2023-10-10 삼성에스디아이 주식회사 반도체 소자 밀봉용 에폭시 수지 조성물 및 이를 사용하여 밀봉된 반도체 소자
CN113817426B (zh) * 2021-08-25 2023-06-30 上海锐朗光电材料有限公司 一种应用于大尺寸芯片粘接的导电胶及其制备方法
CN117059583B (zh) * 2023-10-12 2024-01-09 江苏芯德半导体科技有限公司 一种具有异质胶材的晶圆级扇出型封装结构及其封装方法

Citations (3)

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Publication number Priority date Publication date Assignee Title
JP2003133483A (ja) 2001-10-25 2003-05-09 Toppan Printing Co Ltd 半導体集積回路装置およびその製造方法
US20070114676A1 (en) 2005-11-18 2007-05-24 Semiconductor Components Industries, Llc. Semiconductor package structure and method of manufacture
JP2015225097A (ja) 2014-05-26 2015-12-14 住友ベークライト株式会社 感光性樹脂組成物および電子装置

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JP2925960B2 (ja) * 1994-11-29 1999-07-28 三洋電機株式会社 半導体装置の製造方法
JP5430066B2 (ja) * 2004-07-07 2014-02-26 プロメラス， エルエルシー 絶縁樹脂組成物及びその使用
JP5407517B2 (ja) * 2008-04-25 2014-02-05 日立化成株式会社 絶縁層、絶縁体インク及び両面電極パッケージ
CN101833241B (zh) * 2009-03-09 2012-07-04 村上精密制版（昆山）有限公司 一种感光性树脂组合物
JP5678492B2 (ja) * 2010-06-30 2015-03-04 日産化学工業株式会社 パターン画像の形成方法
TWI430024B (zh) * 2010-08-05 2014-03-11 Asahi Kasei E Materials Corp A photosensitive resin composition, a method for manufacturing a hardened bump pattern, and a semiconductor device
JP5820825B2 (ja) * 2011-01-18 2015-11-24 旭化成イーマテリアルズ株式会社 樹脂組成物、硬化物、樹脂フィルム及び配線板
JPWO2014069091A1 (ja) * 2012-10-30 2016-09-08 住友ベークライト株式会社 感光性樹脂組成物、硬化膜、保護膜、絶縁膜および電子装置
JP6171583B2 (ja) 2013-05-31 2017-08-02 富士通株式会社 電子装置及びその製造方法
JP2015053469A (ja) * 2013-08-07 2015-03-19 日東電工株式会社 半導体パッケージの製造方法
JP2015064576A (ja) * 2013-08-29 2015-04-09 住友ベークライト株式会社 感光性樹脂組成物
JP2015173253A (ja) * 2014-02-20 2015-10-01 株式会社テラプローブ 半導体装置の製造方法
JP6475432B2 (ja) * 2014-07-18 2019-02-27 旭化成株式会社 パワー半導体素子用保護膜、及びその形成方法
TWI627502B (zh) * 2014-09-04 2018-06-21 Fujifilm Corp 感光性樹脂組成物、硬化膜的製造方法、硬化膜、液晶顯示裝置、有機電激發光顯示裝置及觸控面板

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003133483A (ja) 2001-10-25 2003-05-09 Toppan Printing Co Ltd 半導体集積回路装置およびその製造方法
US20070114676A1 (en) 2005-11-18 2007-05-24 Semiconductor Components Industries, Llc. Semiconductor package structure and method of manufacture
JP2015225097A (ja) 2014-05-26 2015-12-14 住友ベークライト株式会社 感光性樹脂組成物および電子装置

Also Published As

Publication number Publication date
WO2018047770A1 (ja) 2018-03-15
CN109690759B (zh) 2020-05-22
KR20190039613A (ko) 2019-04-12
TW201826023A (zh) 2018-07-16
JPWO2018047770A1 (ja) 2018-09-06
CN109690759A (zh) 2019-04-26
JP6477925B2 (ja) 2019-03-06
TWI745426B (zh) 2021-11-11

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