KR101160105B1 - 반도체 기억 장치 및 그 제조 방법 - Google Patents

반도체 기억 장치 및 그 제조 방법 Download PDF

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Publication number
KR101160105B1
KR101160105B1 KR1020100089932A KR20100089932A KR101160105B1 KR 101160105 B1 KR101160105 B1 KR 101160105B1 KR 1020100089932 A KR1020100089932 A KR 1020100089932A KR 20100089932 A KR20100089932 A KR 20100089932A KR 101160105 B1 KR101160105 B1 KR 101160105B1
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KR
South Korea
Prior art keywords
diffusion layer
type
pmos access
access transistor
transistor
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Expired - Fee Related
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KR1020100089932A
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English (en)
Korean (ko)
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KR20110029101A (ko
Inventor
후지오 마스오카
신타로 아라이
Original Assignee
유니산티스 일렉트로닉스 싱가포르 프라이빗 리미티드
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B10/00Static random access memory [SRAM] devices
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D89/00Aspects of integrated devices not covered by groups H10D84/00 - H10D88/00
    • H10D89/10Integrated device layouts
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B99/00Subject matter not provided for in other groups of this subclass
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/17Semiconductor regions connected to electrodes not carrying current to be rectified, amplified or switched, e.g. channel regions
    • H10D62/351Substrate regions of field-effect devices
    • H10D62/357Substrate regions of field-effect devices of FETs
    • H10D62/364Substrate regions of field-effect devices of FETs of IGFETs
    • H10D62/371Inactive supplementary semiconductor regions, e.g. for preventing punch-through, improving capacity effect or leakage current
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/0123Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/017Manufacturing their source or drain regions, e.g. silicided source or drain regions
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/0123Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/0191Manufacturing their doped wells
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/0123Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/0195Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices the components including vertical IGFETs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/02Manufacture or treatment characterised by using material-based technologies
    • H10D84/03Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe

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  • Semiconductor Memories (AREA)
  • Static Random-Access Memory (AREA)
KR1020100089932A 2009-09-14 2010-09-14 반도체 기억 장치 및 그 제조 방법 Expired - Fee Related KR101160105B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2009211300A JP5524547B2 (ja) 2009-09-14 2009-09-14 半導体記憶装置
JPJP-P-2009-211300 2009-09-14

Publications (2)

Publication Number Publication Date
KR20110029101A KR20110029101A (ko) 2011-03-22
KR101160105B1 true KR101160105B1 (ko) 2012-06-26

Family

ID=43034204

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020100089932A Expired - Fee Related KR101160105B1 (ko) 2009-09-14 2010-09-14 반도체 기억 장치 및 그 제조 방법

Country Status (6)

Country Link
US (1) US8169030B2 (https=)
EP (1) EP2296176B1 (https=)
JP (1) JP5524547B2 (https=)
KR (1) KR101160105B1 (https=)
CN (1) CN102024815B (https=)
TW (1) TW201110327A (https=)

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* Cited by examiner, † Cited by third party
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JP2013016243A (ja) * 2011-06-09 2013-01-24 Semiconductor Energy Lab Co Ltd 記憶装置
US8755219B2 (en) 2012-02-15 2014-06-17 Unisantis Electronics Singapore Pte. Ltd. Hierarchical wordline loadless 4GST-SRAM with a small cell area
CN103460373A (zh) * 2012-02-15 2013-12-18 新加坡优尼山帝斯电子私人有限公司 半导体存储器件
KR20130116334A (ko) * 2012-02-15 2013-10-23 유니산티스 일렉트로닉스 싱가포르 프라이빗 리미티드 반도체 기억 장치
US8836051B2 (en) * 2012-06-08 2014-09-16 Unisantis Electronics Singapore Pte. Ltd. Method for producing semiconductor device and semiconductor device
KR101925012B1 (ko) * 2012-07-17 2018-12-05 에스케이하이닉스 주식회사 반도체 장치 및 그의 제조 방법
US9082838B2 (en) * 2012-09-28 2015-07-14 Unisantis Electronics Singapore Pte. Ltd. Method for producing a semiconductor device and semiconductor device
US8969949B2 (en) * 2013-03-10 2015-03-03 Taiwan Semiconductor Manufacturing Company, Ltd. Structure and method for static random access memory device of vertical tunneling field effect transistor
WO2015008387A1 (ja) * 2013-07-19 2015-01-22 ユニサンティス エレクトロニクス シンガポール プライベート リミテッド 半導体装置の製造方法、及び、半導体装置
JP2015032651A (ja) * 2013-08-01 2015-02-16 マイクロン テクノロジー, インク. 半導体装置
WO2015019444A1 (ja) * 2013-08-07 2015-02-12 ユニサンティス エレクトロニクス シンガポール プライベート リミテッド 半導体装置の製造方法、及び、半導体装置
US10361270B2 (en) * 2013-11-20 2019-07-23 Taiwan Semiconductor Manufacturing Co., Ltd. Nanowire MOSFET with different silicides on source and drain
WO2015125291A1 (ja) 2014-02-24 2015-08-27 ユニサンティス エレクトロニクス シンガポール プライベート リミテッド 記憶装置、半導体装置、及び記憶装置、半導体装置の製造方法
WO2015129021A1 (ja) * 2014-02-28 2015-09-03 ユニサンティス エレクトロニクス シンガポール プライベート リミテッド 半導体装置、及び半導体装置の製造方法
JP6114425B2 (ja) * 2016-03-11 2017-04-12 ユニサンティス エレクトロニクス シンガポール プライベート リミテッドUnisantis Electronics Singapore Pte Ltd. 半導体装置の製造方法、及び、半導体装置
KR20180130581A (ko) 2016-08-31 2018-12-07 마이크론 테크놀로지, 인크 메모리 셀 및 메모리 어레이
KR102195321B1 (ko) * 2016-08-31 2020-12-24 마이크론 테크놀로지, 인크 감지 증폭기 구성물
WO2018132250A1 (en) 2017-01-12 2018-07-19 Micron Technology, Inc. Memory cells, arrays of two transistor-one capacitor memory cells, methods of forming an array of two transistor-one capacitor memory cells, and methods used in fabricating integrated circuitry
US10290639B2 (en) * 2017-09-12 2019-05-14 Globalfoundries Inc. VNW SRAM with trinity cross-couple PD/PU contact and method for producing the same
US10559572B2 (en) 2018-06-29 2020-02-11 International Business Machines Corporation Vertical transistor contact for a memory cell with increased density
US10566453B2 (en) 2018-06-29 2020-02-18 International Business Machines Corporation Vertical transistor contact for cross-coupling in a memory cell
CN109326650B (zh) * 2018-10-10 2022-04-19 中国科学院微电子研究所 半导体器件及其制造方法及包括该器件的电子设备
US11640987B2 (en) * 2021-02-04 2023-05-02 Applied Materials, Inc. Implant to form vertical FETs with self-aligned drain spacer and junction
WO2022239196A1 (ja) * 2021-05-13 2022-11-17 ユニサンティス エレクトロニクス シンガポール プライベート リミテッド 半導体素子を用いたメモリ装置

Citations (4)

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US5641699A (en) 1993-03-03 1997-06-24 Matsushita Electric Industrial Co., Ltd. Method of manufacturing a semiconductor device having a dummy cell
KR20010062611A (ko) * 1999-12-23 2001-07-07 윌리엄 비. 켐플러 동적 임계 전압 4t sram 셀
JP2004193588A (ja) 2002-12-11 2004-07-08 Internatl Business Mach Corp <Ibm> 垂直MOSFET(verticalMOSFET)SRAMセル
WO2009096466A1 (ja) 2008-01-29 2009-08-06 Unisantis Electronics (Japan) Ltd. 半導体記憶装置

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JPS60128654A (ja) * 1983-12-16 1985-07-09 Hitachi Ltd 半導体集積回路
JPS63239973A (ja) * 1986-10-08 1988-10-05 テキサス インスツルメンツ インコーポレイテツド 集積回路およびその製造方法
JP2703970B2 (ja) 1989-01-17 1998-01-26 株式会社東芝 Mos型半導体装置
JP3403231B2 (ja) * 1993-05-12 2003-05-06 三菱電機株式会社 半導体装置およびその製造方法
JP3036588B2 (ja) * 1997-02-03 2000-04-24 日本電気株式会社 半導体記憶装置
JP3467416B2 (ja) 1998-04-20 2003-11-17 Necエレクトロニクス株式会社 半導体記憶装置及びその製造方法
US6229161B1 (en) * 1998-06-05 2001-05-08 Stanford University Semiconductor capacitively-coupled NDR device and its applications in high-density high-speed memories and in power switches
US6583452B1 (en) * 2001-12-17 2003-06-24 T-Ram, Inc. Thyristor-based device having extended capacitive coupling
US7285604B2 (en) * 2002-03-28 2007-10-23 National Institute Of Information And Communications Technology, Incorporated Administrative Agency Process for production of molecular devices
JP2005303111A (ja) * 2004-04-14 2005-10-27 Renesas Technology Corp 半導体記憶装置
JP5114968B2 (ja) * 2007-02-20 2013-01-09 富士通セミコンダクター株式会社 半導体装置及びその製造方法
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Patent Citations (4)

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Publication number Priority date Publication date Assignee Title
US5641699A (en) 1993-03-03 1997-06-24 Matsushita Electric Industrial Co., Ltd. Method of manufacturing a semiconductor device having a dummy cell
KR20010062611A (ko) * 1999-12-23 2001-07-07 윌리엄 비. 켐플러 동적 임계 전압 4t sram 셀
JP2004193588A (ja) 2002-12-11 2004-07-08 Internatl Business Mach Corp <Ibm> 垂直MOSFET(verticalMOSFET)SRAMセル
WO2009096466A1 (ja) 2008-01-29 2009-08-06 Unisantis Electronics (Japan) Ltd. 半導体記憶装置

Also Published As

Publication number Publication date
JP5524547B2 (ja) 2014-06-18
EP2296176B1 (en) 2014-08-20
US8169030B2 (en) 2012-05-01
EP2296176A1 (en) 2011-03-16
KR20110029101A (ko) 2011-03-22
JP2011061110A (ja) 2011-03-24
CN102024815A (zh) 2011-04-20
TW201110327A (en) 2011-03-16
CN102024815B (zh) 2013-04-10
US20110062523A1 (en) 2011-03-17

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