KR101076598B1 - 속이 빈 기판을 포함하는 적층 반도체 패키지 어셈블리 - Google Patents
속이 빈 기판을 포함하는 적층 반도체 패키지 어셈블리 Download PDFInfo
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- KR101076598B1 KR101076598B1 KR1020060049332A KR20060049332A KR101076598B1 KR 101076598 B1 KR101076598 B1 KR 101076598B1 KR 1020060049332 A KR1020060049332 A KR 1020060049332A KR 20060049332 A KR20060049332 A KR 20060049332A KR 101076598 B1 KR101076598 B1 KR 101076598B1
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Abstract
Description
Claims (19)
- 적층 패키지 어셈블리에 있어서, 상기 어셈블리는제 1 패키지와,주변 솔더 볼 z-인터커넥션(peripheral solder ball z-interconnect)을 이용하여 상기 제 1 패키지 위에 구축되는 제 2 패키지를 포함하며, 상기 제 1 패키지는 제 1 패키지 기판의 다이 부착 면에 부착된 하나 이상의 제 1 패키지 다이를 포함하고, 상기 제 1 패키지 다이는 몰드 캡(mold cap)에 내장되며,상기 제 2 패키지는 프레임 기판의 다이 부착 면에 장착되는 하나 이상의 제 2 패키지 다이를 포함하고, 상기 프레임 기판은 개구부를 둘러싸는 프레임 형태를 지니며, 상기 개구부는, 제 2 패키지가 제 1 패키지 기판 상에 장착될 때 제 1 패키지 상에서 몰드 캡을 수용하도록, 형태와 크기가 정해지며, 적층 가능한 패키지 기판이 개구부의 에지(edge)의 일부분 이상에 이웃하는 가장자리 다이 부착 영역(marginal die attach region)을 포함하는 것을 특징으로 하는 적층 패키지 어셈블리.
- 제 1 항에 있어서, 상기 프레임 기판은 다이 부착 면 상에, 상기 개구부의 에지의 일부분 이상에 이웃하는 가장자리 다이 부착 영역을 포함함을 특징으로 하는 적층 패키지 어셈블리.
- 제 1 항에 있어서, 제 2 패키지 다이의 전기적 인터커넥션을 위해, 상기 프레임 기판은 다이 부착 면 상에, 하나 이상의 외부 프레임 에지를 따라 위치하는 와이어 본드 사이트(wire bond site)의 하나 이상의 열(row)을 포함함을 특징으로 하는 적층 패키지 어셈블리.
- 제 1 항에 있어서, 상기 프레임 기판은, 상기 다이 부착 면의 반대쪽 면에서, 상기 제 1 패키지의 기판 상의 대응하는 z-인터커넥트 패드에 따라 정렬하도록 배열되는 복수의 z-인터커넥트 볼 패드를 포함함을 특징으로 하는 적층 패키지 어셈블리.
- 제 1 항에 있어서, 패키지가 장착될 때, 하부 패키지 상의 몰드 캡을 수용하도록, 프레임 기판의 개구부의 형태와 크기가 정해짐을 특징으로 하는 적층 패키지 어셈블리.
- 제 1 항에 있어서, 상기 몰드 캡은, 프레임 기판의 개구부의 내부 공간으로 돌출됨을 특징으로 하는 적층 패키지 어셈블리.
- 제 1 항에 있어서, 상기 개구부의 형태는 장방형(rectangular)임을 특징으로 하는 적층 패키지 어셈블리.
- 제 7 항에 있어서, 상기 개구부의 형태는 정사각형(square)임을 특징으로 하는 적층 패키지 어셈블리.
- 제 1 항에 있어서, 상기 개구부는 상기 몰드 캡의 풋프린트만큼 큰 것을 특징으로 하는 적층 패키지 어셈블리.
- 제 1 항에 있어서, 상기 개구부는 상기 몰드 캡의 표면만큼 큰 것을 특징으로 하는 적층 패키지 어셈블리.
- 제 1 항에 있어서, 상기 몰드 캡의 풋프린트는 상기 몰드 캡의 표면보다 크며, 상기 개구부의 크기는 상기 몰드 캡의 풋트린트의 크기와 상기 몰드 캡의 상부 표면의 크기 사이의 범위를 가짐을 특징으로 하는 적층 패키지 어셈블리.
- 제 1 항에 있어서, 제 1 패키지는 볼 그리드 어레이 패키지(ball grid array package)임을 특징으로 하는 적층 패키지 어셈블리.
- 제 1 항에 있어서, 상기 제 1 패키지는 와이어 본딩에 의해 상기 제 1 패키지 기판 상에 장착되어 상기 제 1 패키지 기판과 인터커넥팅되는 하나 이상의 다이를 포함함을 특징으로 하는 적층 패키지 어셈블리.
- 적층 가능한 반도체 패키지를 형성하기 위한 방법에 있어서, 상기 방법은다이 부착 면과, 상기 다이 부착 면의 반대쪽 면과, 패키지의 몰드 캡(mold cap)을 수용하고 패키지의 기판 상에 장착되도록 형태와 크기가 정해진 개구부와, 상기 개구부의 에지의 일부분 이상에 이웃하는 가장자리 다이 부착 영역(marginal die attach region)과, 상기 반대쪽 면 위에 하나의 열(row), 또는 어레이(array)의 형태로 배열되는 z-인터커넥트 솔더 볼 패드를 포함하는 프레임 기판을 제공하는 단계와,하나 이상의 다이를, 프레임 기판의 다이 부착 면의 다이 부착 영역 상에 장착하고, 와이어 본드에 의해, 상기 다이를 기판의 다이 부착 면으로 전기적으로 인터커넥팅하고, 상기 다이와 상기 프레임 기판의 다이 부착 면 상의 인터커넥트를 캡슐화하여, z-인터커넥트 솔더 볼을 반대쪽 면 상의 솔더 볼 패드 위에 장착하는 단계를 포함하는 것을 특징으로 하는 적층 가능한 반도체 패키지를 형성하기 위한 방법.
- 적층 패키지 어셈블리를 형성하기 위한 방법에 있어서, 상기 방법은제 1 패키지 기판의 몰드 캡 면 상에 장착된 다이를 포함하는 몰딩된 제 1 패키지를 제공하는 단계로서, 상기 제 1 패키지 기판은 상기 몰드 캡 면 상에 주변 z-인터커넥트 솔더 볼 패드(peripheral z-interconnect solder ball pad)를 갖는 특징의, 몰딩된 제 1 패키지 제공 단계와,청구항 제 14 항에 따르는 방법에 의한 적층 가능한 반도체 패키지를 적층 가능한 제 2 패키지로서 제공하는 단계와,z-인터커넥트 솔더 볼을 프레임 기판의 반대쪽 면 상의 솔더 볼 패드 상에 장착하는 단계와,제 2 패키지 상의 z-인터커넥트 솔더 볼이 제 1 패키지 상의 각각의 솔더 볼 패드에 따라 정렬되도록, 상기 제 2 패키지를 상기 제 1 패키지에 따라 정렬하는 단계와,제 1 패키지 기판과 제 2 패키지 기판의 장착 및 전기적 인터커넥션을 완료하기 위해, 솔더 볼을 솔더 볼 패드에 접촉시키고 리플로우(reflow)하는 단계를 포함함을 특징으로 하는 적층 패키지 어셈블리를 형성하기 위한 방법.
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TWI327360B (en) | 2010-07-11 |
JP4484846B2 (ja) | 2010-06-16 |
US20060267175A1 (en) | 2006-11-30 |
US7528474B2 (en) | 2009-05-05 |
US20090179319A1 (en) | 2009-07-16 |
JP2008226863A (ja) | 2008-09-25 |
US7964952B2 (en) | 2011-06-21 |
TW200703600A (en) | 2007-01-16 |
KR20060125582A (ko) | 2006-12-06 |
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