TW478136B - Stacked package structure of image sensor - Google Patents
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478136 五、發明說明α) 本發明係為一種影像感測器之堆疊封裝構造,特別係 指一種用以將具有不同功能之積體電路與影像感測晶片封 裝於一封裝體内,可減少封裝基板及將各不同功能之處理 單元與影像感測晶片整合封裝者。 按,一般感測器係用來測一訊號,該訊號可為光訊號 或聲音訊號,本案之感測器係用來接收一影像訊號,並將 該影像訊號轉換為電訊號傳遞至印刷電路板上。 一般影像感測器用以接收一影像訊號,並將影像訊號 轉換為電訊號傳遞至印刷電路板上,再與其他積體電路進 行電連接,使其具有不同的功能需求。諸如,其與數位訊 號處理器(Digital signal Processor)電連接,用以處理 影像感測器所產生之訊號,或可與微控制器(M i cro Controller)或中央處理器(CPU)等電連接,而產生不同的 功能需求。 然而,習知影像感測器皆單獨封裝製成,因此,與其 搭配之各種積體電路亦必需單獨予以封裝,再將封裝完成 之影像感測器及各種積體電路電連接於印刷電路板上,再 藉由導線將其電連接整合使用。如此,各積體電路與影像 感測器單獨封裝必須各使用一基板及一封裝製成,造成生 產成本無法有效地降低,且將各積體電路設置於印刷電路 板上時,所需印刷電路板之面積必需較大,而無法達到 輕、薄、短小之需求。 有鑑於此,本發明人乃發明出本發明影像感測器之堆 疊封裝構造,其可有效地解決上述影像感測器使用上之缺478136 V. Description of the invention α) The present invention is a stacked package structure of an image sensor, and particularly refers to a package for integrating integrated circuits and image sensing chips with different functions in a package, which can reduce packaging A substrate and a packager that integrates processing units with different functions and image sensing chips. Press, the general sensor is used to measure a signal, the signal can be a light signal or a sound signal, the sensor in this case is used to receive an image signal, and convert the image signal into an electrical signal and transfer it to the printed circuit board on. Generally, an image sensor is used to receive an image signal, convert the image signal into an electrical signal and transfer it to a printed circuit board, and then electrically connect with other integrated circuits to make it have different functional requirements. For example, it is electrically connected to a digital signal processor to process signals generated by the image sensor, or it can be electrically connected to a microcontroller (CPU) or a central processing unit (CPU). And produce different functional requirements. However, the conventional image sensors are individually packaged. Therefore, various integrated circuits with which they are used must also be separately packaged, and the packaged image sensors and various integrated circuits are electrically connected to the printed circuit board. , And then the electrical connection is integrated and used by wires. In this way, each integrated circuit and the image sensor must be individually packaged using a substrate and a package, resulting in a cost that cannot be effectively reduced. When each integrated circuit is arranged on a printed circuit board, the printed circuit is required. The area of the board must be large, and it cannot meet the requirements of light, thin and short. In view of this, the inventor has invented a stacked package structure of the image sensor of the present invention, which can effectively solve the above-mentioned defects in the use of the image sensor
89043.ptd 第7頁 478136 五、發明說明(2) 點。 本發明之 裝構造,其具 本發明之 裝構造,其具 本發明之 裝構造,可降 本發明之 裝構造,其可 為達上述 降低影像感 之目的及功 測晶片與積體電路同時封 一第一基板,其設有 主要目的再於提供一種影像感測器之 有減少封裝構件之功效,使封裝成本 另一目的在於提供一種影像感測器之 有減化生產製程,使其製造上更為便 又一目的在於提供一種影像感測器之 低影像感測產品之面積大小。 再一目的在於提供一種影像感測器之 測產品封裝、測試成本。 效,本發明之特徵在於將 側之第二表面 表面則形成有 板; 一第二基 該第一表 訊號輸出端 裝於一封裝體内,包括有 一第一表面及一與第一表 面形成有一 訊號輸 用以電連接於 入端, 該印刷 堆疊封 降低 堆疊封 利者。 堆疊封 堆疊封 影像感 面相反 該第二 電路 板設有一上表面及一下表面,該第二基板之 下表面係固定於該第一基板之第一表面上,而與該第一基 槽; 路,其係設置於該基板之第一表面上 與該基板之第一表面之訊號輸入端形 板形成有一凹 一積體電 於該凹槽内 ,並位 成電連 接; 一影像感測晶片,其係設置於該第二基板之上表面; 及89043.ptd Page 7 478136 V. Description of the invention (2) Point. The mounting structure of the present invention has the mounting structure of the present invention, which has the mounting structure of the present invention, can reduce the mounting structure of the present invention, and can achieve the above-mentioned purpose of reducing the image sense, and the power test chip and the integrated circuit can be simultaneously sealed. A first substrate provided with a main purpose is to provide an image sensor with the effect of reducing the packaging component, so that the packaging cost is reduced. Another object is to provide a reduced production process of the image sensor to make it easier to manufacture. Furthermore, another object is to provide an area size of a low image sensing product of an image sensor. Another object is to provide a packaging and testing cost of the image sensor. The invention is characterized in that a plate is formed on the second surface of the side; a second base signal output terminal of the first meter is installed in a package body, including a first surface and a first surface formed with the first surface; The signal transmission is used for electrical connection to the input end, and the printed stacked seal reduces the stack seal. The stacking seal is the opposite of the image sensing surface of the second circuit board. The second circuit board is provided with an upper surface and a lower surface, and the lower surface of the second substrate is fixed on the first surface of the first substrate and the first base groove. It is formed on the first surface of the substrate and the signal input end plate of the first surface of the substrate is formed with a recess and a body integrated in the groove and electrically connected; an image sensing chip, It is disposed on the upper surface of the second substrate; and
89043.ptd 第8頁 478136 五、發明說明(3) 一透光層,其係覆蓋於該影像感測晶片上方,使影像 感測晶片可透過該透光層接收影像訊號,並將影像訊號轉 換為電訊號傳遞至該基板上。 如是,可使影像感測晶片與積體電路予以整合堆疊, 以達到上述之目的。 本案得藉由下列圖式及詳細說明,俾得以更深入之了 解: 圖一為本發明影像感測器之堆疊封裝構造的第一實施例。 圖二為本發明影像感測器之堆疊封裝構造的第二實施例。 圖三為本發明影像感測器之堆疊封裝構造的第三實施例。 圖四為本發明影像感測器之堆疊封裝構造的第四實施例。 請參閱圖一,為本發明影像感測器之堆疊封裝構造的 第一實施例,該堆疊封裝構造包括有: 一第一基板10,其設有一第一表面12及一與第一表面 1 2相反側之第二表面1 4,於基板1 0之第一表面1 2形成有訊 號輸入端1 6,且第二表面1 4亦形成有訊號輸出端1 8,該訊 號輸出端1 8為球柵陣列金屬球,用以電連接於印刷電路板 2 0上,將基板1 0之訊號傳遞至印刷電路板2 0 ; 一第二基板2 2設有一上表面2 4及一下表面26,第二基 板2 2之下表面2 4係固定於第一基板1 0之第一表面1 2上,而 與第一基板1 0形成有一凹槽2 8 ; 積體電路3 0為訊號處理單元〔諸如,數位訊號處理器 (Digital Signal Processor)或微處理器(Micro Processor)或中央處理器(CPU)等〕,其係設置於基板1089043.ptd Page 8 478136 V. Description of the invention (3) A light-transmitting layer covering the image-sensing chip so that the image-sensing chip can receive the image signal through the light-transmitting layer and convert the image signal The electric signal is transmitted to the substrate. If so, the image sensing chip and the integrated circuit can be integrated and stacked to achieve the above purpose. This case can be further understood through the following drawings and detailed description: FIG. 1 is a first embodiment of a stacked package structure of an image sensor of the present invention. FIG. 2 is a second embodiment of a stacked package structure of an image sensor of the present invention. FIG. 3 is a third embodiment of the stacked package structure of the image sensor of the present invention. FIG. 4 is a fourth embodiment of the stacked package structure of the image sensor of the present invention. Please refer to FIG. 1, which is a first embodiment of a stacked package structure of an image sensor of the present invention. The stacked package structure includes: a first substrate 10 provided with a first surface 12 and a first surface 12; The second surface 14 on the opposite side, a signal input terminal 16 is formed on the first surface 12 of the substrate 10, and a signal output terminal 18 is also formed on the second surface 14. The signal output terminal 18 is a ball. A grid array metal ball is used to be electrically connected to the printed circuit board 20 to transmit the signal of the substrate 10 to the printed circuit board 20; a second substrate 22 is provided with an upper surface 24 and a lower surface 26, the second The lower surface 24 of the substrate 22 is fixed on the first surface 12 of the first substrate 10, and a groove 2 8 is formed with the first substrate 10; the integrated circuit 30 is a signal processing unit [such as, Digital Signal Processor, Micro Processor, or Central Processing Unit (CPU), etc.], which is provided on the substrate 10
89043.ptd 第9頁 47813689043.ptd Page 9 478136
五、發明說明(4) 之第一表面1 2上,且位於凹槽2 8内,藉由金屬線3 2以打線 方式電連接於基板1 0之訊號輸入端1 6上,如是,積體電路 3 0將與基板1 〇形成電連接·, 一影像感測晶片3 4,其係設置於第二基板2 2之上表面 2 4上,藉由金屬線3 6以打線方式電連接於基板丨〇之訊號輸 入端1 6,使影像感測晶片2 6與基板1 〇形成電連接,而將^ 像感測晶片2 6之號傳遞至基板1 〇。若積體電路3 〇為數位 吼號處理器(Digital Signal Processor),可用以將影像 感測晶片3 4之訊號予以處理,再傳遞至電路板2 〇上; 一凸緣層3 8為框形結構,其係設置於第一基板丨〇之第 一表面1 2,用以將積體電路30與影像感測晶片34予以包圍 住;及 一透光層40,係為透光玻璃,其係覆蓋於凸緣層 上’用以將影像感測晶片3 4及積體電路3 0密封住,使影像 感測晶片3 4可透過透光層4 0接收影像訊號,並將影像訊號 轉換為電訊號傳遞至第一基板丨〇上。V. Description of the invention (4) The first surface 12 is located in the groove 2 8 and is electrically connected to the signal input terminal 16 of the substrate 10 through a wire by means of a metal wire 32. If so, an integrated body The circuit 30 will be electrically connected to the substrate 10, an image sensing wafer 34, which is disposed on the upper surface 24 of the second substrate 22, and is electrically connected to the substrate by a metal wire 36. The signal input terminal 16 of 丨 〇 makes the image sensing chip 26 to be electrically connected to the substrate 10, and transmits the number of the image sensing chip 26 to the substrate 10. If the integrated circuit 30 is a digital signal processor (Digital Signal Processor), it can be used to process the signals of the image sensing chip 34 and pass it to the circuit board 20; a flange layer 38 is frame-shaped The structure is provided on the first surface 12 of the first substrate, and is used to surround the integrated circuit 30 and the image sensing chip 34; and a light-transmitting layer 40, which is a light-transmitting glass, is "Cover on the flange layer" is used to seal the image sensing chip 34 and the integrated circuit 30, so that the image sensing chip 34 can receive the image signal through the light transmitting layer 40 and convert the image signal into telecommunications The number is transferred to the first substrate.
請參閱圖二’為本發明之第二實施例,其中該第二基 板2 2之上表面2 4形成有訊號輸入端4 2,其下表面2 6係設置 於第一基板10之第一表面12上,而與第一基板10形成一凹 槽2 8,積體電路3 0係設置於第一基板丨〇之第一表面丨2上, 並位於凹槽2 8内’藉由金屬線3 2以打線方式電連接於第〆 基板1 0之訊號輸入端1 6上。 該影像感測晶片3 4係設於第二基板2 2之上表面2 4上, 藉由金屬線3 6以打線方式電連接於第二基板2 4之訊號輸入Please refer to FIG. 2 ′, which is a second embodiment of the present invention, wherein the upper surface 24 of the second substrate 22 is formed with a signal input terminal 4 2, and the lower surface 26 thereof is disposed on the first surface of the first substrate 10. 12 and a groove 28 is formed with the first substrate 10, the integrated circuit 3 0 is disposed on the first surface 丨 2 of the first substrate 丨 0 and is located in the groove 2 8 ′ by the metal wire 3 2 is electrically connected to the signal input terminal 16 of the third substrate 10 in a wired manner. The image sensing chip 34 is disposed on the upper surface 2 4 of the second substrate 2 2 and is electrically connected to the signal input of the second substrate 2 4 by a wire through a wire 36.
89043.ptd 第10頁 478136 五、發明說明 端4 2,而 該凸 表面24上 住。 該透 以將影像 片3 4可透 電訊號傳 請參 於第二基 電路30予 收影像訊 請茶 4 6,用以 晶片34與 透光層接 由於 光率較強 藉如 電路30整 1.將影像 使用基板 本。 ί.將影像 (5) 與第二基 緣層3 8為 ,用以將 光層4 0為 感測晶片 過透光層 遞至第二 閱圖三, 板2 2之上 以密封住 號,並將 閱圖四, 固定於第 積體電路 收影像訊 ,门形透 ,使得影 上之構造 合封裝於 感測晶片 1 0之材料 板2 2形成電連接。 框形結構,其係設置於 積體電路3 0與影像感測 透光玻璃, 3 4及積體電 4 0接收影像 基板2 2上。 其中該透光 表面24上, ,使影像感 影像訊號轉 透光層40為 二基板2 2之 3 0予以包覆 號。 明膠體之透 像感測晶片 組合,本發 一封裝體内 3 4與積體電 ,可有效降 其係覆蓋於 路3 0密封住 訊號’並將 層4 0為透明 並將影像感 測晶片3 4透 換為電訊號 门形透明膠 上表面2 4上 住,使影像 光層4 0厚度 3 4得以接收 明將影像感 ,其具有如 路3 0予以整 低影像感測 第二基板2 2之上 晶片3 4予以包圍 凸緣層3 8上,用 ’使影像感測晶 影像訊號轉換為 膠體,其係覆蓋 測晶片3 4及積體 過該透明膠體接 〇 體’具有支樓柱 ,而將影像感測 感測晶片3 4透過 較薄,因而其透 較強之影像。 測晶片3 4與積體 下之優點: 合封裝,可減少 產品之製造成 感測晶片3 4與積體電路3 0予以整合封裝,可降低89043.ptd Page 10 478136 V. Description of the invention Terminal 4 2 and the convex surface 24 are on. The transparent transmission of the image film 3 4 can be transmitted to the second base circuit 30 to receive the video message 4 6 for the chip 34 and the light-transmitting layer. Because the light rate is strong, the circuit 30 can be used as a whole. Use the substrate for the image. ί. The image (5) and the second base edge layer 38 are used to pass the light layer 40 as a sensing wafer through the light-transmitting layer to the second picture 3, and the plate 2 2 is sealed with a number, And see Figure 4. It is fixed to the first integrated circuit to receive the image and the door is transparent, so that the structure on the image is combined with the material plate 22 of the sensing chip 10 to form an electrical connection. The frame structure is arranged on the integrated circuit 30 and the image sensing transparent glass 34, and the integrated circuit 40 receives the image on the substrate 22. Wherein, the light-transmitting surface 24 converts the image-sensing image signal into a light-transmitting layer 40 that is coated on the two substrates 22-30. The gelatin transmissive image sensor chip combination, in this package, 3 4 and the integrated electricity, can effectively reduce its coverage on the road 30, seal the signal, and make the layer 40 transparent and the image sensor chip. 3 4 is transparently switched to the upper surface of the gate-shaped transparent glue for signal signal 2 4 so that the image light layer 40 has a thickness of 3 4 and can receive the image of the image. It has a low-level image sensing second substrate 2 as the road 30 2 The upper wafer 3 4 is surrounded by the flange layer 38, and the image sensor crystal image signal is converted into a colloid, which covers the test wafer 34 and the integrated body passes through the transparent colloid and has a supporting pillar. , And the image sensing chip 3 4 is transmitted through a thinner, so that it transmits a stronger image. The advantages of the test chip 3 4 and the integrated product: combined packaging can reduce the production of the product. The sensor chip 3 4 and the integrated circuit 30 are integrated and packaged, which can reduce the
89043.ptd 第11頁 478136 五、發明說明(6) . 影像感測產品之面積大小。 3 .將影像感測晶片3 4與積體電路3 0予以整合封裝,因僅有 一封裝體,因此測試治具僅須一套,可降低測試成本。 4 .將影像感測晶片3 4與積體電路3 0予以整合封裝,因此兩 個晶片僅需一道封裝製成,可有效降低封裝成本。 在較佳實施例之詳細說明中所提出之具體實施例僅為 - 了易於說明本發明之技術内容,並非將本發明狹義地限制 - 於實施例,凡依本發明之精神及以下申請專利範圍之情況 所作種種變化實施均屬本發明之範圍。89043.ptd Page 11 478136 V. Description of the Invention (6). Area of image sensing products. 3. The image sensor chip 34 and the integrated circuit 30 are integrated and packaged. Because there is only one package, only one set of test fixture is needed, which can reduce the test cost. 4. The image sensor chip 34 and the integrated circuit 30 are integrated and packaged, so the two chips need only be packaged in one package, which can effectively reduce the packaging cost. The specific embodiments provided in the detailed description of the preferred embodiments are merely-for easy explanation of the technical content of the present invention, and are not intended to limit the present invention in a narrow sense-to the embodiments. The implementation of various changes in the circumstances is within the scope of the present invention.
89043.ptd 第12頁 478136 圖式簡單說明 圖一為本發明影像感測器之堆疊封裝構造的第一實施例。 圖二為本發明影像感測器之堆疊封裝構造的第二實施例。 圖三為本發明影像感測器之堆疊封裝構造的第三實施例。 圖四為本發明影像感測器之堆疊封裝構造的第四實施例。 圖號說明 第一基板 10 第一表面 12 第二表面 14 訊號輸入端 16 球柵陣列金屬球1 8 印刷電路板 20 第二基板 22 上表面 24 下表面 26 凹槽 2 8 積體電路 30 金屬線 32 影像感測晶片 34 金屬線 36 凸緣層 38 透光層 40 訊號輸入端 42 支撐柱 4689043.ptd Page 12 478136 Brief Description of Drawings Figure 1 shows the first embodiment of the stacked package structure of the image sensor of the present invention. FIG. 2 is a second embodiment of a stacked package structure of an image sensor of the present invention. FIG. 3 is a third embodiment of the stacked package structure of the image sensor of the present invention. FIG. 4 is a fourth embodiment of the stacked package structure of the image sensor of the present invention. The drawing illustrates the first substrate 10 first surface 12 second surface 14 signal input terminal 16 ball grid array metal ball 1 8 printed circuit board 20 second substrate 22 upper surface 24 lower surface 26 groove 2 8 integrated circuit 30 metal wire 32 image sensing chip 34 metal wire 36 flange layer 38 light transmitting layer 40 signal input terminal 42 support post 46
89043.ptd 第13頁89043.ptd Page 13
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Cited By (4)
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US7597928B2 (en) | 2003-02-27 | 2009-10-06 | Eternal Chemical Co., Ltd. | Material composition for packaging of light-sensitive components and method of using the same |
US7964952B2 (en) | 2005-05-31 | 2011-06-21 | Stats Chippac Ltd. | Stacked semiconductor package assembly having hollowed substrate |
CN102646692A (en) * | 2011-02-18 | 2012-08-22 | 佳能株式会社 | Imaging apparatus and imaging system |
TWI642150B (en) * | 2017-08-15 | 2018-11-21 | 勝麗國際股份有限公司 | Stack type sensor package structure |
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2000
- 2000-12-29 TW TW89128464A patent/TW478136B/en not_active IP Right Cessation
Cited By (6)
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US7597928B2 (en) | 2003-02-27 | 2009-10-06 | Eternal Chemical Co., Ltd. | Material composition for packaging of light-sensitive components and method of using the same |
US7964952B2 (en) | 2005-05-31 | 2011-06-21 | Stats Chippac Ltd. | Stacked semiconductor package assembly having hollowed substrate |
CN102646692A (en) * | 2011-02-18 | 2012-08-22 | 佳能株式会社 | Imaging apparatus and imaging system |
US8796607B2 (en) | 2011-02-18 | 2014-08-05 | Canon Kabushiki Kaisha | Imaging apparatus and imaging system |
CN102646692B (en) * | 2011-02-18 | 2015-10-21 | 佳能株式会社 | Imaging device and imaging system |
TWI642150B (en) * | 2017-08-15 | 2018-11-21 | 勝麗國際股份有限公司 | Stack type sensor package structure |
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