KR101076598B1 - 속이 빈 기판을 포함하는 적층 반도체 패키지 어셈블리 - Google Patents
속이 빈 기판을 포함하는 적층 반도체 패키지 어셈블리 Download PDFInfo
- Publication number
- KR101076598B1 KR101076598B1 KR1020060049332A KR20060049332A KR101076598B1 KR 101076598 B1 KR101076598 B1 KR 101076598B1 KR 1020060049332 A KR1020060049332 A KR 1020060049332A KR 20060049332 A KR20060049332 A KR 20060049332A KR 101076598 B1 KR101076598 B1 KR 101076598B1
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- South Korea
- Prior art keywords
- package
- substrate
- die
- mold cap
- assembly
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
- H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
- H10W70/68—Shapes or dispositions thereof
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W74/00—Encapsulations, e.g. protective coatings
- H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
- H10W74/111—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed
- H10W74/114—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed by a substrate and the encapsulations
- H10W74/117—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed by a substrate and the encapsulations the substrate having spherical bumps for external connection
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
- H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
- H10W70/68—Shapes or dispositions thereof
- H10W70/681—Shapes or dispositions thereof comprising holes not having chips therein, e.g. for outgassing, underfilling or bond wire passage
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
- H10W72/072—Connecting or disconnecting of bump connectors
- H10W72/07251—Connecting or disconnecting of bump connectors characterised by changes in properties of the bump connectors during connecting
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
- H10W72/073—Connecting or disconnecting of die-attach connectors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
- H10W72/075—Connecting or disconnecting of bond wires
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
- H10W72/59—Bond pads specially adapted therefor
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/851—Dispositions of multiple connectors or interconnections
- H10W72/874—On different surfaces
- H10W72/884—Die-attach connectors and bond wires
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W74/00—Encapsulations, e.g. protective coatings
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W74/00—Encapsulations, e.g. protective coatings
- H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
- H10W74/131—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being only partially enclosed
- H10W74/142—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being only partially enclosed the encapsulations exposing the passive side of the semiconductor body
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/20—Configurations of stacked chips
- H10W90/28—Configurations of stacked chips the stacked chips having different sizes, e.g. chip stacks having a pyramidal shape
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/20—Configurations of stacked chips
- H10W90/291—Configurations of stacked chips characterised by containers, encapsulations, or other housings for the stacked chips
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
- H10W90/722—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between stacked chips
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
- H10W90/732—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between stacked chips
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
- H10W90/734—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked insulating package substrate, interposer or RDL
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
- H10W90/754—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked insulating package substrate, interposer or RDL
Landscapes
- Wire Bonding (AREA)
- Lead Frames For Integrated Circuits (AREA)
- Combinations Of Printed Boards (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Applications Claiming Priority (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US68628305P | 2005-05-31 | 2005-05-31 | |
| US60/686,283 | 2005-05-31 | ||
| US11/420,873 US7528474B2 (en) | 2005-05-31 | 2006-05-30 | Stacked semiconductor package assembly having hollowed substrate |
| US11/420,873 | 2006-05-30 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR20060125582A KR20060125582A (ko) | 2006-12-06 |
| KR101076598B1 true KR101076598B1 (ko) | 2011-10-24 |
Family
ID=37462324
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1020060049332A Active KR101076598B1 (ko) | 2005-05-31 | 2006-06-01 | 속이 빈 기판을 포함하는 적층 반도체 패키지 어셈블리 |
Country Status (4)
| Country | Link |
|---|---|
| US (2) | US7528474B2 (https=) |
| JP (1) | JP4484846B2 (https=) |
| KR (1) | KR101076598B1 (https=) |
| TW (1) | TWI327360B (https=) |
Families Citing this family (76)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI245377B (en) * | 2004-11-05 | 2005-12-11 | Advanced Semiconductor Eng | Staggered wirebonding configuration |
| US20070170599A1 (en) * | 2006-01-24 | 2007-07-26 | Masazumi Amagai | Flip-attached and underfilled stacked semiconductor devices |
| KR100836663B1 (ko) * | 2006-02-16 | 2008-06-10 | 삼성전기주식회사 | 캐비티가 형성된 패키지 온 패키지 및 그 제조 방법 |
| US20070216008A1 (en) * | 2006-03-20 | 2007-09-20 | Gerber Mark A | Low profile semiconductor package-on-package |
| US7608921B2 (en) * | 2006-12-07 | 2009-10-27 | Stats Chippac, Inc. | Multi-layer semiconductor package |
| JP2008166527A (ja) * | 2006-12-28 | 2008-07-17 | Spansion Llc | 半導体装置およびその製造方法 |
| US20080258286A1 (en) * | 2007-04-23 | 2008-10-23 | Texas Instruments Incorporated | High Input/Output, Low Profile Package-On-Package Semiconductor System |
| US8409920B2 (en) * | 2007-04-23 | 2013-04-02 | Stats Chippac Ltd. | Integrated circuit package system for package stacking and method of manufacture therefor |
| KR100882516B1 (ko) * | 2007-05-29 | 2009-02-09 | 엠텍비젼 주식회사 | 적층형 패키지 및 이의 제조 방법 |
| KR20090012933A (ko) * | 2007-07-31 | 2009-02-04 | 삼성전자주식회사 | 반도체 패키지, 스택 모듈, 카드, 시스템 및 반도체패키지의 제조 방법 |
| US7799608B2 (en) * | 2007-08-01 | 2010-09-21 | Advanced Micro Devices, Inc. | Die stacking apparatus and method |
| KR101329355B1 (ko) * | 2007-08-31 | 2013-11-20 | 삼성전자주식회사 | 적층형 반도체 패키지, 그 형성방법 및 이를 구비하는전자장치 |
| US8258614B2 (en) * | 2007-11-12 | 2012-09-04 | Stats Chippac Ltd. | Integrated circuit package system with package integration |
| US7709944B2 (en) * | 2007-12-18 | 2010-05-04 | Stats Chippac Ltd. | Integrated circuit package system with package integration |
| JP2009188325A (ja) * | 2008-02-08 | 2009-08-20 | Nec Electronics Corp | 半導体パッケージおよび半導体パッケージの製造方法 |
| US8193624B1 (en) * | 2008-02-25 | 2012-06-05 | Amkor Technology, Inc. | Semiconductor device having improved contact interface reliability and method therefor |
| US8247894B2 (en) * | 2008-03-24 | 2012-08-21 | Stats Chippac Ltd. | Integrated circuit package system with step mold recess |
| US7956449B2 (en) * | 2008-06-25 | 2011-06-07 | Stats Chippac Ltd. | Stacked integrated circuit package system |
| US8270176B2 (en) * | 2008-08-08 | 2012-09-18 | Stats Chippac Ltd. | Exposed interconnect for a package on package system |
| US8531043B2 (en) * | 2008-09-23 | 2013-09-10 | Stats Chippac Ltd. | Planar encapsulation and mold cavity package in package system |
| US20100102457A1 (en) * | 2008-10-28 | 2010-04-29 | Topacio Roden R | Hybrid Semiconductor Chip Package |
| KR20100095268A (ko) * | 2009-02-20 | 2010-08-30 | 삼성전자주식회사 | 반도체 패키지 및 그 제조 방법 |
| KR101583354B1 (ko) * | 2009-06-01 | 2016-01-07 | 삼성전자주식회사 | 반도체 소자 패키지의 형성방법 |
| US20100327419A1 (en) | 2009-06-26 | 2010-12-30 | Sriram Muthukumar | Stacked-chip packages in package-on-package apparatus, methods of assembling same, and systems containing same |
| US8125066B1 (en) * | 2009-07-13 | 2012-02-28 | Altera Corporation | Package on package configurations with embedded solder balls and interposal layer |
| US8383457B2 (en) * | 2010-09-03 | 2013-02-26 | Stats Chippac, Ltd. | Semiconductor device and method of forming interposer frame over semiconductor die to provide vertical interconnect |
| USRE48111E1 (en) | 2009-08-21 | 2020-07-21 | JCET Semiconductor (Shaoxing) Co. Ltd. | Semiconductor device and method of forming interposer frame over semiconductor die to provide vertical interconnect |
| KR101665556B1 (ko) * | 2009-11-19 | 2016-10-13 | 삼성전자 주식회사 | 멀티 피치 볼 랜드를 갖는 반도체 패키지 |
| US8404518B2 (en) * | 2009-12-13 | 2013-03-26 | Stats Chippac Ltd. | Integrated circuit packaging system with package stacking and method of manufacture thereof |
| US8299633B2 (en) * | 2009-12-21 | 2012-10-30 | Advanced Micro Devices, Inc. | Semiconductor chip device with solder diffusion protection |
| US8482111B2 (en) | 2010-07-19 | 2013-07-09 | Tessera, Inc. | Stackable molded microelectronic packages |
| KR101119348B1 (ko) * | 2010-07-23 | 2012-03-07 | 삼성전기주식회사 | 반도체 모듈 및 그 제조방법 |
| US8481420B2 (en) * | 2011-03-15 | 2013-07-09 | Stats Chippac Ltd. | Integrated circuit packaging system with lead frame stacking module and method of manufacture thereof |
| KR101128063B1 (ko) | 2011-05-03 | 2012-04-23 | 테세라, 인코포레이티드 | 캡슐화 층의 표면에 와이어 본드를 구비하는 패키지 적층형 어셈블리 |
| US8836136B2 (en) | 2011-10-17 | 2014-09-16 | Invensas Corporation | Package-on-package assembly with wire bond vias |
| US10163877B2 (en) * | 2011-11-07 | 2018-12-25 | Taiwan Semiconductor Manufacturing Co., Ltd. | System in package process flow |
| US9881898B2 (en) * | 2011-11-07 | 2018-01-30 | Taiwan Semiconductor Manufacturing Co.,Ltd. | System in package process flow |
| KR101818507B1 (ko) | 2012-01-11 | 2018-01-15 | 삼성전자 주식회사 | 반도체 패키지 |
| US9263412B2 (en) | 2012-03-09 | 2016-02-16 | Taiwan Semiconductor Manufacturing Company, Ltd. | Packaging methods and packaged semiconductor devices |
| US20130234317A1 (en) | 2012-03-09 | 2013-09-12 | Taiwan Semiconductor Manufacturing Company, Ltd. | Packaging Methods and Packaged Semiconductor Devices |
| US8835228B2 (en) | 2012-05-22 | 2014-09-16 | Invensas Corporation | Substrate-less stackable package with wire-bond interconnect |
| US9502390B2 (en) | 2012-08-03 | 2016-11-22 | Invensas Corporation | BVA interposer |
| US8546932B1 (en) * | 2012-08-15 | 2013-10-01 | Apple Inc. | Thin substrate PoP structure |
| US8963311B2 (en) | 2012-09-26 | 2015-02-24 | Apple Inc. | PoP structure with electrically insulating material between packages |
| CN103811362A (zh) * | 2012-11-08 | 2014-05-21 | 宏启胜精密电子(秦皇岛)有限公司 | 层叠封装结构及其制作方法 |
| US9704780B2 (en) * | 2012-12-11 | 2017-07-11 | STATS ChipPAC, Pte. Ltd. | Semiconductor device and method of forming low profile fan-out package with vertical interconnection units |
| US9484327B2 (en) * | 2013-03-15 | 2016-11-01 | Qualcomm Incorporated | Package-on-package structure with reduced height |
| US9167710B2 (en) | 2013-08-07 | 2015-10-20 | Invensas Corporation | Embedded packaging with preformed vias |
| KR102229202B1 (ko) | 2013-11-07 | 2021-03-17 | 삼성전자주식회사 | 트렌치 형태의 오프닝을 갖는 반도체 패키지 및 그 제조방법 |
| US9583456B2 (en) | 2013-11-22 | 2017-02-28 | Invensas Corporation | Multiple bond via arrays of different wire heights on a same substrate |
| US9583411B2 (en) | 2014-01-17 | 2017-02-28 | Invensas Corporation | Fine pitch BVA using reconstituted wafer with area array accessible for testing |
| US10381326B2 (en) | 2014-05-28 | 2019-08-13 | Invensas Corporation | Structure and method for integrated circuits packaging with increased density |
| US10032662B2 (en) | 2014-10-08 | 2018-07-24 | Taiwan Semiconductor Manufacturing Company | Packaged semiconductor devices and packaging methods thereof |
| US9888579B2 (en) | 2015-03-05 | 2018-02-06 | Invensas Corporation | Pressing of wire bond wire tips to provide bent-over tips |
| US9704836B2 (en) | 2015-03-16 | 2017-07-11 | Mediatek Inc. | Semiconductor package assembly |
| US9502372B1 (en) | 2015-04-30 | 2016-11-22 | Invensas Corporation | Wafer-level packaging using wire bond wires in place of a redistribution layer |
| US9490222B1 (en) | 2015-10-12 | 2016-11-08 | Invensas Corporation | Wire bond wires for interference shielding |
| US10490528B2 (en) | 2015-10-12 | 2019-11-26 | Invensas Corporation | Embedded wire bond wires |
| US10332854B2 (en) | 2015-10-23 | 2019-06-25 | Invensas Corporation | Anchoring structure of fine pitch bva |
| US10181457B2 (en) | 2015-10-26 | 2019-01-15 | Invensas Corporation | Microelectronic package for wafer-level chip scale packaging with fan-out |
| US10043779B2 (en) | 2015-11-17 | 2018-08-07 | Invensas Corporation | Packaged microelectronic device for a package-on-package device |
| US9984992B2 (en) | 2015-12-30 | 2018-05-29 | Invensas Corporation | Embedded wire bond wires for vertical integration with separate surface mount and wire bond mounting surfaces |
| WO2017160231A1 (en) * | 2016-03-14 | 2017-09-21 | Agency For Science, Technology And Research | Semiconductor package and method of forming the same |
| US11562955B2 (en) | 2016-04-27 | 2023-01-24 | Intel Corporation | High density multiple die structure |
| US9935075B2 (en) | 2016-07-29 | 2018-04-03 | Invensas Corporation | Wire bonding method and apparatus for electromagnetic interference shielding |
| US20180053753A1 (en) * | 2016-08-16 | 2018-02-22 | Freescale Semiconductor, Inc. | Stackable molded packages and methods of manufacture thereof |
| CN210692526U (zh) * | 2016-08-31 | 2020-06-05 | 株式会社村田制作所 | 电路模块 |
| US10388637B2 (en) * | 2016-12-07 | 2019-08-20 | STATS ChipPAC Pte. Ltd. | Semiconductor device and method of forming a 3D interposer system-in-package module |
| US10797039B2 (en) | 2016-12-07 | 2020-10-06 | STATS ChipPAC Pte. Ltd. | Semiconductor device and method of forming a 3D interposer system-in-package module |
| KR102666151B1 (ko) | 2016-12-16 | 2024-05-17 | 삼성전자주식회사 | 반도체 패키지 |
| US10299368B2 (en) | 2016-12-21 | 2019-05-21 | Invensas Corporation | Surface integrated waveguides and circuit structures therefor |
| US10510721B2 (en) | 2017-08-11 | 2019-12-17 | Advanced Micro Devices, Inc. | Molded chip combination |
| US10593628B2 (en) | 2018-04-24 | 2020-03-17 | Advanced Micro Devices, Inc. | Molded die last chip combination |
| US10672712B2 (en) | 2018-07-30 | 2020-06-02 | Advanced Micro Devices, Inc. | Multi-RDL structure packages and methods of fabricating the same |
| EP3644351A1 (en) * | 2018-10-26 | 2020-04-29 | Nagravision SA | Protection of wire-bond ball grid array packaged integrated circuit chips |
| US10923430B2 (en) | 2019-06-30 | 2021-02-16 | Advanced Micro Devices, Inc. | High density cross link die with polymer routing layer |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH05183103A (ja) * | 1992-01-07 | 1993-07-23 | Fujitsu Ltd | 半導体装置及び半導体装置ユニット |
| JPH0982841A (ja) * | 1995-07-05 | 1997-03-28 | Anam Ind Co Inc | 熱放出特性及び脱湿性を向上させたボールグリッドアレイ半導体パッケージ |
| JPH1070233A (ja) * | 1996-07-23 | 1998-03-10 | Internatl Business Mach Corp <Ibm> | マルチ電子デバイス・パッケージ |
| JP2004134478A (ja) * | 2002-10-09 | 2004-04-30 | Sony Corp | 半導体パッケージおよびその製造方法 |
Family Cites Families (32)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE3911711A1 (de) * | 1989-04-10 | 1990-10-11 | Ibm | Modul-aufbau mit integriertem halbleiterchip und chiptraeger |
| JPH07169872A (ja) * | 1993-12-13 | 1995-07-04 | Fujitsu Ltd | 半導体装置及びその製造方法 |
| TW396571B (en) | 1998-12-11 | 2000-07-01 | Sampo Semiconductor Corp | Multi-die semiconductor package |
| JP3575001B2 (ja) * | 1999-05-07 | 2004-10-06 | アムコー テクノロジー コリア インコーポレーティド | 半導体パッケージ及びその製造方法 |
| JP3398721B2 (ja) * | 1999-05-20 | 2003-04-21 | アムコー テクノロジー コリア インコーポレーティド | 半導体パッケージ及びその製造方法 |
| TW478136B (en) | 2000-12-29 | 2002-03-01 | Kingpak Tech Inc | Stacked package structure of image sensor |
| US6737750B1 (en) * | 2001-12-07 | 2004-05-18 | Amkor Technology, Inc. | Structures for improving heat dissipation in stacked semiconductor packages |
| US7138711B2 (en) * | 2002-06-17 | 2006-11-21 | Micron Technology, Inc. | Intrinsic thermal enhancement for FBGA package |
| JP2004128155A (ja) * | 2002-10-01 | 2004-04-22 | Renesas Technology Corp | 半導体パッケージ |
| TW567566B (en) * | 2002-10-25 | 2003-12-21 | Siliconware Precision Industries Co Ltd | Window-type ball grid array semiconductor package with lead frame as chip carrier and method for fabricating the same |
| KR100498470B1 (ko) * | 2002-12-26 | 2005-07-01 | 삼성전자주식회사 | 적층형 반도체 패키지 및 그 제조방법 |
| US7126210B2 (en) * | 2003-04-02 | 2006-10-24 | Stmicroelectronics, Inc. | System and method for venting pressure from an integrated circuit package sealed with a lid |
| TWI231977B (en) * | 2003-04-25 | 2005-05-01 | Advanced Semiconductor Eng | Multi-chips package |
| TWI231983B (en) * | 2003-04-25 | 2005-05-01 | Advanced Semiconductor Eng | Multi-chips stacked package |
| US7015571B2 (en) * | 2003-11-12 | 2006-03-21 | Advanced Semiconductor Engineering, Inc. | Multi-chips module assembly package |
| TWI239611B (en) * | 2004-04-19 | 2005-09-11 | Advanced Semiconductor Eng | Multi chip module with embedded package configuration and method for manufacturing the same |
| JP4433298B2 (ja) * | 2004-12-16 | 2010-03-17 | パナソニック株式会社 | 多段構成半導体モジュール |
| JP4504798B2 (ja) * | 2004-12-16 | 2010-07-14 | パナソニック株式会社 | 多段構成半導体モジュール |
| KR100652397B1 (ko) * | 2005-01-17 | 2006-12-01 | 삼성전자주식회사 | 매개 인쇄회로기판을 사용하는 적층형 반도체 패키지 |
| US7968371B2 (en) * | 2005-02-01 | 2011-06-28 | Stats Chippac Ltd. | Semiconductor package system with cavity substrate |
| US7279786B2 (en) * | 2005-02-04 | 2007-10-09 | Stats Chippac Ltd. | Nested integrated circuit package on package system |
| US8089143B2 (en) * | 2005-02-10 | 2012-01-03 | Stats Chippac Ltd. | Integrated circuit package system using interposer |
| US7875966B2 (en) * | 2005-02-14 | 2011-01-25 | Stats Chippac Ltd. | Stacked integrated circuit and package system |
| JP4304163B2 (ja) * | 2005-03-09 | 2009-07-29 | パナソニック株式会社 | 撮像モジュールおよびその製造方法 |
| US7344915B2 (en) * | 2005-03-14 | 2008-03-18 | Advanced Semiconductor Engineering, Inc. | Method for manufacturing a semiconductor package with a laminated chip cavity |
| KR100836663B1 (ko) * | 2006-02-16 | 2008-06-10 | 삼성전기주식회사 | 캐비티가 형성된 패키지 온 패키지 및 그 제조 방법 |
| JP2007250764A (ja) * | 2006-03-15 | 2007-09-27 | Elpida Memory Inc | 半導体装置及びその製造方法 |
| US20070216008A1 (en) * | 2006-03-20 | 2007-09-20 | Gerber Mark A | Low profile semiconductor package-on-package |
| TWI315574B (en) * | 2006-07-28 | 2009-10-01 | Advanced Semiconductor Eng | Semiconductor package and method for manufacturing the same |
| US7679002B2 (en) * | 2006-08-22 | 2010-03-16 | Texas Instruments Incorporated | Semiconductive device having improved copper density for package-on-package applications |
| KR100744151B1 (ko) * | 2006-09-11 | 2007-08-01 | 삼성전자주식회사 | 솔더 넌-엣 불량을 억제하는 구조의 패키지 온 패키지 |
| US9236319B2 (en) * | 2008-02-29 | 2016-01-12 | Stats Chippac Ltd. | Stacked integrated circuit package system |
-
2006
- 2006-05-30 US US11/420,873 patent/US7528474B2/en active Active
- 2006-05-31 JP JP2006152548A patent/JP4484846B2/ja active Active
- 2006-06-01 KR KR1020060049332A patent/KR101076598B1/ko active Active
- 2006-06-01 TW TW095119408A patent/TWI327360B/zh active
-
2009
- 2009-03-24 US US12/409,489 patent/US7964952B2/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH05183103A (ja) * | 1992-01-07 | 1993-07-23 | Fujitsu Ltd | 半導体装置及び半導体装置ユニット |
| JPH0982841A (ja) * | 1995-07-05 | 1997-03-28 | Anam Ind Co Inc | 熱放出特性及び脱湿性を向上させたボールグリッドアレイ半導体パッケージ |
| JPH1070233A (ja) * | 1996-07-23 | 1998-03-10 | Internatl Business Mach Corp <Ibm> | マルチ電子デバイス・パッケージ |
| JP2004134478A (ja) * | 2002-10-09 | 2004-04-30 | Sony Corp | 半導体パッケージおよびその製造方法 |
Also Published As
| Publication number | Publication date |
|---|---|
| US20090179319A1 (en) | 2009-07-16 |
| JP4484846B2 (ja) | 2010-06-16 |
| US7528474B2 (en) | 2009-05-05 |
| TW200703600A (en) | 2007-01-16 |
| US20060267175A1 (en) | 2006-11-30 |
| JP2008226863A (ja) | 2008-09-25 |
| KR20060125582A (ko) | 2006-12-06 |
| TWI327360B (en) | 2010-07-11 |
| US7964952B2 (en) | 2011-06-21 |
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