KR101066642B1 - 인쇄회로기판 제조방법 - Google Patents
인쇄회로기판 제조방법 Download PDFInfo
- Publication number
- KR101066642B1 KR101066642B1 KR1020090081211A KR20090081211A KR101066642B1 KR 101066642 B1 KR101066642 B1 KR 101066642B1 KR 1020090081211 A KR1020090081211 A KR 1020090081211A KR 20090081211 A KR20090081211 A KR 20090081211A KR 101066642 B1 KR101066642 B1 KR 101066642B1
- Authority
- KR
- South Korea
- Prior art keywords
- printed circuit
- plating
- circuit board
- mold gate
- lead wire
- Prior art date
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Classifications
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/24—Reinforcing the conductive pattern
- H05K3/241—Reinforcing the conductive pattern characterised by the electroplating method; means therefor, e.g. baths or apparatus
- H05K3/242—Reinforcing the conductive pattern characterised by the electroplating method; means therefor, e.g. baths or apparatus characterised by using temporary conductors on the printed circuit for electrically connecting areas which are to be electroplated
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49838—Geometry or layout
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/18—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/09218—Conductive traces
- H05K2201/09263—Meander
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/17—Post-manufacturing processes
- H05K2203/175—Configurations of connections suitable for easy deletion, e.g. modifiable circuits or temporary conductors for electroplating; Processes for deleting connections
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0011—Working of insulating substrates or insulating layers
- H05K3/0044—Mechanical working of the substrate, e.g. drilling or punching
- H05K3/0052—Depaneling, i.e. dividing a panel into circuit boards; Working of the edges of circuit boards
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/28—Applying non-metallic protective coatings
- H05K3/284—Applying non-metallic protective coatings for encapsulating mounted components
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Geometry (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Structure Of Printed Boards (AREA)
- Manufacturing Of Printed Wiring (AREA)
Abstract
Description
Claims (4)
- 유닛영역과, 상기 유닛영역에 도금을 수행하기 위한 도금인입선, 및 상기 유닛영역의 외곽에 배치되는 몰드게이트를 포함하는 인쇄회로기판 스트립으로서,상기 도금인입선과 상기 몰드게이트는, 상기 도금인입선과 상기 몰드게이트 사이의 저항값을 증가시켜 상기 몰드게이트에 인가되는 전류를 감소시키도록 복수 회 절곡된 형상의 리드라인에 의해 전기적으로 연결되는 것을 특징으로 하는 인쇄회로기판 스트립.
- 제1항에 있어서,상기 리드라인은 복수 개인 것을 특징으로 하는 인쇄회로기판 스트립.
- 복수의 스트립이 마련되는 스트립영역과, 상기 스트립영역에 도금을 수행하기 위한 도금인입선, 및 상기 스트립영역의 외곽에 마련되는 더미영역을 포함하는 박형 인쇄회로기판 패널로서,상기 더미영역에는 강성 확보를 위한 금속층이 마련되고,상기 금속층의 적어도 일부는 이송 시 클램핑을 위해 노출되며,상기 도금인입선과 상기 금속층의 노출된 일부는, 상기 도금인입선과 상기 금속층 사이의 저항값을 증가시켜 상기 금속층에 인가되는 전류를 감소시키도록 복수 회 절곡된 형상의 리드라인에 의해 전기적으로 연결되는 것을 특징으로 하는 인쇄회로기판 패널.
- 제3항에 있어서,상기 리드라인은 복수 개인 것을 특징으로 하는 인쇄회로기판 패널.
Priority Applications (6)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020090081211A KR101066642B1 (ko) | 2009-08-31 | 2009-08-31 | 인쇄회로기판 제조방법 |
US12/761,828 US8253032B2 (en) | 2009-08-31 | 2010-04-16 | Printed circuit board strip and panel |
CN2010101595641A CN102005427B (zh) | 2009-08-31 | 2010-04-27 | 印刷电路板带和面板 |
TW099113532A TWI395526B (zh) | 2009-08-31 | 2010-04-28 | 印刷電路板帶與印刷電路板盤 |
JP2010108483A JP5323763B2 (ja) | 2009-08-31 | 2010-05-10 | 印刷回路基板のストリップ及びパネル |
JP2013056944A JP5588035B2 (ja) | 2009-08-31 | 2013-03-19 | 印刷回路基板のパネル |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020090081211A KR101066642B1 (ko) | 2009-08-31 | 2009-08-31 | 인쇄회로기판 제조방법 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR20110023373A KR20110023373A (ko) | 2011-03-08 |
KR101066642B1 true KR101066642B1 (ko) | 2011-09-22 |
Family
ID=43623161
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1020090081211A KR101066642B1 (ko) | 2009-08-31 | 2009-08-31 | 인쇄회로기판 제조방법 |
Country Status (5)
Country | Link |
---|---|
US (1) | US8253032B2 (ko) |
JP (2) | JP5323763B2 (ko) |
KR (1) | KR101066642B1 (ko) |
CN (1) | CN102005427B (ko) |
TW (1) | TWI395526B (ko) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20150135003A (ko) * | 2014-05-23 | 2015-12-02 | 해성디에스 주식회사 | 반도체칩 실장용 인쇄회로기판 |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102376673A (zh) * | 2010-08-06 | 2012-03-14 | 南亚电路板股份有限公司 | 封装基板及其形成方法 |
CN103046031B (zh) * | 2012-12-11 | 2014-08-13 | 胜宏科技(惠州)股份有限公司 | 一种线路板电镀金方法 |
KR20140108865A (ko) | 2013-03-04 | 2014-09-15 | 삼성전자주식회사 | 패키지 기판, 패키지 기판의 제조 방법 및 패키지 기판을 포함하는 반도체 패키지 |
JP7003012B2 (ja) * | 2018-08-10 | 2022-02-04 | 日東電工株式会社 | 配線回路基板集合体シートおよびその製造方法 |
CN111668111B (zh) * | 2019-03-08 | 2021-09-21 | 矽磐微电子(重庆)有限公司 | 半导体封装方法 |
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KR20090054817A (ko) * | 2007-11-27 | 2009-06-01 | 삼성전기주식회사 | 인쇄회로기판 |
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2009
- 2009-08-31 KR KR1020090081211A patent/KR101066642B1/ko active IP Right Grant
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2010
- 2010-04-16 US US12/761,828 patent/US8253032B2/en active Active
- 2010-04-27 CN CN2010101595641A patent/CN102005427B/zh active Active
- 2010-04-28 TW TW099113532A patent/TWI395526B/zh active
- 2010-05-10 JP JP2010108483A patent/JP5323763B2/ja not_active Expired - Fee Related
-
2013
- 2013-03-19 JP JP2013056944A patent/JP5588035B2/ja not_active Expired - Fee Related
Patent Citations (4)
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JPH0851258A (ja) * | 1994-08-05 | 1996-02-20 | Sharp Corp | プリント配線基板のダミーパターン |
JP2005209761A (ja) | 2004-01-21 | 2005-08-04 | Sumitomo Metal Electronics Devices Inc | 多数個取り配線基板 |
KR20070118349A (ko) * | 2006-06-12 | 2007-12-17 | 삼성전기주식회사 | 인쇄회로기판의 도금선 형성 방법 |
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Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20150135003A (ko) * | 2014-05-23 | 2015-12-02 | 해성디에스 주식회사 | 반도체칩 실장용 인쇄회로기판 |
KR102211089B1 (ko) * | 2014-05-23 | 2021-02-02 | 해성디에스 주식회사 | 반도체칩 실장용 인쇄회로기판 |
Also Published As
Publication number | Publication date |
---|---|
TW201108896A (en) | 2011-03-01 |
JP5588035B2 (ja) | 2014-09-10 |
US20110048784A1 (en) | 2011-03-03 |
CN102005427B (zh) | 2012-09-19 |
TWI395526B (zh) | 2013-05-01 |
KR20110023373A (ko) | 2011-03-08 |
CN102005427A (zh) | 2011-04-06 |
JP5323763B2 (ja) | 2013-10-23 |
US8253032B2 (en) | 2012-08-28 |
JP2011054930A (ja) | 2011-03-17 |
JP2013118418A (ja) | 2013-06-13 |
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