KR100918779B1 - 수직형 대체 게이트 트랜지스터들과 양립할 수 있는바이폴라 접합 트랜지스터 - Google Patents

수직형 대체 게이트 트랜지스터들과 양립할 수 있는바이폴라 접합 트랜지스터 Download PDF

Info

Publication number
KR100918779B1
KR100918779B1 KR1020020056476A KR20020056476A KR100918779B1 KR 100918779 B1 KR100918779 B1 KR 100918779B1 KR 1020020056476 A KR1020020056476 A KR 1020020056476A KR 20020056476 A KR20020056476 A KR 20020056476A KR 100918779 B1 KR100918779 B1 KR 100918779B1
Authority
KR
South Korea
Prior art keywords
doped
region
layer
material layer
conductivity type
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
KR1020020056476A
Other languages
English (en)
Korean (ko)
Other versions
KR20030024626A (ko
Inventor
사미르차우드리
폴아서레이먼
존러셀맥마컨
로스톰슨
잭킹셍자오
Original Assignee
에이저 시스템즈 가디언 코포레이션
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 에이저 시스템즈 가디언 코포레이션 filed Critical 에이저 시스템즈 가디언 코포레이션
Publication of KR20030024626A publication Critical patent/KR20030024626A/ko
Application granted granted Critical
Publication of KR100918779B1 publication Critical patent/KR100918779B1/ko
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/201—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates the substrates comprising an insulating layer on a semiconductor body, e.g. SOI
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D10/00—Bipolar junction transistors [BJT]
    • H10D10/01—Manufacture or treatment
    • H10D10/051—Manufacture or treatment of vertical BJTs
    • H10D10/054—Forming extrinsic base regions on silicon substrate after insulating device isolation in vertical BJTs having single crystalline emitter, collector or base regions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/025—Manufacture or treatment of FETs having insulated gates [IGFET] of vertical IGFETs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/63—Vertical IGFETs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/017—Manufacture or treatment using dummy gates in processes wherein at least parts of the final gates are self-aligned to the dummy gates, i.e. replacement gate processes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0107—Integrating at least one component covered by H10D12/00 or H10D30/00 with at least one component covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating IGFETs with BJTs
    • H10D84/0109—Integrating at least one component covered by H10D12/00 or H10D30/00 with at least one component covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating IGFETs with BJTs the at least one component covered by H10D12/00 or H10D30/00 being a MOS device
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0112—Integrating together multiple components covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating multiple BJTs
    • H10D84/0119—Integrating together multiple components covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating multiple BJTs the components including complementary BJTs
    • H10D84/0121—Integrating together multiple components covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating multiple BJTs the components including complementary BJTs the complementary BJTs being vertical BJTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/01—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D10/00—Bipolar junction transistors [BJT]
    • H10D10/40—Vertical BJTs

Landscapes

  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Bipolar Transistors (AREA)
  • Bipolar Integrated Circuits (AREA)
KR1020020056476A 2001-09-18 2002-09-17 수직형 대체 게이트 트랜지스터들과 양립할 수 있는바이폴라 접합 트랜지스터 Expired - Fee Related KR100918779B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/956,382 US6759730B2 (en) 2001-09-18 2001-09-18 Bipolar junction transistor compatible with vertical replacement gate transistor
US09/956,382 2001-09-18

Publications (2)

Publication Number Publication Date
KR20030024626A KR20030024626A (ko) 2003-03-26
KR100918779B1 true KR100918779B1 (ko) 2009-09-23

Family

ID=25498168

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020020056476A Expired - Fee Related KR100918779B1 (ko) 2001-09-18 2002-09-17 수직형 대체 게이트 트랜지스터들과 양립할 수 있는바이폴라 접합 트랜지스터

Country Status (5)

Country Link
US (1) US6759730B2 (enExample)
JP (1) JP4797185B2 (enExample)
KR (1) KR100918779B1 (enExample)
GB (1) GB2383190B (enExample)
TW (1) TW569451B (enExample)

Families Citing this family (40)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6706603B2 (en) * 2001-02-23 2004-03-16 Agere Systems Inc. Method of forming a semiconductor device
US6929983B2 (en) * 2003-09-30 2005-08-16 Cabot Microelectronics Corporation Method of forming a current controlling device
DE102004055213B4 (de) * 2004-11-16 2009-04-09 Atmel Germany Gmbh Verfahren zur Herstellung einer integrierten Schaltung auf einem Halbleiterplättchen
US7365016B2 (en) * 2004-12-27 2008-04-29 Dalsa Semiconductor Inc. Anhydrous HF release of process for MEMS devices
JP2006310651A (ja) * 2005-04-28 2006-11-09 Toshiba Corp 半導体装置の製造方法
US7714355B1 (en) * 2005-12-20 2010-05-11 National Semiconductor Corp Method of controlling the breakdown voltage of BSCRs and BJT clamps
TWI305669B (en) * 2006-07-14 2009-01-21 Nanya Technology Corp Method for making a raised vertical channel transistor device
DE102008047127B4 (de) * 2008-05-30 2010-07-08 Advanced Micro Devices, Inc., Sunnyvale Verfahren zur Herstellung integral ausgebildeter Drain- und Source-Gebiete in einem Silizium/Germanium enthaltenden Transistorbauelement und Halbleiterbauelement
US7820532B2 (en) * 2008-12-29 2010-10-26 Honeywell International Inc. Methods for simultaneously forming doped regions having different conductivity-determining type element profiles
KR20110016325A (ko) * 2009-08-11 2011-02-17 삼성전자주식회사 반도체 소자 및 그 제조방법
GB201105953D0 (en) * 2011-04-07 2011-05-18 Metryx Ltd Measurement apparatus and method
US9349902B2 (en) 2012-06-01 2016-05-24 Taiwan Semiconductor Manufacturing Company, Ltd. System and method for reducing irregularities on the surface of a backside illuminated photodiode
KR20140026156A (ko) * 2012-08-24 2014-03-05 에스케이하이닉스 주식회사 액세스 소자 및 제조 방법, 이를 포함하는 반도체 메모리 소자
US9209095B2 (en) 2014-04-04 2015-12-08 International Business Machines Corporation III-V, Ge, or SiGe fin base lateral bipolar transistor structure and method
US9406793B2 (en) * 2014-07-03 2016-08-02 Broadcom Corporation Semiconductor device with a vertical channel formed through a plurality of semiconductor layers
US9847233B2 (en) 2014-07-29 2017-12-19 Taiwan Semiconductor Manufacturing Company Limited Semiconductor device and formation thereof
US9716155B2 (en) * 2015-12-09 2017-07-25 International Business Machines Corporation Vertical field-effect-transistors having multiple threshold voltages
US10217817B2 (en) 2016-01-27 2019-02-26 International Business Machines Corporation Sacrificial layer for channel surface retention and inner spacer formation in stacked-channel FETs
US10096673B2 (en) 2016-02-17 2018-10-09 International Business Machines Corporation Nanowire with sacrificial top wire
US9530866B1 (en) 2016-04-13 2016-12-27 Globalfoundries Inc. Methods of forming vertical transistor devices with self-aligned top source/drain conductive contacts
US9799751B1 (en) 2016-04-19 2017-10-24 Globalfoundries Inc. Methods of forming a gate structure on a vertical transistor device
US9640636B1 (en) 2016-06-02 2017-05-02 Globalfoundries Inc. Methods of forming replacement gate structures and bottom and top source/drain regions on a vertical transistor device
US10170616B2 (en) 2016-09-19 2019-01-01 Globalfoundries Inc. Methods of forming a vertical transistor device
US10347745B2 (en) 2016-09-19 2019-07-09 Globalfoundries Inc. Methods of forming bottom and top source/drain regions on a vertical transistor device
US9859172B1 (en) * 2016-09-29 2018-01-02 International Business Machines Corporation Bipolar transistor compatible with vertical FET fabrication
US9882025B1 (en) 2016-09-30 2018-01-30 Globalfoundries Inc. Methods of simultaneously forming bottom and top spacers on a vertical transistor device
US9966456B1 (en) 2016-11-08 2018-05-08 Globalfoundries Inc. Methods of forming gate electrodes on a vertical transistor device
KR20180066708A (ko) * 2016-12-09 2018-06-19 삼성전자주식회사 반도체 장치 및 그 제조 방법
US9935018B1 (en) 2017-02-17 2018-04-03 Globalfoundries Inc. Methods of forming vertical transistor devices with different effective gate lengths
US10229999B2 (en) 2017-02-28 2019-03-12 Globalfoundries Inc. Methods of forming upper source/drain regions on a vertical transistor device
US10014370B1 (en) 2017-04-19 2018-07-03 Globalfoundries Inc. Air gap adjacent a bottom source/drain region of vertical transistor device
US10269800B2 (en) * 2017-05-26 2019-04-23 Taiwan Semiconductor Manufacturing Co., Ltd. Vertical gate semiconductor device with steep subthreshold slope
US9991359B1 (en) 2017-06-15 2018-06-05 International Business Machines Corporation Vertical transistor gated diode
KR102349243B1 (ko) * 2018-05-08 2022-01-07 유니산티스 일렉트로닉스 싱가포르 프라이빗 리미티드 주상 반도체 장치의 제조 방법
US10900952B2 (en) * 2019-05-16 2021-01-26 International Business Machines Corporation Dual surface charge sensing biosensor
US11404540B2 (en) 2019-10-01 2022-08-02 Analog Devices International Unlimited Company Bipolar junction transistor, and a method of forming a collector for a bipolar junction transistor
US11355585B2 (en) 2019-10-01 2022-06-07 Analog Devices International Unlimited Company Bipolar junction transistor, and a method of forming a charge control structure for a bipolar junction transistor
US11563084B2 (en) 2019-10-01 2023-01-24 Analog Devices International Unlimited Company Bipolar junction transistor, and a method of forming an emitter for a bipolar junction transistor
US11189701B1 (en) * 2020-12-11 2021-11-30 International Business Machines Corporation Bipolar junction transistor with vertically integrated resistor
US20230098450A1 (en) * 2021-09-29 2023-03-30 Owl Autonomous Imaging, Inc. Methods and systems for a photon detecting structure and device using colloidal quantum dots

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4764801A (en) * 1985-10-08 1988-08-16 Motorola Inc. Poly-sidewall contact transistors
US5252849A (en) * 1992-03-02 1993-10-12 Motorola, Inc. Transistor useful for further vertical integration and method of formation
JPH08186122A (ja) * 1994-12-16 1996-07-16 Korea Electron Telecommun 超自己整合垂直構造バイポーラトランジスターの製造方法
KR100564890B1 (ko) * 1996-11-19 2006-07-14 에스지에스톰슨마이크로일렉트로닉스소시에떼아노님 바이폴라/cmos집적회로의제조

Family Cites Families (26)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4366495A (en) 1979-08-06 1982-12-28 Rca Corporation Vertical MOSFET with reduced turn-on resistance
US4455565A (en) 1980-02-22 1984-06-19 Rca Corporation Vertical MOSFET with an aligned gate electrode and aligned drain shield electrode
US4587713A (en) 1984-02-22 1986-05-13 Rca Corporation Method for making vertical MOSFET with reduced bipolar effects
US4837606A (en) 1984-02-22 1989-06-06 General Electric Company Vertical MOSFET with reduced bipolar effects
US4786953A (en) 1984-07-16 1988-11-22 Nippon Telegraph & Telephone Vertical MOSFET and method of manufacturing the same
JPS6126261A (ja) 1984-07-16 1986-02-05 Nippon Telegr & Teleph Corp <Ntt> 縦形ｍｏｓ電界効果トランジスタの製造方法
JPS61269377A (ja) * 1985-05-24 1986-11-28 Hitachi Ltd 半導体装置
US4851362A (en) 1987-08-25 1989-07-25 Oki Electric Industry Co., Ltd. Method for manufacturing a semiconductor device
IT1217323B (it) * 1987-12-22 1990-03-22 Sgs Microelettronica Spa Struttura integrata di transistor bipolare di potenza di alta tensione e di transistor mos di potenza di bassa tensione nella configurazione"emitter switching"e relativo processo di fabbricazione
JPH01238166A (ja) * 1988-03-18 1989-09-22 Fujitsu Ltd 半導体装置
US5342797A (en) 1988-10-03 1994-08-30 National Semiconductor Corporation Method for forming a vertical power MOSFET having doped oxide side wall spacers
US5001533A (en) 1988-12-22 1991-03-19 Kabushiki Kaisha Toshiba Bipolar transistor with side wall base contacts
US5208172A (en) 1992-03-02 1993-05-04 Motorola, Inc. Method for forming a raised vertical transistor
US5324673A (en) * 1992-11-19 1994-06-28 Motorola, Inc. Method of formation of vertical transistor
JPH07161726A (ja) * 1993-12-08 1995-06-23 Canon Inc バイポーラトランジスタ
US5484737A (en) * 1994-12-13 1996-01-16 Electronics & Telecommunications Research Institute Method for fabricating bipolar transistor
US5538908A (en) * 1995-04-27 1996-07-23 Lg Semicon Co., Ltd. Method for manufacturing a BiCMOS semiconductor device
US5576238A (en) 1995-06-15 1996-11-19 United Microelectronics Corporation Process for fabricating static random access memory having stacked transistors
US5668391A (en) 1995-08-02 1997-09-16 Lg Semicon Co., Ltd. Vertical thin film transistor
US5683930A (en) 1995-12-06 1997-11-04 Micron Technology Inc. SRAM cell employing substantially vertically elongated pull-up resistors and methods of making, and resistor constructions and methods of making
US6133099A (en) 1997-02-04 2000-10-17 Nec Corporation Vertical MOSFET and method of manufacturing thereof
US6297531B2 (en) 1998-01-05 2001-10-02 International Business Machines Corporation High performance, low power vertical integrated CMOS devices
US6242775B1 (en) * 1998-02-24 2001-06-05 Micron Technology, Inc. Circuits and methods using vertical complementary transistors
US6072216A (en) 1998-05-01 2000-06-06 Siliconix Incorporated Vertical DMOS field effect transistor with conformal buried layer for reduced on-resistance
US6197641B1 (en) 1998-08-28 2001-03-06 Lucent Technologies Inc. Process for fabricating vertical transistors
US6027975A (en) * 1998-08-28 2000-02-22 Lucent Technologies Inc. Process for fabricating vertical transistors

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4764801A (en) * 1985-10-08 1988-08-16 Motorola Inc. Poly-sidewall contact transistors
US5252849A (en) * 1992-03-02 1993-10-12 Motorola, Inc. Transistor useful for further vertical integration and method of formation
KR100263954B1 (ko) * 1992-03-02 2000-08-16 비센트 비. 인그라시아 트렌지스터 장치 및 수직형 집적 구조체
JPH08186122A (ja) * 1994-12-16 1996-07-16 Korea Electron Telecommun 超自己整合垂直構造バイポーラトランジスターの製造方法
KR100564890B1 (ko) * 1996-11-19 2006-07-14 에스지에스톰슨마이크로일렉트로닉스소시에떼아노님 바이폴라/cmos집적회로의제조

Also Published As

Publication number Publication date
JP2003179067A (ja) 2003-06-27
US20030052721A1 (en) 2003-03-20
JP4797185B2 (ja) 2011-10-19
US6759730B2 (en) 2004-07-06
KR20030024626A (ko) 2003-03-26
TW569451B (en) 2004-01-01
GB2383190A (en) 2003-06-18
GB2383190B (en) 2006-05-24
GB0220210D0 (en) 2002-10-09

Similar Documents

Publication Publication Date Title
KR100918779B1 (ko) 수직형 대체 게이트 트랜지스터들과 양립할 수 있는바이폴라 접합 트랜지스터
US7033877B2 (en) Vertical replacement-gate junction field-effect transistor
JP5274490B2 (ja) 垂直置換ゲートトランジスタと集積可能な容量の構造及び作製法
JP5220257B2 (ja) Ｃｍｏｓ垂直置換ゲート（ｖｒｇ）トランジスタ
KR100572647B1 (ko) 수직 트랜지스터 제조 프로세스
US7078280B2 (en) Vertical replacement-gate silicon-on-insulator transistor
KR100411674B1 (ko) 수직 트랜지스터를 갖는 씨엠오에스 집적 회로 및 이를제조하기 위한 방법
KR101201489B1 (ko) Ｓｏｉ 디바이스 제조 방법
KR100781580B1 (ko) 이중 구조 핀 전계 효과 트랜지스터 및 그 제조 방법
JP4202389B2 (ja) バイポーラ半導体構成要素、特にバイポーラ・トランジスタ、および対応するバイポーラ半導体構成要素の製造方法
JPH08236610A (ja) 集積回路中の分離領域形成プロセス及び形成された構造体

Legal Events

Date Code Title Description
PA0109 Patent application

St.27 status event code: A-0-1-A10-A12-nap-PA0109

PG1501 Laying open of application

St.27 status event code: A-1-1-Q10-Q12-nap-PG1501

R17-X000 Change to representative recorded

St.27 status event code: A-3-3-R10-R17-oth-X000

R17-X000 Change to representative recorded

St.27 status event code: A-3-3-R10-R17-oth-X000

A201 Request for examination
P11-X000 Amendment of application requested

St.27 status event code: A-2-2-P10-P11-nap-X000

P13-X000 Application amended

St.27 status event code: A-2-2-P10-P13-nap-X000

PA0201 Request for examination

St.27 status event code: A-1-2-D10-D11-exm-PA0201

D13-X000 Search requested

St.27 status event code: A-1-2-D10-D13-srh-X000

D14-X000 Search report completed

St.27 status event code: A-1-2-D10-D14-srh-X000

E902 Notification of reason for refusal
PE0902 Notice of grounds for rejection

St.27 status event code: A-1-2-D10-D21-exm-PE0902

P11-X000 Amendment of application requested

St.27 status event code: A-2-2-P10-P11-nap-X000

P13-X000 Application amended

St.27 status event code: A-2-2-P10-P13-nap-X000

E701 Decision to grant or registration of patent right
PE0701 Decision of registration

St.27 status event code: A-1-2-D10-D22-exm-PE0701

GRNT Written decision to grant
PR0701 Registration of establishment

St.27 status event code: A-2-4-F10-F11-exm-PR0701

PR1002 Payment of registration fee

St.27 status event code: A-2-2-U10-U11-oth-PR1002

Fee payment year number: 1

PG1601 Publication of registration

St.27 status event code: A-4-4-Q10-Q13-nap-PG1601

FPAY Annual fee payment

Payment date: 20120821

Year of fee payment: 4

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 4

FPAY Annual fee payment

Payment date: 20130820

Year of fee payment: 5

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 5

FPAY Annual fee payment

Payment date: 20140825

Year of fee payment: 6

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 6

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 7

PN2301 Change of applicant

St.27 status event code: A-5-5-R10-R11-asn-PN2301

PN2301 Change of applicant

St.27 status event code: A-5-5-R10-R14-asn-PN2301

PN2301 Change of applicant

St.27 status event code: A-5-5-R10-R11-asn-PN2301

PN2301 Change of applicant

St.27 status event code: A-5-5-R10-R14-asn-PN2301

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 8

LAPS Lapse due to unpaid annual fee
PC1903 Unpaid annual fee

St.27 status event code: A-4-4-U10-U13-oth-PC1903

Not in force date: 20170918

Payment event data comment text: Termination Category : DEFAULT_OF_REGISTRATION_FEE

PC1903 Unpaid annual fee

St.27 status event code: N-4-6-H10-H13-oth-PC1903

Ip right cessation event data comment text: Termination Category : DEFAULT_OF_REGISTRATION_FEE

Not in force date: 20170918

P22-X000 Classification modified

St.27 status event code: A-4-4-P10-P22-nap-X000