KR100915433B1 - 반도체 웨이퍼 폴리싱 방법 - Google Patents

반도체 웨이퍼 폴리싱 방법

Info

Publication number
KR100915433B1
KR100915433B1 KR1020070086640A KR20070086640A KR100915433B1 KR 100915433 B1 KR100915433 B1 KR 100915433B1 KR 1020070086640 A KR1020070086640 A KR 1020070086640A KR 20070086640 A KR20070086640 A KR 20070086640A KR 100915433 B1 KR100915433 B1 KR 100915433B1
Authority
KR
South Korea
Prior art keywords
polishing
semiconductor wafer
polished
flatness
polishing step
Prior art date
Application number
KR1020070086640A
Other languages
English (en)
Korean (ko)
Other versions
KR20080026485A (ko
Inventor
클라우스 뢰트게르
블라디미르 두치케
레스제크 미스투르
Original Assignee
실트로닉 아게
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 실트로닉 아게 filed Critical 실트로닉 아게
Publication of KR20080026485A publication Critical patent/KR20080026485A/ko
Application granted granted Critical
Publication of KR100915433B1 publication Critical patent/KR100915433B1/ko

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/304—Mechanical treatment, e.g. grinding, polishing, cutting
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B24—GRINDING; POLISHING
    • B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
    • B24B37/00—Lapping machines or devices; Accessories
    • B24B37/04—Lapping machines or devices; Accessories designed for working plane surfaces
    • B24B37/07—Lapping machines or devices; Accessories designed for working plane surfaces characterised by the movement of the work or lapping tool
    • B24B37/08—Lapping machines or devices; Accessories designed for working plane surfaces characterised by the movement of the work or lapping tool for double side lapping
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02002—Preparing wafers
    • H01L21/02005—Preparing bulk and homogeneous wafers
    • H01L21/02008—Multistep processes
    • H01L21/0201—Specific process step
    • H01L21/02024—Mirror polishing

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Mechanical Engineering (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)
  • Finish Polishing, Edge Sharpening, And Grinding By Specific Grinding Devices (AREA)
KR1020070086640A 2006-09-20 2007-08-28 반도체 웨이퍼 폴리싱 방법 KR100915433B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE102006044367.5 2006-09-20
DE102006044367A DE102006044367B4 (de) 2006-09-20 2006-09-20 Verfahren zum Polieren einer Halbleiterscheibe und eine nach dem Verfahren herstellbare polierte Halbleiterscheibe

Related Child Applications (1)

Application Number Title Priority Date Filing Date
KR1020090008911A Division KR100945774B1 (ko) 2006-09-20 2009-02-04 폴리싱된 반도체 웨이퍼

Publications (2)

Publication Number Publication Date
KR20080026485A KR20080026485A (ko) 2008-03-25
KR100915433B1 true KR100915433B1 (ko) 2009-09-03

Family

ID=39133976

Family Applications (2)

Application Number Title Priority Date Filing Date
KR1020070086640A KR100915433B1 (ko) 2006-09-20 2007-08-28 반도체 웨이퍼 폴리싱 방법
KR1020090008911A KR100945774B1 (ko) 2006-09-20 2009-02-04 폴리싱된 반도체 웨이퍼

Family Applications After (1)

Application Number Title Priority Date Filing Date
KR1020090008911A KR100945774B1 (ko) 2006-09-20 2009-02-04 폴리싱된 반도체 웨이퍼

Country Status (7)

Country Link
US (1) US20080070483A1 (zh)
JP (1) JP2008078660A (zh)
KR (2) KR100915433B1 (zh)
CN (1) CN101148025B (zh)
DE (1) DE102006044367B4 (zh)
SG (2) SG141306A1 (zh)
TW (1) TWI336280B (zh)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102008044646B4 (de) * 2008-08-27 2011-06-22 Siltronic AG, 81737 Verfahren zur Herstellung einer Halbleiterscheibe
DE102008045534B4 (de) * 2008-09-03 2011-12-01 Siltronic Ag Verfahren zum Polieren einer Halbleiterscheibe
EP2428984B1 (en) * 2009-05-08 2018-04-11 SUMCO Corporation Semiconductor wafer polishing method
DE102009025243B4 (de) * 2009-06-17 2011-11-17 Siltronic Ag Verfahren zur Herstellung und Verfahren zur Bearbeitung einer Halbleiterscheibe aus Silicium
DE102009030292B4 (de) * 2009-06-24 2011-12-01 Siltronic Ag Verfahren zum beidseitigen Polieren einer Halbleiterscheibe
DE102009037281B4 (de) * 2009-08-12 2013-05-08 Siltronic Ag Verfahren zur Herstellung einer polierten Halbleiterscheibe
DE102009049330B3 (de) * 2009-10-14 2011-02-17 Siltronic Ag Verfahren zum Nachpolieren einer Halbleiterscheibe
US8952496B2 (en) 2009-12-24 2015-02-10 Sumco Corporation Semiconductor wafer and method of producing same
JP5423384B2 (ja) 2009-12-24 2014-02-19 株式会社Ｓｕｍｃｏ 半導体ウェーハおよびその製造方法
DE102010013520B4 (de) * 2010-03-31 2013-02-07 Siltronic Ag Verfahren zur beidseitigen Politur einer Halbleiterscheibe
DE102013201663B4 (de) 2012-12-04 2020-04-23 Siltronic Ag Verfahren zum Polieren einer Halbleiterscheibe
KR101660900B1 (ko) * 2015-01-16 2016-10-10 주식회사 엘지실트론 웨이퍼 연마 장치 및 이를 이용한 웨이퍼 연마 방법
JP6968201B2 (ja) * 2017-12-22 2021-11-17 東京エレクトロン株式会社 基板処理システム、基板処理方法及びコンピュータ記憶媒体
US11145556B2 (en) * 2019-11-21 2021-10-12 Carl Zeiss Smt Gmbh Method and device for inspection of semiconductor samples
JP6885492B1 (ja) * 2020-05-13 2021-06-16 信越半導体株式会社 両面研磨方法

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6514424B2 (en) * 2000-05-11 2003-02-04 WACKER SILTRONIC GESELLSCHAFT FüR HALBLEITERMATERIALIEN AG Process for the double-side polishing of semiconductor wafers and carrier for carrying out the process
US20030045089A1 (en) * 1999-02-11 2003-03-06 Wacker Siltronic Gesellschaft Fur Halbleitermaterialien Ag Semiconductor wafer with improved flatness, and process for producing the semiconductor wafer

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05177539A (ja) * 1991-12-24 1993-07-20 Sumitomo Electric Ind Ltd 両面ポリッシュ装置によるウェハ研磨方法
DE19704546A1 (de) * 1997-02-06 1998-08-13 Wacker Siltronic Halbleitermat Verfahren zur Herstellung einer einseitig beschichteten und mit einem Finish versehenen Halbleiterscheibe
WO2000047369A1 (en) * 1999-02-12 2000-08-17 Memc Electronic Materials, Inc. Method of polishing semiconductor wafers
DE10007390B4 (de) * 1999-03-13 2008-11-13 Peter Wolters Gmbh Zweischeiben-Poliermaschine, insbesondere zur Bearbeitung von Halbleiterwafern
US6299514B1 (en) * 1999-03-13 2001-10-09 Peter Wolters Werkzeugmachinen Gmbh Double-disk polishing machine, particularly for tooling semiconductor wafers
JP4280397B2 (ja) * 1999-10-21 2009-06-17 スピードファム株式会社 ワークの研磨方法
DE19956250C1 (de) * 1999-11-23 2001-05-17 Wacker Siltronic Halbleitermat Kostengünstiges Verfahren zur Herstellung einer Vielzahl von Halbleiterscheiben
DE10314212B4 (de) * 2002-03-29 2010-06-02 Hoya Corp. Verfahren zur Herstellung eines Maskenrohlings, Verfahren zur Herstellung einer Transfermaske
JP4352229B2 (ja) * 2003-11-20 2009-10-28 信越半導体株式会社 半導体ウェーハの両面研磨方法
JP4748968B2 (ja) * 2004-10-27 2011-08-17 信越半導体株式会社 半導体ウエーハの製造方法
JP2006198751A (ja) * 2005-01-24 2006-08-03 Showa Denko Kk 磁気ディスク用サブストレート基板の製造方法及び研磨装置

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20030045089A1 (en) * 1999-02-11 2003-03-06 Wacker Siltronic Gesellschaft Fur Halbleitermaterialien Ag Semiconductor wafer with improved flatness, and process for producing the semiconductor wafer
US6514424B2 (en) * 2000-05-11 2003-02-04 WACKER SILTRONIC GESELLSCHAFT FüR HALBLEITERMATERIALIEN AG Process for the double-side polishing of semiconductor wafers and carrier for carrying out the process

Also Published As

Publication number Publication date
CN101148025A (zh) 2008-03-26
CN101148025B (zh) 2010-06-23
KR20080026485A (ko) 2008-03-25
JP2008078660A (ja) 2008-04-03
US20080070483A1 (en) 2008-03-20
SG141306A1 (en) 2008-04-28
KR20090020671A (ko) 2009-02-26
TW200815153A (en) 2008-04-01
TWI336280B (en) 2011-01-21
DE102006044367A1 (de) 2008-04-03
KR100945774B1 (ko) 2010-03-08
DE102006044367B4 (de) 2011-07-14
SG169385A1 (en) 2011-03-30

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