KR100858453B1 - 전기적 접속 구조, 그 제조 방법 및 반도체 집적 회로 장치 - Google Patents
전기적 접속 구조, 그 제조 방법 및 반도체 집적 회로 장치 Download PDFInfo
- Publication number
- KR100858453B1 KR100858453B1 KR1020050105990A KR20050105990A KR100858453B1 KR 100858453 B1 KR100858453 B1 KR 100858453B1 KR 1020050105990 A KR1020050105990 A KR 1020050105990A KR 20050105990 A KR20050105990 A KR 20050105990A KR 100858453 B1 KR100858453 B1 KR 100858453B1
- Authority
- KR
- South Korea
- Prior art keywords
- layer
- catalyst
- carbon
- electrical connection
- film
- Prior art date
Links
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76843—Barrier, adhesion or liner layers formed in openings in a dielectric
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76867—Barrier, adhesion or liner layers characterized by methods of formation other than PVD, CVD or deposition from a liquids
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76871—Layers specifically deposited to enhance or enable the nucleation of further layers, i.e. seed layers
- H01L21/76876—Layers specifically deposited to enhance or enable the nucleation of further layers, i.e. seed layers for deposition from the gas phase, e.g. CVD
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
- H01L21/76879—Filling of holes, grooves or trenches, e.g. vias, with conductive material by selective deposition of conductive material in the vias, e.g. selective C.V.D. on semiconductor material, plating
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/5226—Via connections in a multilevel interconnection structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
- H01L23/53204—Conductive materials
- H01L23/53276—Conductive materials containing carbon, e.g. fullerenes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/10—Applying interconnections to be used for carrying current between separate components within a device
- H01L2221/1068—Formation and after-treatment of conductors
- H01L2221/1094—Conducting structures comprising nanotubes or nanowires
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Carbon And Carbon Compounds (AREA)
- Electrodes Of Semiconductors (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
Description
Claims (10)
- 도전체에 탄소 세장(細長) 구조체가 전기적으로 접속된 전기적 접속 구조에 있어서,해당 도전체 위에, 도전성 촉매 담지체층과 해당 탄소 세장 구조체를 생성하기 위한 촉매 미립자층과 해당 탄소 세장 구조체가 차례로 적층되어서 이루어지며,상기 도전성 촉매 담지체층이 HfN막층, ZrN막층, TiN막층, 또는 그것들의 다층막이며,상기 도전성 촉매 담지체층이 탄소 세장 구조체의 성장을 촉진하는 기능을 갖는 전기적 접속 구조.
- 제 1 항에 있어서,상기 촉매 미립자층이 상기 도전성 촉매 담지체층 위에 미리 미립자화한 촉매 미립자를 퇴적하여 이루어지는 것인 전기적 접속 구조.
- 제 1 항 또는 제 2 항에 있어서,상기 탄소 세장 구조체가 비어홀(via hole) 속에 설치된 것인 전기적 접속 구조.
- 삭제
- 제 1 항 또는 제 2 항에 있어서,상기 도전성 촉매 담지체층이 상기 도전체를 구성하는 금속의 확산 방지 기능을 갖는 전기적 접속 구조.
- 제 1 항 또는 제 2 항에 있어서,상기 촉매 미립자층을 이루는 촉매 미립자는 Co, Ni, Fe, Pd, Pt 및 그것들을 포함하는 합금으로 이루어지는 그룹으로부터 선택된 금속의 미립자인 전기적 접속 구조.
- 제 1 항 또는 제 2 항에 있어서,상기 도전성 촉매 담지체층이, 상기 도전체측에 설치된, 상기 도전체를 구성하는 금속의 확산 방지 기능을 갖는 제 1층과, 상기 촉매 미립자층측에 설치된, 탄소 세장 구조체의 성장을 촉진하는 기능을 갖는 제 2층을 포함해서 이루어지며,상기 제 1층이 Ta층이며, 상기 제 2층이 HfN막층, ZrN막층, TiN막층, 또는 그것들의 다층막인 전기적 접속 구조.
- 제 1 항 또는 제 2 항에 기재된 전기적 접속 구조를 구비하여 이루어지는 반도체 집적 회로 장치.
- 도전체 위에 도전성 촉매 담지체층을 설치하고,미리 미립자화한 촉매 미립자를 해당 도전성 촉매 담지체층 위에 퇴적해서 촉매 미립자층을 이루고,해당 촉매 미립자층 위에 탄소 세장 구조체층을 설치하며,상기 도전성 촉매 담지체층이 HfN막층, ZrN막층, TiN막층, 또는 그것들의 다층막이며,상기 도전성 촉매 담지체층이 탄소 세장 구조체의 성장을 촉진하는 기능을 갖는 전기적 접속 구조의 제조 방법.
- 제 9 항에 있어서,진공하에서, 입자 직경을 갖춘 촉매 미립자를 미립자 빔의 형태로 상기 도전성 촉매 담지체층면 위에 조사해서 상기 촉매 미립자층을 형성하는 전기적 접속 구조의 제조 방법.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2005165004A JP5009511B2 (ja) | 2005-06-06 | 2005-06-06 | 電気的接続構造、その製造方法および半導体集積回路装置 |
JPJP-P-2005-00165004 | 2005-06-06 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR20060127378A KR20060127378A (ko) | 2006-12-12 |
KR100858453B1 true KR100858453B1 (ko) | 2008-09-16 |
Family
ID=37559815
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1020050105990A KR100858453B1 (ko) | 2005-06-06 | 2005-11-07 | 전기적 접속 구조, 그 제조 방법 및 반도체 집적 회로 장치 |
Country Status (3)
Country | Link |
---|---|
US (1) | US8338822B2 (ko) |
JP (1) | JP5009511B2 (ko) |
KR (1) | KR100858453B1 (ko) |
Families Citing this family (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100881621B1 (ko) * | 2007-01-12 | 2009-02-04 | 삼성전자주식회사 | 반도체 장치 및 그 형성방법 |
JP2008210954A (ja) * | 2007-02-26 | 2008-09-11 | Fujitsu Ltd | カーボンナノチューブバンプ構造体とその製造方法、およびこれを用いた半導体装置 |
JP5092500B2 (ja) * | 2007-03-30 | 2012-12-05 | 富士通株式会社 | カーボンナノチューブデバイス及びその製造方法 |
US8283786B2 (en) * | 2007-12-21 | 2012-10-09 | Advanced Micro Devices, Inc. | Integrated circuit system with contact integration |
EP2269948B1 (en) | 2008-02-29 | 2017-08-02 | Fujitsu Limited | Sheet structure |
WO2011062072A1 (ja) * | 2009-11-19 | 2011-05-26 | 株式会社 村田製作所 | 電子デバイス |
JP2011204769A (ja) * | 2010-03-24 | 2011-10-13 | Toshiba Corp | 半導体装置及びその製造方法 |
CN102214509B (zh) * | 2010-04-12 | 2013-03-20 | 北京有色金属研究总院 | 一种(FeCo)N微波吸收材料及其制备方法 |
CN105226006B (zh) * | 2014-06-12 | 2019-01-22 | 中芯国际集成电路制造(上海)有限公司 | 互连结构的形成方法 |
JP2016012798A (ja) | 2014-06-27 | 2016-01-21 | Tdk株式会社 | 高周波伝送線路、アンテナ及び電子回路基板 |
JP2016012799A (ja) | 2014-06-27 | 2016-01-21 | Tdk株式会社 | 高周波伝送線路、アンテナ及び電子回路基板 |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2004284919A (ja) * | 2003-03-25 | 2004-10-14 | Mitsubishi Electric Corp | カーボンナノチューブ形成用基板の製造方法およびこの基板を用いたカーボンナノチューブの製造方法 |
Family Cites Families (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE10006964C2 (de) * | 2000-02-16 | 2002-01-31 | Infineon Technologies Ag | Elektronisches Bauelement mit einer leitenden Verbindung zwischen zwei leitenden Schichten und Verfahren zum Herstellen eines elektronischen Bauelements |
JP3768908B2 (ja) * | 2001-03-27 | 2006-04-19 | キヤノン株式会社 | 電子放出素子、電子源、画像形成装置 |
US7084507B2 (en) * | 2001-05-02 | 2006-08-01 | Fujitsu Limited | Integrated circuit device and method of producing the same |
JP4212258B2 (ja) | 2001-05-02 | 2009-01-21 | 富士通株式会社 | 集積回路装置及び集積回路装置製造方法 |
US6596187B2 (en) * | 2001-08-29 | 2003-07-22 | Motorola, Inc. | Method of forming a nano-supported sponge catalyst on a substrate for nanotube growth |
US6803708B2 (en) * | 2002-08-22 | 2004-10-12 | Cdream Display Corporation | Barrier metal layer for a carbon nanotube flat panel display |
US7518247B2 (en) * | 2002-11-29 | 2009-04-14 | Nec Corporation | Semiconductor device and its manufacturing method |
JP4401094B2 (ja) * | 2003-03-20 | 2010-01-20 | 富士通株式会社 | 炭素元素円筒型構造体へのオーミック接続構造及びその作製方法 |
JP3697257B2 (ja) * | 2003-03-25 | 2005-09-21 | キヤノン株式会社 | カーボンファイバー、電子放出素子、電子源、画像形成装置、ライトバルブ、二次電池の製造方法 |
JP3982759B2 (ja) | 2003-06-30 | 2007-09-26 | 学校法人大阪産業大学 | 光化学アブレーションによるカーボンナノチューブの製造方法 |
JP3869394B2 (ja) * | 2003-06-30 | 2007-01-17 | 富士通株式会社 | 微粒子の堆積方法及びカーボンナノチューブの形成方法 |
US7135773B2 (en) * | 2004-02-26 | 2006-11-14 | International Business Machines Corporation | Integrated circuit chip utilizing carbon nanotube composite interconnection vias |
JP4448356B2 (ja) * | 2004-03-26 | 2010-04-07 | 富士通株式会社 | 半導体装置およびその製造方法 |
-
2005
- 2005-06-06 JP JP2005165004A patent/JP5009511B2/ja not_active Expired - Fee Related
- 2005-11-07 KR KR1020050105990A patent/KR100858453B1/ko active IP Right Grant
- 2005-11-17 US US11/280,269 patent/US8338822B2/en active Active
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2004284919A (ja) * | 2003-03-25 | 2004-10-14 | Mitsubishi Electric Corp | カーボンナノチューブ形成用基板の製造方法およびこの基板を用いたカーボンナノチューブの製造方法 |
Non-Patent Citations (2)
Title |
---|
Chemical Physics Letters, Vol.382, pp.361-366* |
JJAP, Vol.44, No.4A, pp.1626-1628* |
Also Published As
Publication number | Publication date |
---|---|
JP5009511B2 (ja) | 2012-08-22 |
KR20060127378A (ko) | 2006-12-12 |
US20060286851A1 (en) | 2006-12-21 |
JP2006339552A (ja) | 2006-12-14 |
US8338822B2 (en) | 2012-12-25 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
KR100858453B1 (ko) | 전기적 접속 구조, 그 제조 방법 및 반도체 집적 회로 장치 | |
JP4549002B2 (ja) | カーボンナノチューブからなる電気的に導電性の接続を有する電子部品とその製造方法 | |
TWI465389B (zh) | 用於奈米結構加工之導電性助層之沉積及選擇性移除 | |
KR101304146B1 (ko) | 그라핀 배선 및 그 제조 방법 | |
CN101573772B (zh) | Mim电容器 | |
KR20100108503A (ko) | 전자 디바이스 및 그 제조 방법 | |
US8981569B2 (en) | Semiconductor device with low resistance wiring and manufacturing method for the device | |
JP2011023420A (ja) | 半導体装置 | |
JP2008137846A (ja) | 炭素細長構造束状体、その製造方法および電子素子 | |
JP5414756B2 (ja) | 半導体装置とその製造方法 | |
TW201221466A (en) | Carbon nanotube wire and manufacturing method thereof | |
US20130075929A1 (en) | Semiconductor device and method of manufacturing the same | |
KR101110804B1 (ko) | 배선 구조체의 형성 방법 | |
JP5233147B2 (ja) | 電子デバイス及びその製造方法 | |
JP2005072171A (ja) | 半導体装置およびその製造方法 | |
JP4555695B2 (ja) | カーボンナノチューブ配線を備えた電子デバイス及びその製造方法 | |
CN102881651B (zh) | 一种改善碳纳米管互连电特性的方法 | |
KR101721060B1 (ko) | 적어도 2개의 다른 방향을 따라 확장하는 전기 커넥션들을 포함하는 전자 장치 및 이를 형성하는 방법 | |
JP2009032819A (ja) | 電子装置の製造方法及びそれを用いた電子装置 | |
US8461037B2 (en) | Method for fabricating interconnections with carbon nanotubes | |
JP5769916B2 (ja) | 導体または半導体基板上に堆積させたカーボンナノチューブマットの製造方法 | |
US20060138658A1 (en) | Carbon nanotube interconnects in porous diamond interlayer dielectrics | |
JP2010263227A (ja) | 電気的接続構造の製造方法 | |
JP2006108210A (ja) | 配線接続構造およびその形成方法 | |
US8011091B2 (en) | Fabrication method of a nanotube-based electric connection having air gaps |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A201 | Request for examination | ||
E902 | Notification of reason for refusal | ||
AMND | Amendment | ||
E601 | Decision to refuse application | ||
AMND | Amendment | ||
J201 | Request for trial against refusal decision | ||
E902 | Notification of reason for refusal | ||
B701 | Decision to grant | ||
GRNT | Written decision to grant | ||
FPAY | Annual fee payment |
Payment date: 20120821 Year of fee payment: 5 |
|
FPAY | Annual fee payment |
Payment date: 20130822 Year of fee payment: 6 |
|
FPAY | Annual fee payment |
Payment date: 20140825 Year of fee payment: 7 |
|
FPAY | Annual fee payment |
Payment date: 20150819 Year of fee payment: 8 |
|
FPAY | Annual fee payment |
Payment date: 20160818 Year of fee payment: 9 |
|
FPAY | Annual fee payment |
Payment date: 20170818 Year of fee payment: 10 |
|
FPAY | Annual fee payment |
Payment date: 20180816 Year of fee payment: 11 |