JP5769916B2 - 導体または半導体基板上に堆積させたカーボンナノチューブマットの製造方法 - Google Patents
導体または半導体基板上に堆積させたカーボンナノチューブマットの製造方法 Download PDFInfo
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- JP5769916B2 JP5769916B2 JP2009153277A JP2009153277A JP5769916B2 JP 5769916 B2 JP5769916 B2 JP 5769916B2 JP 2009153277 A JP2009153277 A JP 2009153277A JP 2009153277 A JP2009153277 A JP 2009153277A JP 5769916 B2 JP5769916 B2 JP 5769916B2
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- H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
- H01L21/76814—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics post-treatment or after-treatment, e.g. cleaning or removal of oxides on underlying conductors
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- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76843—Barrier, adhesion or liner layers formed in openings in a dielectric
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
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- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76871—Layers specifically deposited to enhance or enable the nucleation of further layers, i.e. seed layers
- H01L21/76876—Layers specifically deposited to enhance or enable the nucleation of further layers, i.e. seed layers for deposition from the gas phase, e.g. CVD
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- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
- H01L21/76879—Filling of holes, grooves or trenches, e.g. vias, with conductive material by selective deposition of conductive material in the vias, e.g. selective C.V.D. on semiconductor material, plating
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- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
- H01L23/53204—Conductive materials
- H01L23/53276—Conductive materials containing carbon, e.g. fullerenes
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- H01L2221/1068—Formation and after-treatment of conductors
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Description
少なくとも1層以上の金属層を含んでなる触媒複合体を、前記基板上に堆積させる工程、
前記金属層の酸化処理を行う工程、および
前記酸化処理された金属層からカーボンナノチューブを成長させる工程、
を含んでなる方法により規定されるものである。
前記第一導電層上に拡散バリアを堆積させる工程、
第一アモルファスシリコン層と前記拡散バリア上に堆積した金属層とを含んでなる触媒複合体を、ビアホールの底部に形成する工程、
前記金属層の酸化処理を行う工程、および
前記酸化処理された金属層上にカーボンナノチューブを成長させる工程、を含んでなり、
前記成長時間が、前記カーボンナノチューブの長さが前記ビアホールの深さよりも大きくなるように決定される方法にも関する。
前記アモルファスシリコン層上に誘電体層を堆積させ、続いて前記誘電体層上に前記第二導電層を堆積させる工程、および
前記ビアホールをエッチングマスクで被覆して、前記アモルファスシリコン層に達するまでエッチングを行う工程、
を含む。
前記ビアホールをエッチングマスク(560)で被覆して、前記アモルファスシリコン層(530)に達するまでエッチングを行い、前記マスクを除去する工程、および
前記金属層(570)を堆積させ、続いて前記第二導電層上に存在する前記触媒複合体が除去されるように化学的−機械的研磨を行い、前記触媒複合体を前記ビアホールの底部に局在化させる工程、を含んでなる。
使用した基板は、アルゴンイオン照射によって酸化した単結晶シリコンであった。触媒系は、アルゴンイオンビームスパッタリング手段によって酸化したシリコン上に堆積した1nmの鉄層からなるものであった。
本例は、鉄層の堆積方法が異なる以外は上記と同様である。シリコンをフッ化水素酸でウエットエッチングした後、電子ビーム蒸着によって鉄層を堆積させた。その後の成長行程は例1と同様にして行った。得られた結果は上記で得られた結果と非常に近似している。
基板として窒化タンタル(TiN)を用いた。本例の触媒系は、5nmのアモルファスシリコン上に2nmの鉄層を設けたものであった。アモルファスシリコン層および鉄層を、同じ真空サイクルによって、イオンビームスパッタリング手段により堆積させた。
Claims (10)
- 導体または半導体基板上にカーボンナノチューブマットを製造する方法であって、
少なくとも一層以上の金属層を含んでなる触媒複合体であって、前記基板上に堆積したアモルファスシリコン層と、前記アモルファスシリコン層上に堆積している前記金属層とを含んでなる、前記触媒複合体を、前記基板上に形成する工程、
前記金属層の酸化処理を行う工程、および
前記酸化処理された金属層上にカーボンナノチューブを成長させる工程、
を含んでなり、
前記金属層が鉄からなり、
前記金属層の酸化処理がプラズマまたは連続プラズマにより行われる、
ことを特徴とする、方法。 - 前記酸化処理が、第一の圧力および第一のエネルギーで第一のプラズマを用いる第一酸化工程と、前記第一の圧力よりも高い第二の圧力および前記第一のエネルギーよりも低い第二のエネルギーで第二のプラズマを用いる第二酸化工程と、を含んでなる、請求項1に記載の方法。
- 前記プラズマ誘起による酸化が室温において行われる、請求項1または2に記載の方法。
- 前記基板が窒化チタンまたは窒化タンタルからなる、請求項1〜3のいずれか一項に記載の方法。
- 前記カーボンナノチューブマットが第一および第二導電層の相互接続用のビアを製造するために製造され、
前記第一導電層上に拡散バリアが堆積されており、前記拡散バリアおよび前記第一導電層は共に前記導体または半導体基板を形成し、
前記触媒複合体が前記基板上のビアホールの底部に形成されており、
前記カーボンナノチューブの成長時間は、前記カーボンナノチューブの長さが前記ビアホールの深さよりも大きくなるように決定される、請求項1〜4のいずれか一項に記載の方法。 - 前記触媒複合体を前記ビアホールの底部に形成する工程が、
前記拡散バリア上に前記アモルファスシリコン層を堆積させる工程、
前記アモルファスシリコン層上に誘電体層を堆積させ、続いて前記誘電体層上に前記第二導電層を堆積させる工程、および
前記ビアホールを前記エッチングマスクで被覆して、前記アモルファスシリコン層に達するまでエッチングを行う工程、
を含んでなる、請求項5に記載の方法。 - 前記ビアホールをエッチングする工程に続いて、前記金属層を堆積させ、前記マスクを除去して、前記触媒複合体を前記ビアホールの底部に局在化させる、請求項6に記載の方法。
- 前記ビアホールをエッチングする工程に続いて、前記マスクを除去し、前記金属層を堆積させて、前記触媒複合体を前記ビアホールの底部に局在化させ、前記第二導電層を前記金属層で被覆する、請求項6に記載の方法。
- 前記触媒複合体を前記ビアホールの底部に形成する工程が、
前記拡散バリア上に誘電体層を堆積させ、続いて前記誘電体層上に第二導電層を堆積させる工程、
前記ビアホールをエッチングマスクで被覆して、前記アモルファスシリコン層に達するまでエッチングを行い、前記マスクを除去する工程、および
前記金属層を堆積させ、続いて前記第二導電層上に存在する前記触媒複合体が除去されるように化学的−機械的研磨を行い、前記触媒複合体を前記ビアホールの底部に局在化させる工程、を含んでなる、請求項5に記載の方法。 - 前記金属層を、イオンビームスパッタリング手段によって堆積させる、請求項5〜9のいずれか一項に記載の方法。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR0854326A FR2933106B1 (fr) | 2008-06-27 | 2008-06-27 | Procede d'obtention de tapis de nanotubes de carbone sur substat conducteur ou semi-conducteur |
FR0854326 | 2008-06-27 |
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JP2010006696A JP2010006696A (ja) | 2010-01-14 |
JP5769916B2 true JP5769916B2 (ja) | 2015-08-26 |
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EP (1) | EP2138457B1 (ja) |
JP (1) | JP5769916B2 (ja) |
FR (1) | FR2933106B1 (ja) |
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FR2956243B1 (fr) * | 2010-02-11 | 2013-10-25 | Commissariat Energie Atomique | Structure d'interconnexion a base de nanotubes de carbone rediriges |
JP5238775B2 (ja) | 2010-08-25 | 2013-07-17 | 株式会社東芝 | カーボンナノチューブ配線の製造方法 |
JP6016339B2 (ja) * | 2011-08-12 | 2016-10-26 | 東京エレクトロン株式会社 | カーボンナノチューブの加工方法及び加工装置 |
JP5813682B2 (ja) | 2013-03-08 | 2015-11-17 | 株式会社東芝 | 半導体装置及びその製造方法 |
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US6232706B1 (en) * | 1998-11-12 | 2001-05-15 | The Board Of Trustees Of The Leland Stanford Junior University | Self-oriented bundles of carbon nanotubes and method of making same |
DE10006964C2 (de) | 2000-02-16 | 2002-01-31 | Infineon Technologies Ag | Elektronisches Bauelement mit einer leitenden Verbindung zwischen zwei leitenden Schichten und Verfahren zum Herstellen eines elektronischen Bauelements |
JP4120918B2 (ja) * | 2002-03-18 | 2008-07-16 | 富士通株式会社 | 柱状カーボン構造物の選択成長方法及び電子デバイス |
JP2004292216A (ja) * | 2003-03-26 | 2004-10-21 | Canon Inc | 炭素繊維の製造方法およびそれを用いた電子放出素子、画像形成装置 |
US7235159B2 (en) * | 2003-09-17 | 2007-06-26 | Molecular Nanosystems, Inc. | Methods for producing and using catalytic substrates for carbon nanotube growth |
JP4448356B2 (ja) * | 2004-03-26 | 2010-04-07 | 富士通株式会社 | 半導体装置およびその製造方法 |
US7687876B2 (en) * | 2005-04-25 | 2010-03-30 | Smoltek Ab | Controlled growth of a nanostructure on a substrate |
JP5042482B2 (ja) * | 2005-09-06 | 2012-10-03 | 国立大学法人名古屋大学 | カーボンナノチューブ集合体の製造方法 |
EP1964809A4 (en) * | 2005-11-25 | 2009-04-08 | Nat Inst For Materials Science | CARBON NANOTUBE, SUBSTRATE, AND ELECTRON EMITTING ELEMENT EQUIPPED WITH SUCH SUBSTRATE, SUBSTRATE FOR CARBON NANOTUBE SYNTHESIS, METHOD FOR MANUFACTURING SAME, AND DEVICE FOR MANUFACTURING SAME |
KR100745734B1 (ko) * | 2005-12-13 | 2007-08-02 | 삼성에스디아이 주식회사 | 탄소나노튜브의 형성방법 및 이를 이용한 전계방출소자의제조방법 |
JP4730707B2 (ja) * | 2006-03-08 | 2011-07-20 | 株式会社豊田中央研究所 | カーボンナノチューブ合成用触媒及びその製造方法、触媒分散液、並びに、カーボンナノチューブの製造方法 |
JP5089898B2 (ja) * | 2006-03-20 | 2012-12-05 | 株式会社アルバック | カーボンナノチューブの成長方法 |
CN101573797B (zh) * | 2006-09-04 | 2011-01-26 | 皇家飞利浦电子股份有限公司 | 互连结构中的碳纳米结构生长的控制 |
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- 2008-06-27 FR FR0854326A patent/FR2933106B1/fr not_active Expired - Fee Related
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- 2009-06-25 EP EP09163710.8A patent/EP2138457B1/fr active Active
- 2009-06-29 JP JP2009153277A patent/JP5769916B2/ja active Active
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Publication number | Publication date |
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FR2933106B1 (fr) | 2010-12-24 |
EP2138457B1 (fr) | 2019-02-27 |
EP2138457A1 (fr) | 2009-12-30 |
FR2933106A1 (fr) | 2010-01-01 |
JP2010006696A (ja) | 2010-01-14 |
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