KR100837802B1 - 데이터 입출력 오류 검출 기능을 갖는 반도체 메모리 장치 - Google Patents

데이터 입출력 오류 검출 기능을 갖는 반도체 메모리 장치 Download PDF

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KR100837802B1
KR100837802B1 KR1020060088740A KR20060088740A KR100837802B1 KR 100837802 B1 KR100837802 B1 KR 100837802B1 KR 1020060088740 A KR1020060088740 A KR 1020060088740A KR 20060088740 A KR20060088740 A KR 20060088740A KR 100837802 B1 KR100837802 B1 KR 100837802B1
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South Korea
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data
output
error detection
detection code
unit
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KR1020060088740A
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English (en)
Korean (ko)
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KR20080024413A (ko
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윤상식
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주식회사 하이닉스반도체
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Priority to KR1020060088740A priority Critical patent/KR100837802B1/ko
Priority to US11/646,359 priority patent/US7877675B2/en
Priority to JP2007171957A priority patent/JP5086709B2/ja
Publication of KR20080024413A publication Critical patent/KR20080024413A/ko
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    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1006—Data managing, e.g. manipulating data before writing or reading out, data bus switches or control circuits therefor
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1006—Data managing, e.g. manipulating data before writing or reading out, data bus switches or control circuits therefor
    • G11C7/1012—Data reordering during input/output, e.g. crossbars, layers of multiplexers, shifting or rotating
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1051—Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1051—Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
    • G11C7/106—Data output latches
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1078—Data input circuits, e.g. write amplifiers, data input buffers, data input registers, data input level conversion circuits
    • G11C7/1087—Data input latches
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C2029/0411—Online error correction
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2207/00—Indexing scheme relating to arrangements for writing information into, or reading information out from, a digital store
    • G11C2207/10—Aspects relating to interfaces of memory device to external buses
    • G11C2207/104—Embedded memory devices, e.g. memories with a processing device on the same die or ASIC memory designs
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2207/00—Indexing scheme relating to arrangements for writing information into, or reading information out from, a digital store
    • G11C2207/10—Aspects relating to interfaces of memory device to external buses
    • G11C2207/107—Serial-parallel conversion of data or prefetch
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2207/00—Indexing scheme relating to arrangements for writing information into, or reading information out from, a digital store
    • G11C2207/10—Aspects relating to interfaces of memory device to external buses
    • G11C2207/108—Wide data ports

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Dram (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Static Random-Access Memory (AREA)
KR1020060088740A 2006-09-13 2006-09-13 데이터 입출력 오류 검출 기능을 갖는 반도체 메모리 장치 Expired - Fee Related KR100837802B1 (ko)

Priority Applications (3)

Application Number Priority Date Filing Date Title
KR1020060088740A KR100837802B1 (ko) 2006-09-13 2006-09-13 데이터 입출력 오류 검출 기능을 갖는 반도체 메모리 장치
US11/646,359 US7877675B2 (en) 2006-09-13 2006-12-28 Semiconductor memory apparatus capable of detecting error in data input and output
JP2007171957A JP5086709B2 (ja) 2006-09-13 2007-06-29 データ入出力エラー検出機能を有する半導体メモリ装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1020060088740A KR100837802B1 (ko) 2006-09-13 2006-09-13 데이터 입출력 오류 검출 기능을 갖는 반도체 메모리 장치

Publications (2)

Publication Number Publication Date
KR20080024413A KR20080024413A (ko) 2008-03-18
KR100837802B1 true KR100837802B1 (ko) 2008-06-13

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US (1) US7877675B2 (enExample)
JP (1) JP5086709B2 (enExample)
KR (1) KR100837802B1 (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9373421B2 (en) 2014-06-11 2016-06-21 SK Hynix Inc. Semiconductor apparatus with repair information control function

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JP2008204085A (ja) * 2007-02-19 2008-09-04 Toshiba Corp 半導体記憶装置
KR100902051B1 (ko) * 2007-07-12 2009-06-15 주식회사 하이닉스반도체 오류 검사 코드 생성장치 및 방법
US7616133B2 (en) * 2008-01-16 2009-11-10 Micron Technology, Inc. Data bus inversion apparatus, systems, and methods
KR100951567B1 (ko) 2008-02-29 2010-04-09 주식회사 하이닉스반도체 데이터 전달의 신뢰성을 보장하기 위한 반도체 메모리 장치
KR100954109B1 (ko) * 2008-08-29 2010-04-23 주식회사 하이닉스반도체 데이터 입력회로 및 이를 포함하는 반도체 메모리장치
KR100933806B1 (ko) * 2008-09-22 2009-12-24 주식회사 하이닉스반도체 반도체 메모리장치
KR101039862B1 (ko) * 2008-11-11 2011-06-13 주식회사 하이닉스반도체 클럭킹 모드를 구비하는 반도체 메모리장치 및 이의 동작방법
KR101062759B1 (ko) 2009-08-11 2011-09-06 주식회사 하이닉스반도체 반도체 메모리 장치 및 그 데이터 독출 방법
KR101897515B1 (ko) 2012-08-28 2018-09-12 에스케이하이닉스 주식회사 집적회로
KR102035108B1 (ko) 2013-05-20 2019-10-23 에스케이하이닉스 주식회사 반도체 시스템
US9583218B1 (en) * 2014-01-24 2017-02-28 Altera Corporation Configurable register circuitry for error detection and recovery
US11403170B2 (en) * 2014-08-05 2022-08-02 Macronix International Co., Ltd. Method and device for monitoring data error status in a memory
US10908817B2 (en) * 2017-12-08 2021-02-02 Sandisk Technologies Llc Signal reduction in a microcontroller architecture for non-volatile memory
CN112712833B (zh) * 2019-10-25 2024-10-01 长鑫存储技术(上海)有限公司 写操作电路、半导体存储器和写操作方法
US12099746B2 (en) 2019-12-16 2024-09-24 Micron Technology, Inc. Interrupt signaling for a memory device
CN115129234B (zh) * 2021-03-26 2025-01-10 长鑫存储技术有限公司 数据传输电路、方法及存储装置
EP4198704A4 (en) * 2021-03-29 2024-05-15 Changxin Memory Technologies, Inc. DATA TRANSMISSION CIRCUIT AND METHOD AND STORAGE DEVICE
US12182414B2 (en) 2021-09-08 2024-12-31 Changxin Memory Technologies, Inc. Method and apparatus for detecting data path, and storage medium
CN115775588B (zh) * 2021-09-08 2025-10-14 长鑫存储技术有限公司 一种数据路径检测方法、装置、设备及存储介质

Citations (2)

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JPH02143991A (ja) * 1988-11-25 1990-06-01 Hitachi Ltd 半導体記憶装置
KR20010071455A (ko) * 1998-06-11 2001-07-28 추후제출 메모리 장치 테스트를 위한 온-칩 회로 및 방법

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JPS57169867A (en) 1981-04-14 1982-10-19 Nec Corp Detector for picture memory error
JP2554179B2 (ja) * 1989-11-20 1996-11-13 株式会社日立製作所 導通試験方法
JPH05158810A (ja) 1991-12-10 1993-06-25 Fujitsu Ltd 誤り検出回路
JP2002175697A (ja) 2000-12-06 2002-06-21 Toshiba Corp 半導体記憶装置及びこれを用いた情報処理装置
US6742146B2 (en) * 2001-02-14 2004-05-25 Emc Corporation Techniques for providing data within a data storage system
JP4059473B2 (ja) * 2001-08-09 2008-03-12 株式会社ルネサステクノロジ メモリカード及びメモリコントローラ
CA2366397A1 (en) 2001-12-31 2003-06-30 Tropic Networks Inc. An interface for data transfer between integrated circuits
US6898648B2 (en) 2002-02-21 2005-05-24 Micron Technology, Inc. Memory bus polarity indicator system and method for reducing the affects of simultaneous switching outputs (SSO) on memory bus timing
JP2003273840A (ja) * 2002-03-15 2003-09-26 Mitsubishi Heavy Ind Ltd 通信インターフェース装置
CN100356342C (zh) * 2003-11-18 2007-12-19 株式会社瑞萨科技 信息处理装置

Patent Citations (2)

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Publication number Priority date Publication date Assignee Title
JPH02143991A (ja) * 1988-11-25 1990-06-01 Hitachi Ltd 半導体記憶装置
KR20010071455A (ko) * 1998-06-11 2001-07-28 추후제출 메모리 장치 테스트를 위한 온-칩 회로 및 방법

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9373421B2 (en) 2014-06-11 2016-06-21 SK Hynix Inc. Semiconductor apparatus with repair information control function

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KR20080024413A (ko) 2008-03-18
JP2008071470A (ja) 2008-03-27
US20080082900A1 (en) 2008-04-03
JP5086709B2 (ja) 2012-11-28
US7877675B2 (en) 2011-01-25

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