KR100761860B1 - 와이어 본딩 모니터링이 가능한 인터포저 칩을 갖는 적층반도체 패키지 및 이의 제조방법 - Google Patents
와이어 본딩 모니터링이 가능한 인터포저 칩을 갖는 적층반도체 패키지 및 이의 제조방법 Download PDFInfo
- Publication number
- KR100761860B1 KR100761860B1 KR1020060091143A KR20060091143A KR100761860B1 KR 100761860 B1 KR100761860 B1 KR 100761860B1 KR 1020060091143 A KR1020060091143 A KR 1020060091143A KR 20060091143 A KR20060091143 A KR 20060091143A KR 100761860 B1 KR100761860 B1 KR 100761860B1
- Authority
- KR
- South Korea
- Prior art keywords
- chip
- wire
- bonding
- interposer chip
- circuit element
- Prior art date
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 145
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 22
- 238000012544 monitoring process Methods 0.000 title claims description 41
- 238000000034 method Methods 0.000 title claims description 15
- 239000003990 capacitor Substances 0.000 claims abstract description 35
- 239000000758 substrate Substances 0.000 claims description 17
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 9
- 229910052710 silicon Inorganic materials 0.000 claims description 9
- 239000010703 silicon Substances 0.000 claims description 9
- 239000012535 impurity Substances 0.000 claims description 8
- 239000010410 layer Substances 0.000 description 14
- 125000006850 spacer group Chemical group 0.000 description 9
- 238000005516 engineering process Methods 0.000 description 6
- 239000012790 adhesive layer Substances 0.000 description 5
- 238000010586 diagram Methods 0.000 description 3
- 239000002184 metal Substances 0.000 description 3
- 229910052751 metal Inorganic materials 0.000 description 3
- 230000007547 defect Effects 0.000 description 2
- 239000003822 epoxy resin Substances 0.000 description 2
- 229920000647 polyepoxide Polymers 0.000 description 2
- 239000003566 sealing material Substances 0.000 description 2
- 229910000679 solder Inorganic materials 0.000 description 2
- 239000000853 adhesive Substances 0.000 description 1
- 230000001070 adhesive effect Effects 0.000 description 1
- 230000002950 deficient Effects 0.000 description 1
- 239000008393 encapsulating agent Substances 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 239000011229 interlayer Substances 0.000 description 1
- 238000004806 packaging method and process Methods 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/12—Mountings, e.g. non-detachable insulating substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
- H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
- H01L23/3128—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation the substrate having spherical bumps for external connection
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
- H01L24/78—Apparatus for connecting with wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/065—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L25/0657—Stacked arrangements of devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32135—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/32145—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45144—Gold (Au) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/48145—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49171—Fan-out arrangements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
- H01L2224/78—Apparatus for connecting with wire connectors
- H01L2224/7825—Means for applying energy, e.g. heating means
- H01L2224/783—Means for applying energy, e.g. heating means by means of pressure
- H01L2224/78301—Capillary
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
- H01L2224/851—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector the connector being supplied to the parts to be connected in the bonding apparatus
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
- H01L2224/859—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector involving monitoring, e.g. feedback loop
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
- H01L2224/92—Specific sequence of method steps
- H01L2224/922—Connecting different surfaces of the semiconductor or solid-state body with connectors of different types
- H01L2224/9222—Sequential connecting processes
- H01L2224/92242—Sequential connecting processes the first connecting process involving a layer connector
- H01L2224/92247—Sequential connecting processes the first connecting process involving a layer connector the second connecting process involving a wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
- H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
- H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L2225/06503—Stacked arrangements of devices
- H01L2225/06506—Wire or wire-like electrical connections between devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
- H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
- H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L2225/06503—Stacked arrangements of devices
- H01L2225/0651—Wire or wire-like electrical connections from device to substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
- H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
- H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L2225/06503—Stacked arrangements of devices
- H01L2225/06555—Geometry of the stack, e.g. form of the devices, geometry to facilitate stacking
- H01L2225/06562—Geometry of the stack, e.g. form of the devices, geometry to facilitate stacking at least one device in the stack being rotated or offset
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
- H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
- H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L2225/06503—Stacked arrangements of devices
- H01L2225/06572—Auxiliary carrier between devices, the carrier having an electrical connection structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
- H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
- H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L2225/06503—Stacked arrangements of devices
- H01L2225/06575—Auxiliary carrier between devices, the carrier having no electrical connection structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
- H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
- H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L2225/06503—Stacked arrangements of devices
- H01L2225/06582—Housing for the assembly, e.g. chip scale package [CSP]
- H01L2225/06586—Housing with external bump or bump-like connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
- H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
- H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L2225/06503—Stacked arrangements of devices
- H01L2225/06596—Structural arrangements for testing
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L24/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01006—Carbon [C]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01014—Silicon [Si]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01015—Phosphorus [P]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01033—Arsenic [As]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01079—Gold [Au]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01082—Lead [Pb]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01093—Neptunium [Np]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/014—Solder alloys
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/1901—Structure
- H01L2924/1904—Component type
- H01L2924/19041—Component type being a capacitor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19107—Disposition of discrete passive components off-chip wires
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/30105—Capacitance
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Semiconductor Integrated Circuits (AREA)
- Wire Bonding (AREA)
Abstract
Description
Claims (20)
- 배선 기판;상기 배선 기판 상에 형성되고 상기 배선 기판과 와이어 본딩된 제1 반도체 칩;상기 제1 반도체 칩 상에 형성되고 상기 배선 기판과 와이어 본딩된 인터포저 칩;상기 인터포저 칩 상에 형성되고 상기 인터포저 칩과 와이어 본딩되어 상기 인터포저 칩을 통하여 상기 배선기판과 전기적으로 연결된 제2 반도체 칩을 포함하고,상기 인터포저 칩은 극성 및 전류 흐름을 가질 수 있는 회로 요소가 포함되어 있고, 상기 인터포저 칩의 본딩 패드는 상기 회로 요소와 연결되어 와이어 본딩시 와이어 본딩 모니터링이 가능한 것을 특징으로 하는 적층 반도체 패키지.
- 제1항에 있어서, 상기 인터포저 칩에 포함된 회로 요소는 다이오드 또는 커패시터인 것을 특징으로 하는 적층 반도체 패키지.
- 제2항에 있어서, 상기 회로 요소인 다이오드 또는 커패시터는 접지 패드나 접지 라인에 연결되어 있는 것을 특징으로 하는 적층 반도체 패키지.
- 제2항에 있어서, 상기 회로 요소인 다이오드는 실리콘 기판에 구현된 N형 불순물층 및 P형 불순물층이 접합되어 구성되는 것을 특징으로 하는 적층 반도체 패키지.
- 배선 기판 상에 인터포저 칩을 사이에 두고 형성된 복수개의 반도체 칩들을 갖는 적층 반도체 패키지에 있어서,상기 인터포저 칩은 상기 배선 기판의 본딩 패드와 와이어 본딩되고, 상기 복수개의 반도체칩들중 하나의 반도체 칩은 상기 인터포저 칩과 와이어 본딩되고 상기 인터포저 칩을 통하여 상기 배선 기판과 전기적으로 연결되고,상기 인터포저 칩은 극성 및 전류 흐름을 가질 수 있는 회로 요소가 포함되어 있고, 상기 인터포저 칩의 본딩 패드는 상기 회로 요소와 연결되어 와이어 본딩시 와이어 본딩 모니터링이 가능한 것을 특징으로 하는 적층 반도체 패키지.
- 제5항에 있어서, 상기 인터포저 칩에 포함된 회로 요소는 다이오드 또는 커패시터인 것을 특징으로 하는 적층 반도체 패키지.
- 제6항에 있어서, 상기 회로 요소인 다이오드 또는 커패시터는 접지 패드나 접지 라인에 연결되어 있는 것을 특징으로 하는 적층 반도체 패키지.
- 제6항에 있어서, 상기 회로 요소인 다이오드는 실리콘 기판에 구현된 N형 불 순물층 및 P형 불순물층이 접합되어 구성되는 것을 특징으로 하는 적층 반도체 패키지.
- 배선 기판 상에 제1 반도체 칩을 부착하고 와이어 본딩하는 단계;상기 제1 반도체 칩 상에 극성 및 전류 흐름을 가질 수 있는 회로요소가 포함된 인터포저 칩을 부착하고, 상기 인터포저 칩의 본딩 패드와 상기 배선 기판을 와이어 본딩하는 단계;상기 인터포저 칩 상에 제2 반도체 칩을 부착하고, 상기 인터포저 칩의 본딩 패드와 와이어 본딩하여 상기 제2 반도체 칩을 상기 배선 기판과 연결하되,상기 인터포저 칩의 본딩 패드는 상기 회로 요소와 연결되어 있고, 상기 인터포저 칩의 본딩 패드에 와이어 본딩할 때 상기 본딩 패드에 전류를 인가하고, 상기 회로 요소를 통하여 흐르는 전류 또는 전압을 검출하여 와이어 본딩 모니터링을 수행하는 것을 특징으로 하는 적층 반도체 패키지의 제조방법.
- 제9항에 있어서, 상기 회로 요소는 다이오드 또는 커패시터인 것을 특징으로 하는 적층 반도체 패키지의 제조방법.
- 제10항에 있어서, 상기 회로 요소인 다이오드 또는 커패시터는 접지 패드나 접지 라인에 연결하는 것을 특징으로 하는 적층 반도체 패키지의 제조방법.
- 제10항에 있어서, 상기 회로 요소가 다이오드일 경우 상기 와이어 본딩할 때 상기 본딩 패드에 직류를 인가하고, 상기 다이오드를 통하여 흐르는 전류 또는 전압을 검출하여 와이어 본딩 모니터링을 수행하는 것을 특징으로 하는 적층 반도체 패키지의 제조방법.
- 제10항에 있어서, 상기 회로 요소가 커패시터일 경우 상기 와이어 본딩할 때 상기 본딩 패드에 교류를 인가하고, 상기 커패시터를 통하여 흐르는 전류 또는 전압을 검출하여 와이어 본딩 모니터링을 수행하는 것을 특징으로 하는 적층 반도체 패키지의 제조방법.
- 배선 기판 상에 제1 반도체 칩을 부착하고 와이어 본딩하는 단계;상기 제1 반도체 칩 상에 극성 및 전류 흐름을 가질 수 있고, 다이오드가 포함된 인터포저 칩을 부착하고, 상기 인터포저 칩의 본딩 패드와 상기 배선 기판을 와이어 본딩하는 단계;상기 인터포저 칩 상에 제2 반도체 칩을 부착하고, 상기 인터포저 칩의 본딩 패드와 와이어 본딩하여 상기 제2 반도체 칩을 상기 배선 기판과 연결하되,상기 인터포저 칩의 본딩 패드는 상기 다이오드와 연결되어 있고, 상기 인터포저 칩의 본딩 패드에 와이어 본딩할 때 상기 본딩 패드에 직류를 인가하고, 상기 다이오드를 통하여 흐르는 전류 또는 전압을 검출하여 와이어 본딩 모니터링을 수행하는 것을 특징으로 하는 적층 반도체 패키지의 제조방법.
- 배선 기판 상에 제1 반도체 칩을 부착하고 와이어 본딩하는 단계;상기 제1 반도체 칩 상에 극성 및 전류 흐름을 가질 수 있고, 커패시터가 포함된 인터포저 칩을 부착하고, 상기 인터포저 칩의 본딩 패드와 상기 배선 기판을 와이어 본딩하는 단계;상기 인터포저 칩 상에 제2 반도체 칩을 부착하고, 상기 인터포저 칩의 본딩 패드와 와이어 본딩하여 상기 제2 반도체 칩을 상기 배선 기판과 연결하되,상기 인터포저 칩의 본딩 패드는 접지된 커패시터와 연결되어 있고, 상기 인터포저 칩의 본딩 패드에 와이어 본딩할 때 상기 본딩 패드에 교류를 인가하고, 상기 커패시터를 통하여 흐르는 전류 또는 전압을 검출하여 와이어 본딩 모니터링을 수행하는 것을 특징으로 하는 적층 반도체 패키지의 제조방법.
- 배선 기판 상에 인터포저 칩을 사이에 두고 형성된 반도체 칩들이 적층된 적층 반도체 패키지의 제조방법에 있어서,상기 인터포저 칩은 극성 및 전류 흐름을 가질 수 있는 회로 요소가 포함되어 있고, 상기 인터포저 칩의 본딩 패드는 상기 배선 기판과 와이어 본딩하고, 상기 복수개의 반도체칩들중 하나의 반도체 칩은 상기 인터포저 칩의 본딩 패드와 와이어 본딩하여 상기 인터포저 칩을 통하여 상기 배선 기판과 전기적으로 연결하고,상기 인터포저 칩의 본딩 패드는 상기 회로 요소와 연결되어 있고, 상기 인터포저 칩의 본딩 패드에 와이어 본딩할 때 상기 본딩 패드에 전류를 인가하고, 상 기 회로 요소를 통하여 흐르는 전류 또는 전압을 검출하여 와이어 본딩 모니터링을 수행하는 것을 특징으로 하는 적층 반도체 패키지의 제조방법.
- 제16항에 있어서, 상기 회로 요소는 다이오드 또는 커패시터인 것을 특징으로 하는 적층 반도체 패키지의 제조방법.
- 제17항에 있어서, 상기 회로 요소인 다이오드 또는 커패시터는 접지 패드나 접지 라인에 연결하는 것을 특징으로 하는 적층 반도체 패키지의 제조방법.
- 제17항에 있어서, 상기 회로 요소가 다이오드일 경우 상기 와이어 본딩할 때 상기 본딩 패드에 직류를 인가하고, 상기 다이오드를 통하여 흐르는 전류 또는 전압을 검출하여 와이어 본딩 모니터링을 수행하는 것을 특징으로 하는 적층 반도체 패키지의 제조방법.
- 제17항에 있어서, 상기 회로 요소가 커패시터일 경우 상기 와이어 본딩할 때 상기 본딩 패드에 교류를 인가하고, 상기 커패시터를 통하여 흐르는 전류 또는 전압을 검출하여 와이어 본딩 모니터링을 수행하는 것을 특징으로 하는 적층 반도체 패키지의 제조방법.
Priority Applications (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020060091143A KR100761860B1 (ko) | 2006-09-20 | 2006-09-20 | 와이어 본딩 모니터링이 가능한 인터포저 칩을 갖는 적층반도체 패키지 및 이의 제조방법 |
TW096119082A TW200816446A (en) | 2006-09-20 | 2007-05-29 | Stacked semiconductor package, method of fabrication, and method of wire-bond monitoring |
US11/806,589 US7928555B2 (en) | 2006-09-20 | 2007-06-01 | Stack semiconductor package including an interposer chip having an imposed diode or capacitor |
JP2007190046A JP2008078626A (ja) | 2006-09-20 | 2007-07-20 | ワイヤーボンディングモニタリングの可能なインターポーザチップを有する積層半導体パッケージ及びその製造方法 |
CNA2007101534646A CN101150120A (zh) | 2006-09-20 | 2007-09-20 | 堆叠的半导体封装及其制造方法和引线键合监控方法 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020060091143A KR100761860B1 (ko) | 2006-09-20 | 2006-09-20 | 와이어 본딩 모니터링이 가능한 인터포저 칩을 갖는 적층반도체 패키지 및 이의 제조방법 |
Publications (1)
Publication Number | Publication Date |
---|---|
KR100761860B1 true KR100761860B1 (ko) | 2007-09-28 |
Family
ID=38738731
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1020060091143A KR100761860B1 (ko) | 2006-09-20 | 2006-09-20 | 와이어 본딩 모니터링이 가능한 인터포저 칩을 갖는 적층반도체 패키지 및 이의 제조방법 |
Country Status (5)
Country | Link |
---|---|
US (1) | US7928555B2 (ko) |
JP (1) | JP2008078626A (ko) |
KR (1) | KR100761860B1 (ko) |
CN (1) | CN101150120A (ko) |
TW (1) | TW200816446A (ko) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TWI426569B (zh) * | 2007-10-04 | 2014-02-11 | Stats Chippac Ltd | 包含具有釋放主動區的晶粒之積體電路封裝件系統 |
KR20160023969A (ko) | 2014-08-21 | 2016-03-04 | 에스티에스반도체통신 주식회사 | 적층형 반도체 패키지, 적층형 반도체 패키지의 와이어 본딩장치 및 그 제조방법 |
US11974397B2 (en) | 2020-08-18 | 2024-04-30 | Samsung Electronics Co., Ltd. | Circuit board module and electronic device including the same |
Families Citing this family (18)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP5006640B2 (ja) * | 2006-12-22 | 2012-08-22 | 新光電気工業株式会社 | 半導体装置の製造方法 |
US7719122B2 (en) * | 2007-01-11 | 2010-05-18 | Taiwan Semiconductor Manufacturing Co., Ltd. | System-in-package packaging for minimizing bond wire contamination and yield loss |
JP2008172123A (ja) * | 2007-01-15 | 2008-07-24 | Renesas Technology Corp | 半導体装置 |
JP2009188325A (ja) * | 2008-02-08 | 2009-08-20 | Nec Electronics Corp | 半導体パッケージおよび半導体パッケージの製造方法 |
KR101332794B1 (ko) * | 2008-08-05 | 2013-11-25 | 삼성전자주식회사 | 발광 장치, 이를 포함하는 발광 시스템, 상기 발광 장치 및발광 시스템의 제조 방법 |
TWI381512B (zh) * | 2009-11-12 | 2013-01-01 | Powertech Technology Inc | 多晶片堆疊結構 |
US8531013B2 (en) * | 2010-06-11 | 2013-09-10 | Casio Computer Co., Ltd. | Semiconductor device equipped with bonding wires and manufacturing method of semiconductor device equipped with bonding wires |
DE102011008952A1 (de) * | 2011-01-19 | 2012-07-19 | Texas Instruments Deutschland Gmbh | Mehrchipmodul, Verfahren zum Betreiben desselben und DC/DC-Wandler |
CN102520340B (zh) * | 2012-01-06 | 2016-08-03 | 日月光半导体制造股份有限公司 | 具有测试结构的半导体封装元件及其测试方法 |
US9379202B2 (en) * | 2012-11-12 | 2016-06-28 | Nvidia Corporation | Decoupling capacitors for interposers |
CN103456724A (zh) * | 2013-08-05 | 2013-12-18 | 天津大学 | 半导体器件的封装结构 |
KR102163708B1 (ko) * | 2014-04-18 | 2020-10-12 | 에스케이하이닉스 주식회사 | 반도체 패키지 및 반도체 패키지의 제조 방법 |
US20180019194A1 (en) * | 2016-07-14 | 2018-01-18 | Semtech Corporation | Low Parasitic Surface Mount Circuit Over Wirebond IC |
WO2018148444A1 (en) | 2017-02-10 | 2018-08-16 | Behrooz Mehr | Grounding techniques for backside-biased semiconductor dice and related devices, systems and methods |
US10473766B2 (en) | 2017-03-13 | 2019-11-12 | The Charles Stark Draper Laboratory, Inc. | Light detection and ranging (LiDAR) system and method |
CN110444528B (zh) * | 2018-05-04 | 2021-04-20 | 晟碟信息科技(上海)有限公司 | 包含虚设下拉式引线键合体的半导体装置 |
CN112802834A (zh) * | 2020-11-23 | 2021-05-14 | 西安微电子技术研究所 | 一种基于硅转接四层立体堆叠的SiP模块及制作方法 |
CN113410196A (zh) * | 2021-06-15 | 2021-09-17 | 西安微电子技术研究所 | 一种基于硅转接基板的prom与fpga集成结构及其制备方法 |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2005353886A (ja) | 2004-06-11 | 2005-12-22 | Matsushita Electric Ind Co Ltd | 半導体装置、インターポーザ、半導体装置の製造方法及び半導体装置の検査方法 |
KR20060074796A (ko) * | 2004-12-27 | 2006-07-03 | 삼성전자주식회사 | 반도체 소자 패키지 |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2000232235A (ja) * | 1999-02-09 | 2000-08-22 | Rohm Co Ltd | 半導体装置 |
JP3236583B2 (ja) * | 1999-06-24 | 2001-12-10 | ローム株式会社 | 半導体集積回路装置 |
US6532143B2 (en) * | 2000-12-29 | 2003-03-11 | Intel Corporation | Multiple tier array capacitor |
KR20030048250A (ko) | 2001-12-11 | 2003-06-19 | 삼성전자주식회사 | 멀티칩 패키지 |
US8089142B2 (en) * | 2002-02-13 | 2012-01-03 | Micron Technology, Inc. | Methods and apparatus for a stacked-die interposer |
US7098528B2 (en) * | 2003-12-22 | 2006-08-29 | Lsi Logic Corporation | Embedded redistribution interposer for footprint compatible chip package conversion |
KR100621547B1 (ko) | 2004-01-13 | 2006-09-14 | 삼성전자주식회사 | 멀티칩 패키지 |
-
2006
- 2006-09-20 KR KR1020060091143A patent/KR100761860B1/ko active IP Right Grant
-
2007
- 2007-05-29 TW TW096119082A patent/TW200816446A/zh unknown
- 2007-06-01 US US11/806,589 patent/US7928555B2/en active Active
- 2007-07-20 JP JP2007190046A patent/JP2008078626A/ja active Pending
- 2007-09-20 CN CNA2007101534646A patent/CN101150120A/zh active Pending
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2005353886A (ja) | 2004-06-11 | 2005-12-22 | Matsushita Electric Ind Co Ltd | 半導体装置、インターポーザ、半導体装置の製造方法及び半導体装置の検査方法 |
KR20060074796A (ko) * | 2004-12-27 | 2006-07-03 | 삼성전자주식회사 | 반도체 소자 패키지 |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TWI426569B (zh) * | 2007-10-04 | 2014-02-11 | Stats Chippac Ltd | 包含具有釋放主動區的晶粒之積體電路封裝件系統 |
KR20160023969A (ko) | 2014-08-21 | 2016-03-04 | 에스티에스반도체통신 주식회사 | 적층형 반도체 패키지, 적층형 반도체 패키지의 와이어 본딩장치 및 그 제조방법 |
US11974397B2 (en) | 2020-08-18 | 2024-04-30 | Samsung Electronics Co., Ltd. | Circuit board module and electronic device including the same |
Also Published As
Publication number | Publication date |
---|---|
US20080067659A1 (en) | 2008-03-20 |
JP2008078626A (ja) | 2008-04-03 |
TW200816446A (en) | 2008-04-01 |
CN101150120A (zh) | 2008-03-26 |
US7928555B2 (en) | 2011-04-19 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
KR100761860B1 (ko) | 와이어 본딩 모니터링이 가능한 인터포저 칩을 갖는 적층반도체 패키지 및 이의 제조방법 | |
TWI548051B (zh) | Semiconductor device | |
US6249052B1 (en) | Substrate on chip (SOC) multiple-chip module (MCM) with chip-size-package (CSP) ready configuration | |
US7655503B2 (en) | Method for fabricating semiconductor package with stacked chips | |
US20140203278A1 (en) | Chip Package Having Terminal Pads of Different Form Factors | |
US20130256865A1 (en) | Semiconductor module | |
US20030042618A1 (en) | Semiconductor device and a method of manufacturing the same | |
KR20130022829A (ko) | 칩 적층 반도체 소자의 검사 방법 및 이를 이용한 칩 적층 반도체 소자의 제조 방법 | |
US20100025836A1 (en) | Multi-layer package-on-package system | |
JPS6347259B2 (ko) | ||
WO2006106569A1 (ja) | 積層型半導体装置及びその製造方法 | |
KR20100056247A (ko) | 접착층을 구비하는 반도체 패키지 | |
JP2021028927A (ja) | 半導体装置、その製造方法および電子装置 | |
TW200300286A (en) | Package enclosing multiple packaged chips | |
JP5732493B2 (ja) | 半導体装置 | |
US20100127384A1 (en) | Semiconductor device and connection checking method for semiconductor device | |
TWI442488B (zh) | 用於一半導體封裝之基板製程、封裝方法、封裝結構及系統級封裝結構 | |
KR20110012675A (ko) | 반도체 패키지 및 이를 이용한 스택 패키지 | |
JP3939057B2 (ja) | 半導体装置 | |
TW201307860A (zh) | 雙面導通晶片之即測接合方法 | |
JP5331934B2 (ja) | 半導体装置 | |
KR101096453B1 (ko) | 적층 반도체 패키지 | |
JP4439339B2 (ja) | 半導体装置およびその製造方法 | |
JP3971070B2 (ja) | 半導体装置 | |
JP5014943B2 (ja) | 半導体装置、半導体装置の製造方法、および半導体装置のテスト方法 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A201 | Request for examination | ||
E701 | Decision to grant or registration of patent right | ||
GRNT | Written decision to grant | ||
FPAY | Annual fee payment |
Payment date: 20120831 Year of fee payment: 6 |
|
FPAY | Annual fee payment |
Payment date: 20130902 Year of fee payment: 7 |
|
FPAY | Annual fee payment |
Payment date: 20140901 Year of fee payment: 8 |
|
FPAY | Annual fee payment |
Payment date: 20150831 Year of fee payment: 9 |
|
FPAY | Annual fee payment |
Payment date: 20180831 Year of fee payment: 12 |
|
FPAY | Annual fee payment |
Payment date: 20190830 Year of fee payment: 13 |