KR100741541B1 - 접합웨이퍼의 제조방법 및 접합웨이퍼 - Google Patents
접합웨이퍼의 제조방법 및 접합웨이퍼 Download PDFInfo
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- KR100741541B1 KR100741541B1 KR1020027016061A KR20027016061A KR100741541B1 KR 100741541 B1 KR100741541 B1 KR 100741541B1 KR 1020027016061 A KR1020027016061 A KR 1020027016061A KR 20027016061 A KR20027016061 A KR 20027016061A KR 100741541 B1 KR100741541 B1 KR 100741541B1
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- 238000004519 manufacturing process Methods 0.000 title claims abstract description 39
- 238000005468 ion implantation Methods 0.000 claims abstract description 85
- 238000000034 method Methods 0.000 claims abstract description 40
- 238000002347 injection Methods 0.000 claims abstract description 24
- 239000007924 injection Substances 0.000 claims abstract description 24
- 150000002500 ions Chemical class 0.000 claims abstract description 17
- 230000008569 process Effects 0.000 claims abstract description 16
- 239000001257 hydrogen Substances 0.000 claims abstract description 13
- 229910052739 hydrogen Inorganic materials 0.000 claims abstract description 13
- -1 hydrogen ions Chemical class 0.000 claims abstract description 11
- 239000007789 gas Substances 0.000 claims abstract description 8
- 239000002245 particle Substances 0.000 claims description 46
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 30
- 229910052710 silicon Inorganic materials 0.000 claims description 30
- 239000010703 silicon Substances 0.000 claims description 30
- 238000002513 implantation Methods 0.000 claims description 25
- 239000013078 crystal Substances 0.000 claims description 20
- 238000004140 cleaning Methods 0.000 claims description 9
- 239000011800 void material Substances 0.000 abstract description 8
- 235000012431 wafers Nutrition 0.000 description 143
- 239000010408 film Substances 0.000 description 35
- 238000010438 heat treatment Methods 0.000 description 13
- GPRLSGONYQIRFK-UHFFFAOYSA-N hydron Chemical compound [H+] GPRLSGONYQIRFK-UHFFFAOYSA-N 0.000 description 11
- 238000005406 washing Methods 0.000 description 9
- 238000000926 separation method Methods 0.000 description 6
- 230000007547 defect Effects 0.000 description 5
- 238000000227 grinding Methods 0.000 description 4
- 238000004299 exfoliation Methods 0.000 description 3
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- 238000005498 polishing Methods 0.000 description 3
- 238000002360 preparation method Methods 0.000 description 3
- 239000010409 thin film Substances 0.000 description 3
- QGZKDVFQNNGYKY-UHFFFAOYSA-N Ammonia Chemical compound N QGZKDVFQNNGYKY-UHFFFAOYSA-N 0.000 description 2
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 2
- MHAJPDPJQMAIIY-UHFFFAOYSA-N Hydrogen peroxide Chemical compound OO MHAJPDPJQMAIIY-UHFFFAOYSA-N 0.000 description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- 230000005465 channeling Effects 0.000 description 2
- 230000000052 comparative effect Effects 0.000 description 2
- 230000002950 deficient Effects 0.000 description 2
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- 238000010586 diagram Methods 0.000 description 2
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- 230000007246 mechanism Effects 0.000 description 2
- 230000003287 optical effect Effects 0.000 description 2
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- 238000004854 X-ray topography Methods 0.000 description 1
- 229910021529 ammonia Inorganic materials 0.000 description 1
- 238000000149 argon plasma sintering Methods 0.000 description 1
- 239000013043 chemical agent Substances 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- PMHQVHHXPFUNSP-UHFFFAOYSA-M copper(1+);methylsulfanylmethane;bromide Chemical compound Br[Cu].CSC PMHQVHHXPFUNSP-UHFFFAOYSA-M 0.000 description 1
- 230000008878 coupling Effects 0.000 description 1
- 238000010168 coupling process Methods 0.000 description 1
- 238000005859 coupling reaction Methods 0.000 description 1
- 238000001035 drying Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005538 encapsulation Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000011156 evaluation Methods 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
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- 230000002452 interceptive effect Effects 0.000 description 1
- 238000011835 investigation Methods 0.000 description 1
- 238000007517 polishing process Methods 0.000 description 1
- 239000010453 quartz Substances 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 229910052594 sapphire Inorganic materials 0.000 description 1
- 239000010980 sapphire Substances 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
- H01L21/76254—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/974—Substrate surface preparation
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/977—Thinning or removal of substrate
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Element Separation (AREA)
- Pressure Welding/Diffusion-Bonding (AREA)
- Crystals, And After-Treatments Of Crystals (AREA)
Abstract
Description
Claims (24)
- 삭제
- 적어도 제1웨이퍼의 표면으로부터 수소이온 또는 희가스 이온 중 적어도 하나를 주입함으로써 제1웨이퍼 내부에 미소기포층(주입층)을 형성하는 이온주입공정과, 상기 제1웨이퍼의 이온주입이 행해지는 표면과 제2웨이퍼 표면을 밀착시키는 밀착공정과, 상기 미소기포층에서 제1웨이퍼를 박리하는 박리공정을 포함하는 접합웨이퍼의 제조방법에 있어서, 상기 이온주입공정을 복수회로 분할하여 행하고, 상기 복수의 이온주입공정 사이에 적어도 1회의 웨이퍼 세정공정을 실시하는 것을 특징으로 하는 접합웨이퍼의 제조방법.
- 적어도 제1웨이퍼의 표면으로부터 수소이온 또는 희가스 이온 중 적어도 하나를 주입함으로써 제1웨이퍼 내부에 미소기포층(주입층)을 형성하는 이온주입공정과, 상기 제1웨이퍼의 이온주입이 행해지는 표면과 제2웨이퍼 표면을 밀착시키는 밀착공정과, 상기 미소기포층에서 제1웨이퍼를 박리하는 박리공정을 포함하는 접합웨이퍼의 제조방법에 있어서, 상기 이온주입공정을 복수회로 분할하여 행하고, 상기 복수의 이온주입공정에서 주입이온의 주입각도를 변화시켜 이온주입을 실시하는 것을 특징으로 하는 접합웨이퍼의 제조방법.
- 제 2항에 있어서, 상기 복수의 이온주입공정에서 주입이온의 주입각도를 변화시켜 이온주입을 실시하는 것을 특징으로 하는 접합웨이퍼의 제조방법.
- 삭제
- 제 2항에 있어서, 상기 제1웨이퍼로서 실리콘 단결정 웨이퍼를 사용하는 것을 특징으로 하는 접합웨이퍼의 제조방법.
- 제 3항에 있어서, 상기 제1웨이퍼로서 실리콘 단결정 웨이퍼를 사용하는 것을 특징으로 하는 접합웨이퍼의 제조방법.
- 제 4항에 있어서, 상기 제1웨이퍼로서 실리콘 단결정 웨이퍼를 사용하는 것을 특징으로 하는 접합웨이퍼의 제조방법
- 제 2항 내지 제 4항 및 제 6항 내지 제 8항 중 어느 한 항에 있어서, 이온주입 전에 상기 제1웨이퍼 표면에 미리 산화막을 형성하는 것을 특징으로 하는 접합웨이퍼의 제조방법.
- 제 2항 내지 제 4항 및 제 6항 내지 제 8항 중 어느 한 항에 있어서, 상기 제2웨이퍼로서 실리콘 단결정 웨이퍼를 사용하는 것을 특징으로 하는 접합웨이퍼의 제조방법.
- 제 9항에 있어서, 상기 제2웨이퍼로서 실리콘 단결정 웨이퍼를 사용하는 것을 특징으로 하는 접합웨이퍼의 제조방법.
- 제 2항 내지 제 4항 및 제 6항 내지 제 8항 중 어느 한 항에 있어서, 상기 제2웨이퍼 표면에 산화막을 형성하는 것을 특징으로 하는 접합웨이퍼의 제조방법.
- 제 9항에 있어서, 상기 제2웨이퍼 표면에 산화막을 형성하는 것을 특징으로 하는 접합웨이퍼의 제조방법.
- 제 10항에 있어서, 상기 제2웨이퍼 표면에 산화막을 형성하는 것을 특징으로 하는 접합웨이퍼의 제조방법.
- 제 11항에 있어서, 상기 제2웨이퍼 표면에 산화막을 형성하는 것을 특징으로 하는 접합웨이퍼의 제조방법.
- 제 2항 내지 제 4항 및 제 6항 내지 제 8항 중 어느 한 항에 기재한 제조방법에 의해 제조된 것을 특징으로 하는 접합웨이퍼.
- 제 9항에 기재한 제조방법에 의해 제조된 것을 특징으로 하는 접합웨이퍼.
- 제 10항에 기재한 제조방법에 의해 제조된 것을 특징으로 하는 접합웨이퍼.
- 제 11항에 기재한 제조방법에 의해 제조된 것을 특징으로 하는 접합웨이퍼.
- 제 12항에 기재한 제조방법에 의해 제조된 것을 특징으로 하는 접합웨이퍼.
- 제 13항에 기재한 제조방법에 의해 제조된 것을 특징으로 하는 접합웨이퍼.
- 제 14항에 기재한 제조방법에 의해 제조된 것을 특징으로 하는 접합웨이퍼.
- 제 15항에 기재한 제조방법에 의해 제조된 것을 특징으로 하는 접합웨이퍼.
- 수소이온 또는 희가스 이온 중 적어도 하나가 주입된 미소기포층(주입층)을 갖는 제1웨이퍼에, 상기 제1웨이퍼의 이온주입면에 제2웨이퍼를 밀착하고, 상기 제1웨이퍼의 미소기포층에서 박리된 접합웨이퍼로서, 이온주입면에 부착된 파티클의 이온주입의 그늘(影)이 되는 부분에 발생하는 마이크로 보이드가 존재하지 않는 것을 특징으로 하는 접합웨이퍼.
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
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JP2000160499 | 2000-05-30 | ||
JPJP-P-2000-00160499 | 2000-05-30 | ||
PCT/JP2001/004499 WO2001093334A1 (fr) | 2000-05-30 | 2001-05-29 | Procede de fabrication d'une plaquette collee et cette derniere |
Publications (2)
Publication Number | Publication Date |
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KR20030004440A KR20030004440A (ko) | 2003-01-14 |
KR100741541B1 true KR100741541B1 (ko) | 2007-07-20 |
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KR1020027016061A KR100741541B1 (ko) | 2000-05-30 | 2001-05-29 | 접합웨이퍼의 제조방법 및 접합웨이퍼 |
Country Status (4)
Country | Link |
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US (1) | US6900113B2 (ko) |
EP (1) | EP1302985A1 (ko) |
KR (1) | KR100741541B1 (ko) |
WO (1) | WO2001093334A1 (ko) |
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JP4103391B2 (ja) | 1999-10-14 | 2008-06-18 | 信越半導体株式会社 | Soiウエーハの製造方法及びsoiウエーハ |
JP4628580B2 (ja) * | 2001-04-18 | 2011-02-09 | 信越半導体株式会社 | 貼り合せ基板の製造方法 |
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FR2868599B1 (fr) * | 2004-03-30 | 2006-07-07 | Soitec Silicon On Insulator | Traitement chimique optimise de type sc1 pour le nettoyage de plaquettes en materiau semiconducteur |
JP4730581B2 (ja) * | 2004-06-17 | 2011-07-20 | 信越半導体株式会社 | 貼り合わせウェーハの製造方法 |
FR2884647B1 (fr) * | 2005-04-15 | 2008-02-22 | Soitec Silicon On Insulator | Traitement de plaques de semi-conducteurs |
JP2006303089A (ja) | 2005-04-19 | 2006-11-02 | Sumco Corp | シリコン基板の洗浄方法 |
TWI270928B (en) * | 2005-07-22 | 2007-01-11 | Sino American Silicon Products | Method of manufacturing composite wafer sructure |
US20070023850A1 (en) * | 2005-07-30 | 2007-02-01 | Chien-Hua Chen | Bonding surfaces together via plasma treatment on both surfaces with wet treatment on only one surface |
US7781309B2 (en) * | 2005-12-22 | 2010-08-24 | Sumco Corporation | Method for manufacturing direct bonded SOI wafer and direct bonded SOI wafer manufactured by the method |
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US8101501B2 (en) * | 2007-10-10 | 2012-01-24 | Semiconductor Energy Laboratory Co., Ltd. | Method of manufacturing semiconductor device |
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US8445358B2 (en) * | 2010-03-31 | 2013-05-21 | Semiconductor Energy Laboratory Co., Ltd. | Method for manufacturing semiconductor substrate and method for manufacturing semiconductor device |
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JP5802436B2 (ja) | 2011-05-30 | 2015-10-28 | 信越半導体株式会社 | 貼り合わせウェーハの製造方法 |
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2001
- 2001-05-29 KR KR1020027016061A patent/KR100741541B1/ko active IP Right Grant
- 2001-05-29 US US10/296,900 patent/US6900113B2/en not_active Expired - Lifetime
- 2001-05-29 EP EP01932319A patent/EP1302985A1/en not_active Withdrawn
- 2001-05-29 WO PCT/JP2001/004499 patent/WO2001093334A1/ja not_active Application Discontinuation
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US6027988A (en) | 1997-05-28 | 2000-02-22 | The Regents Of The University Of California | Method of separating films from bulk substrates by plasma immersion ion implantation |
US5909627A (en) | 1998-05-18 | 1999-06-01 | Philips Electronics North America Corporation | Process for production of thin layers of semiconductor material |
KR20000011625A (ko) * | 1998-07-10 | 2000-02-25 | 와다 다다시 | 접합웨이퍼의제조방법및접합웨이퍼 |
JP2000331899A (ja) * | 1999-05-21 | 2000-11-30 | Shin Etsu Handotai Co Ltd | Soiウェーハの製造方法およびsoiウェーハ |
Also Published As
Publication number | Publication date |
---|---|
WO2001093334A1 (fr) | 2001-12-06 |
KR20030004440A (ko) | 2003-01-14 |
US6900113B2 (en) | 2005-05-31 |
US20030153162A1 (en) | 2003-08-14 |
EP1302985A1 (en) | 2003-04-16 |
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