KR100676995B1 - 금속 라인들의 사후 에칭 부식을 감소시키기 위한 금속배선 에칭 기술 - Google Patents

금속 라인들의 사후 에칭 부식을 감소시키기 위한 금속배선 에칭 기술 Download PDF

Info

Publication number
KR100676995B1
KR100676995B1 KR1019990039490A KR19990039490A KR100676995B1 KR 100676995 B1 KR100676995 B1 KR 100676995B1 KR 1019990039490 A KR1019990039490 A KR 1019990039490A KR 19990039490 A KR19990039490 A KR 19990039490A KR 100676995 B1 KR100676995 B1 KR 100676995B1
Authority
KR
South Korea
Prior art keywords
hard mask
layer
metallization
etch
metal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
KR1019990039490A
Other languages
English (en)
Korean (ko)
Other versions
KR20000023166A (ko
Inventor
마틴 구췌
페터 슈트로블
슈테판 베게
아이케 뤼켄
게오르크 슈토야코빅
브루노 슈풀러
Original Assignee
지멘스 악티엔게젤샤프트
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 지멘스 악티엔게젤샤프트 filed Critical 지멘스 악티엔게젤샤프트
Publication of KR20000023166A publication Critical patent/KR20000023166A/ko
Application granted granted Critical
Publication of KR100676995B1 publication Critical patent/KR100676995B1/ko
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Images

Classifications

    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/06Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of metallic material
    • C23C16/18Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of metallic material from metallo-organic compounds
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02041Cleaning
    • H01L21/02057Cleaning during device manufacture
    • H01L21/02068Cleaning during device manufacture during, before or after processing of conductive layers, e.g. polysilicon or amorphous silicon layers
    • H01L21/02071Cleaning during device manufacture during, before or after processing of conductive layers, e.g. polysilicon or amorphous silicon layers the processing being a delineation, e.g. RIE, of conductive layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321After treatment
    • H01L21/3213Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32133Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
    • H01L21/32135Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only
    • H01L21/32136Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only using plasmas
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321After treatment
    • H01L21/3213Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32139Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer using masks

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • General Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Plasma & Fusion (AREA)
  • Materials Engineering (AREA)
  • Mechanical Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Drying Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
KR1019990039490A 1998-09-15 1999-09-15 금속 라인들의 사후 에칭 부식을 감소시키기 위한 금속배선 에칭 기술 Expired - Fee Related KR100676995B1 (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US09/153,390 1998-09-15
US09/153,390 US6177353B1 (en) 1998-09-15 1998-09-15 Metallization etching techniques for reducing post-etch corrosion of metal lines
US9/153,390 1998-09-15

Publications (2)

Publication Number Publication Date
KR20000023166A KR20000023166A (ko) 2000-04-25
KR100676995B1 true KR100676995B1 (ko) 2007-01-31

Family

ID=22547020

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019990039490A Expired - Fee Related KR100676995B1 (ko) 1998-09-15 1999-09-15 금속 라인들의 사후 에칭 부식을 감소시키기 위한 금속배선 에칭 기술

Country Status (7)

Country Link
US (1) US6177353B1 (enExample)
EP (1) EP0987745B1 (enExample)
JP (1) JP4690512B2 (enExample)
KR (1) KR100676995B1 (enExample)
CN (1) CN1146967C (enExample)
DE (1) DE69935100T2 (enExample)
TW (1) TW457583B (enExample)

Families Citing this family (50)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100528685B1 (ko) * 1998-03-12 2005-11-15 가부시끼가이샤 히다치 세이사꾸쇼 시료의 표면 가공방법
KR100283425B1 (ko) * 1998-09-24 2001-04-02 윤종용 반도체소자의금속배선형성공정및그시스템
US6399508B1 (en) * 1999-01-12 2002-06-04 Applied Materials, Inc. Method for metal etch using a dielectric hard mask
JP3257533B2 (ja) * 1999-01-25 2002-02-18 日本電気株式会社 無機反射防止膜を使った配線形成方法
US6291361B1 (en) * 1999-03-24 2001-09-18 Conexant Systems, Inc. Method and apparatus for high-resolution in-situ plasma etching of inorganic and metal films
US6576562B2 (en) * 2000-12-15 2003-06-10 Kabushiki Kaisha Toshiba Manufacturing method of semiconductor device using mask pattern having high etching resistance
DE10062639A1 (de) * 2000-12-15 2002-07-04 Infineon Technologies Ag Verfahren zur Erzeugung von Leiterbahnen
TWI243404B (en) * 2001-05-24 2005-11-11 Lam Res Corp Applications of oxide hardmasking in metal dry etch processors
KR100402239B1 (ko) * 2001-06-30 2003-10-17 주식회사 하이닉스반도체 반도체소자의 금속 게이트 형성방법
SG96644A1 (en) * 2001-09-11 2003-06-16 Chartered Semiconductor Mfg Etch/clean process for integrated circuit pad metal
KR100464430B1 (ko) * 2002-08-20 2005-01-03 삼성전자주식회사 하드 마스크를 이용한 알루미늄막 식각 방법 및 반도체소자의 배선 형성 방법
KR100478498B1 (ko) * 2003-01-30 2005-03-28 동부아남반도체 주식회사 반도체 소자의 금속 배선 형성 방법
US20040171272A1 (en) * 2003-02-28 2004-09-02 Applied Materials, Inc. Method of etching metallic materials to form a tapered profile
EP1475848B1 (en) * 2003-05-07 2006-12-20 STMicroelectronics S.r.l. Process for defining a chalcogenide material layer, in particular in a process for manufacturing phase change memory cells
KR100523141B1 (ko) * 2003-07-18 2005-10-19 매그나칩 반도체 유한회사 반도체 소자의 금속 배선층 형성방법
US20060169968A1 (en) * 2005-02-01 2006-08-03 Thomas Happ Pillar phase change memory cell
JP5110831B2 (ja) * 2006-08-31 2012-12-26 キヤノン株式会社 光電変換装置及び撮像システム
US20080094885A1 (en) * 2006-10-24 2008-04-24 Macronix International Co., Ltd. Bistable Resistance Random Access Memory Structures with Multiple Memory Layers and Multilevel Memory States
US20100003828A1 (en) * 2007-11-28 2010-01-07 Guowen Ding Methods for adjusting critical dimension uniformity in an etch process with a highly concentrated unsaturated hydrocarbon gas
US8748323B2 (en) 2008-07-07 2014-06-10 Macronix International Co., Ltd. Patterning method
US12444651B2 (en) 2009-08-04 2025-10-14 Novellus Systems, Inc. Tungsten feature fill with nucleation inhibition
US9683305B2 (en) * 2011-12-20 2017-06-20 Apple Inc. Metal surface and process for treating a metal surface
US8859418B2 (en) 2012-01-11 2014-10-14 Globalfoundries Inc. Methods of forming conductive structures using a dual metal hard mask technique
CN102723273B (zh) * 2012-05-28 2015-03-11 上海华力微电子有限公司 一种扩大铝线干法刻蚀腐蚀缺陷工艺窗口的方法
CN102820261A (zh) * 2012-08-22 2012-12-12 上海宏力半导体制造有限公司 铝刻蚀的方法
JP2015056578A (ja) * 2013-09-13 2015-03-23 株式会社東芝 半導体装置の製造方法
US9633867B2 (en) * 2015-01-05 2017-04-25 Lam Research Corporation Method and apparatus for anisotropic tungsten etching
US9576811B2 (en) 2015-01-12 2017-02-21 Lam Research Corporation Integrating atomic scale processes: ALD (atomic layer deposition) and ALE (atomic layer etch)
CN104658905B (zh) * 2015-02-27 2018-01-05 深圳市华星光电技术有限公司 一种刻蚀方法及基板
US9806252B2 (en) 2015-04-20 2017-10-31 Lam Research Corporation Dry plasma etch method to pattern MRAM stack
US9870899B2 (en) 2015-04-24 2018-01-16 Lam Research Corporation Cobalt etch back
US9972504B2 (en) 2015-08-07 2018-05-15 Lam Research Corporation Atomic layer etching of tungsten for enhanced tungsten deposition fill
US10096487B2 (en) 2015-08-19 2018-10-09 Lam Research Corporation Atomic layer etching of tungsten and other metals
US9984858B2 (en) 2015-09-04 2018-05-29 Lam Research Corporation ALE smoothness: in and outside semiconductor industry
US10229837B2 (en) 2016-02-04 2019-03-12 Lam Research Corporation Control of directionality in atomic layer etching
US10727073B2 (en) 2016-02-04 2020-07-28 Lam Research Corporation Atomic layer etching 3D structures: Si and SiGe and Ge smoothness on horizontal and vertical surfaces
US9991128B2 (en) 2016-02-05 2018-06-05 Lam Research Corporation Atomic layer etching in continuous plasma
US10269566B2 (en) 2016-04-29 2019-04-23 Lam Research Corporation Etching substrates using ale and selective deposition
US9837312B1 (en) 2016-07-22 2017-12-05 Lam Research Corporation Atomic layer etching for enhanced bottom-up feature fill
JP6785101B2 (ja) * 2016-09-09 2020-11-18 東京エレクトロン株式会社 プラズマエッチング方法
US10566212B2 (en) 2016-12-19 2020-02-18 Lam Research Corporation Designer atomic layer etching
US10559461B2 (en) 2017-04-19 2020-02-11 Lam Research Corporation Selective deposition with atomic layer etch reset
US10832909B2 (en) 2017-04-24 2020-11-10 Lam Research Corporation Atomic layer etch, reactive precursors and energetic sources for patterning applications
US9997371B1 (en) 2017-04-24 2018-06-12 Lam Research Corporation Atomic layer etch methods and hardware for patterning applications
EP3776636B1 (en) 2018-03-30 2025-05-07 Lam Research Corporation Atomic layer etching and smoothing of refractory metals and other high surface binding energy materials
TWI812762B (zh) * 2018-07-30 2023-08-21 日商東京威力科創股份有限公司 處理被處理體之方法、處理裝置及處理系統
CN114156178A (zh) * 2020-09-04 2022-03-08 中芯集成电路(宁波)有限公司 半导体结构的形成方法
CN115938937B (zh) * 2023-03-09 2023-06-09 合肥晶合集成电路股份有限公司 半导体结构及其制备方法
US20240429064A1 (en) * 2023-06-26 2024-12-26 Taiwan Semiconductor Manufacturing Company, Ltd. Metal etching with reduced tilt angle
US20250308897A1 (en) * 2024-03-28 2025-10-02 Tokyo Electron Limited Hard mask protection of metal interconnects

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2286721A (en) * 1994-02-15 1995-08-23 Nec Corp Method for fabricating semiconductor device

Family Cites Families (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6033367A (ja) * 1983-08-04 1985-02-20 Nec Corp アルミニウムのドライエッチング方法
US5211804A (en) 1990-10-16 1993-05-18 Oki Electric Industry, Co., Ltd. Method for dry etching
DE4107006A1 (de) * 1991-03-05 1992-09-10 Siemens Ag Verfahren zum anisotropen trockenaetzen von aluminium bzw. aluminiumlegierungen enthaltenden leiterbahnebenen in integrierten halbleiterschaltungen
US5270254A (en) * 1991-03-27 1993-12-14 Sgs-Thomson Microelectronics, Inc. Integrated circuit metallization with zero contact enclosure requirements and method of making the same
JPH05166756A (ja) * 1991-12-12 1993-07-02 Hitachi Ltd エッチング装置
US5387556A (en) * 1993-02-24 1995-02-07 Applied Materials, Inc. Etching aluminum and its alloys using HC1, C1-containing etchant and N.sub.2
US5573973A (en) * 1993-03-19 1996-11-12 National Semiconductor Corporation Integrated circuit having a diamond thin film trench arrangement as a component thereof and method
JP3161888B2 (ja) * 1993-09-17 2001-04-25 株式会社日立製作所 ドライエッチング方法
US5545289A (en) 1994-02-03 1996-08-13 Applied Materials, Inc. Passivating, stripping and corrosion inhibition of semiconductor substrates
JPH07249607A (ja) * 1994-03-14 1995-09-26 Fujitsu Ltd 半導体装置の製造方法
US5779926A (en) * 1994-09-16 1998-07-14 Applied Materials, Inc. Plasma process for etching multicomponent alloys
US5633424A (en) * 1994-12-29 1997-05-27 Graves; Clinton G. Device and methods for plasma sterilization
JP3353524B2 (ja) * 1995-03-22 2002-12-03 ソニー株式会社 接続孔を形成する工程を有する半導体装置の製造方法
US5585285A (en) * 1995-12-06 1996-12-17 Micron Technology, Inc. Method of forming dynamic random access memory circuitry using SOI and isolation trenches
US5654233A (en) * 1996-04-08 1997-08-05 Taiwan Semiconductor Manufacturing Company Ltd Step coverage enhancement process for sub half micron contact/via
US5827437A (en) * 1996-05-17 1998-10-27 Lam Research Corporation Multi-step metallization etch
US5741741A (en) * 1996-05-23 1998-04-21 Vanguard International Semiconductor Corporation Method for making planar metal interconnections and metal plugs on semiconductor substrates
JP3112832B2 (ja) * 1996-05-30 2000-11-27 日本電気株式会社 半導体装置の製造方法
US5792687A (en) * 1996-08-01 1998-08-11 Vanguard International Semiconductor Corporation Method for fabricating high density integrated circuits using oxide and polysilicon spacers
US5976986A (en) * 1996-08-06 1999-11-02 International Business Machines Corp. Low pressure and low power C12 /HC1 process for sub-micron metal etching
JP3258240B2 (ja) * 1996-09-10 2002-02-18 株式会社日立製作所 エッチング方法
JP3006508B2 (ja) * 1996-10-15 2000-02-07 日本電気株式会社 アルミニウム膜又はアルミニウム合金膜のエッチング方法
US5801082A (en) * 1997-08-18 1998-09-01 Vanguard International Semiconductor Corporation Method for making improved shallow trench isolation with dielectric studs for semiconductor integrated circuits
KR100255663B1 (ko) * 1997-12-11 2000-05-01 윤종용 알루미늄막의 식각방법 및 반도체장치의 배선층 형성방법

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2286721A (en) * 1994-02-15 1995-08-23 Nec Corp Method for fabricating semiconductor device

Also Published As

Publication number Publication date
CN1146967C (zh) 2004-04-21
US6177353B1 (en) 2001-01-23
DE69935100D1 (de) 2007-03-29
EP0987745A1 (en) 2000-03-22
EP0987745B1 (en) 2007-02-14
KR20000023166A (ko) 2000-04-25
JP4690512B2 (ja) 2011-06-01
TW457583B (en) 2001-10-01
DE69935100T2 (de) 2007-12-13
JP2000323483A (ja) 2000-11-24
CN1270415A (zh) 2000-10-18

Similar Documents

Publication Publication Date Title
KR100676995B1 (ko) 금속 라인들의 사후 에칭 부식을 감소시키기 위한 금속배선 에칭 기술
WO1999003143A1 (en) Patterned copper etch for micron and submicron features, using enhanced physical bombardment
US6613681B1 (en) Method of removing etch residues
EP1053566B1 (en) Method and composition for dry photoresist stripping in semiconductor fabrication
KR100493486B1 (ko) 개선된 전도층 엣칭방법 및 장치
US6576404B2 (en) Carbon-doped hard mask and method of passivating structures during semiconductor device fabrication
US6806038B2 (en) Plasma passivation
JP3318801B2 (ja) ドライエッチング方法
US6420099B1 (en) Tungsten hard mask for dry etching aluminum-containing layers
US6921493B2 (en) Method of processing substrates
US6077777A (en) Method for forming wires of semiconductor device
JP2006148122A (ja) 半導体基板上の金属構造から残留物を除去するための方法
JP3082396B2 (ja) 半導体装置の製造方法
US6399509B1 (en) Defects reduction for a metal etcher
KR100484896B1 (ko) 금속 식각 공정 시 금속 부식 방지 방법
KR19980044194A (ko) 반도체 소자의 금속배선 형성방법
HK1023648A (en) Metallization etching method using a hard mask layer
KR950014943B1 (ko) 금속층 식각시 생성된 실리콘 잔류물 제거방법
KR0141172B1 (ko) 금속배선 형성방법
KR100364809B1 (ko) 반도체 소자의 포스트 메탈 식각/애싱 방법
KR100467817B1 (ko) 반도체 소자의 금속배선 부식 방지방법
JPH04330724A (ja) 配線形成方法
US20070227555A1 (en) Method to manipulate post metal etch/side wall residue
JP2001015494A (ja) 半導体装置の製造方法およびエッチング方法
JPH11204410A (ja) 半導体装置の製造方法

Legal Events

Date Code Title Description
PA0109 Patent application

St.27 status event code: A-0-1-A10-A12-nap-PA0109

PN2301 Change of applicant

St.27 status event code: A-3-3-R10-R13-asn-PN2301

St.27 status event code: A-3-3-R10-R11-asn-PN2301

PG1501 Laying open of application

St.27 status event code: A-1-1-Q10-Q12-nap-PG1501

A201 Request for examination
P11-X000 Amendment of application requested

St.27 status event code: A-2-2-P10-P11-nap-X000

P13-X000 Application amended

St.27 status event code: A-2-2-P10-P13-nap-X000

PA0201 Request for examination

St.27 status event code: A-1-2-D10-D11-exm-PA0201

E902 Notification of reason for refusal
PE0902 Notice of grounds for rejection

St.27 status event code: A-1-2-D10-D21-exm-PE0902

T11-X000 Administrative time limit extension requested

St.27 status event code: U-3-3-T10-T11-oth-X000

E13-X000 Pre-grant limitation requested

St.27 status event code: A-2-3-E10-E13-lim-X000

P11-X000 Amendment of application requested

St.27 status event code: A-2-2-P10-P11-nap-X000

P13-X000 Application amended

St.27 status event code: A-2-2-P10-P13-nap-X000

E701 Decision to grant or registration of patent right
PE0701 Decision of registration

St.27 status event code: A-1-2-D10-D22-exm-PE0701

GRNT Written decision to grant
PR0701 Registration of establishment

St.27 status event code: A-2-4-F10-F11-exm-PR0701

PR1002 Payment of registration fee

St.27 status event code: A-2-2-U10-U11-oth-PR1002

Fee payment year number: 1

PG1601 Publication of registration

St.27 status event code: A-4-4-Q10-Q13-nap-PG1601

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 4

R18-X000 Changes to party contact information recorded

St.27 status event code: A-5-5-R10-R18-oth-X000

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 5

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 6

FPAY Annual fee payment

Payment date: 20130118

Year of fee payment: 7

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 7

FPAY Annual fee payment

Payment date: 20140116

Year of fee payment: 8

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 8

FPAY Annual fee payment

Payment date: 20150115

Year of fee payment: 9

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 9

PN2301 Change of applicant

St.27 status event code: A-5-5-R10-R11-asn-PN2301

FPAY Annual fee payment

Payment date: 20160104

Year of fee payment: 10

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 10

PN2301 Change of applicant

St.27 status event code: A-5-5-R10-R14-asn-PN2301

FPAY Annual fee payment

Payment date: 20170102

Year of fee payment: 11

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 11

R18-X000 Changes to party contact information recorded

St.27 status event code: A-5-5-R10-R18-oth-X000

LAPS Lapse due to unpaid annual fee
PC1903 Unpaid annual fee

St.27 status event code: A-4-4-U10-U13-oth-PC1903

Not in force date: 20180126

Payment event data comment text: Termination Category : DEFAULT_OF_REGISTRATION_FEE

PC1903 Unpaid annual fee

St.27 status event code: N-4-6-H10-H13-oth-PC1903

Ip right cessation event data comment text: Termination Category : DEFAULT_OF_REGISTRATION_FEE

Not in force date: 20180126