KR100475265B1 - 리이드프레임과그것을사용한반도체장치및그제조방법 - Google Patents

리이드프레임과그것을사용한반도체장치및그제조방법 Download PDF

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Publication number
KR100475265B1
KR100475265B1 KR1019970008685A KR19970008685A KR100475265B1 KR 100475265 B1 KR100475265 B1 KR 100475265B1 KR 1019970008685 A KR1019970008685 A KR 1019970008685A KR 19970008685 A KR19970008685 A KR 19970008685A KR 100475265 B1 KR100475265 B1 KR 100475265B1
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KR
South Korea
Prior art keywords
semiconductor chip
support
lead
inner lead
tip
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
KR1019970008685A
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English (en)
Korean (ko)
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KR970067736A (ko
Inventor
시게키 다나카
아츠시 후지사와
소우이치 나가노
츠기히코 히라노
료이치 오타
다카후미 곤노
겐이치 다테베
도시아키 오카모토
Original Assignee
히타치 홋카이 세미콘덕터 가부시키가이샤
가부시끼가이샤 히다치 세이사꾸쇼
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 히타치 홋카이 세미콘덕터 가부시키가이샤, 가부시끼가이샤 히다치 세이사꾸쇼 filed Critical 히타치 홋카이 세미콘덕터 가부시키가이샤
Publication of KR970067736A publication Critical patent/KR970067736A/ko
Application granted granted Critical
Publication of KR100475265B1 publication Critical patent/KR100475265B1/ko
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W40/00Arrangements for thermal protection or thermal control
    • H10W40/70Fillings or auxiliary members in containers or in encapsulations for thermal protection or control
    • H10W40/77Auxiliary members characterised by their shape
    • H10W40/778Auxiliary members characterised by their shape in encapsulations
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40Leadframes
    • H10W70/421Shapes or dispositions
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/50Bond wires
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/90Bond pads, in general
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/071Connecting or disconnecting
    • H10W72/075Connecting or disconnecting of bond wires
    • H10W72/07541Controlling the environment, e.g. atmosphere composition or temperature
    • H10W72/07554Controlling the environment, e.g. atmosphere composition or temperature changes in dispositions
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/50Bond wires
    • H10W72/541Dispositions of bond wires
    • H10W72/5449Dispositions of bond wires not being orthogonal to a side surface of the chip, e.g. fan-out arrangements
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/50Bond wires
    • H10W72/551Materials of bond wires
    • H10W72/552Materials of bond wires comprising metals or metalloids, e.g. silver
    • H10W72/5522Materials of bond wires comprising metals or metalloids, e.g. silver comprising gold [Au]
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/50Bond wires
    • H10W72/581Auxiliary members, e.g. flow barriers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/50Bond wires
    • H10W72/59Bond pads specially adapted therefor
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/851Dispositions of multiple connectors or interconnections
    • H10W72/874On different surfaces
    • H10W72/884Die-attach connectors and bond wires
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/90Bond pads, in general
    • H10W72/931Shapes of bond pads
    • H10W72/932Plan-view shape, i.e. in top view
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/90Bond pads, in general
    • H10W72/941Dispositions of bond pads
    • H10W72/944Dispositions of multiple bond pads
    • H10W72/9445Top-view layouts, e.g. mirror arrays
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/90Bond pads, in general
    • H10W72/951Materials of bond pads
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00Encapsulations, e.g. protective coatings
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/756Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink

Landscapes

  • Lead Frames For Integrated Circuits (AREA)
  • Wire Bonding (AREA)
KR1019970008685A 1996-03-18 1997-03-14 리이드프레임과그것을사용한반도체장치및그제조방법 Expired - Fee Related KR100475265B1 (ko)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
JP96-60421 1996-03-18
JP6042196 1996-03-18
JP97-8964 1997-01-21
JP9008964A JPH09312375A (ja) 1996-03-18 1997-01-21 リードフレーム、半導体装置及び半導体装置の製造方法

Related Child Applications (1)

Application Number Title Priority Date Filing Date
KR1020040022788A Division KR100473261B1 (ko) 1996-03-18 2004-04-02 반도체장치

Publications (2)

Publication Number Publication Date
KR970067736A KR970067736A (ko) 1997-10-13
KR100475265B1 true KR100475265B1 (ko) 2005-07-01

Family

ID=26343600

Family Applications (2)

Application Number Title Priority Date Filing Date
KR1019970008685A Expired - Fee Related KR100475265B1 (ko) 1996-03-18 1997-03-14 리이드프레임과그것을사용한반도체장치및그제조방법
KR1020040022788A Expired - Fee Related KR100473261B1 (ko) 1996-03-18 2004-04-02 반도체장치

Family Applications After (1)

Application Number Title Priority Date Filing Date
KR1020040022788A Expired - Fee Related KR100473261B1 (ko) 1996-03-18 2004-04-02 반도체장치

Country Status (6)

Country Link
US (1) US6265762B1 (https=)
JP (1) JPH09312375A (https=)
KR (2) KR100475265B1 (https=)
CN (2) CN1156910C (https=)
MY (1) MY121618A (https=)
TW (1) TW347585B (https=)

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US6692989B2 (en) * 1999-10-20 2004-02-17 Renesas Technology Corporation Plastic molded type semiconductor device and fabrication process thereof
JPH11274196A (ja) * 1998-03-26 1999-10-08 Seiko Epson Corp 半導体装置の製造方法およびモールドシステム並びに半導体装置
KR100350046B1 (ko) * 1999-04-14 2002-08-24 앰코 테크놀로지 코리아 주식회사 리드프레임 및 이를 이용한 방열판이 부착된 반도체패키지
US6975021B1 (en) * 1999-09-03 2005-12-13 Micron Technology, Inc. Carrier for substrate film
JP2001230360A (ja) * 2000-02-18 2001-08-24 Hitachi Ltd 半導体集積回路装置およびその製造方法
US7199477B1 (en) * 2000-09-29 2007-04-03 Altera Corporation Multi-tiered lead package for an integrated circuit
JP2002134674A (ja) * 2000-10-20 2002-05-10 Hitachi Ltd 半導体装置およびその製造方法
TW462120B (en) * 2000-11-10 2001-11-01 Siliconware Precision Industries Co Ltd Tape carrier type semiconductor package structure
JP2002176131A (ja) * 2000-12-08 2002-06-21 Hitachi Ltd 半導体装置の製造方法
JP3812447B2 (ja) * 2002-01-28 2006-08-23 富士電機デバイステクノロジー株式会社 樹脂封止形半導体装置
KR100477020B1 (ko) * 2002-12-16 2005-03-21 삼성전자주식회사 멀티 칩 패키지
US7239024B2 (en) * 2003-04-04 2007-07-03 Thomas Joel Massingill Semiconductor package with recess for die
US20050230821A1 (en) * 2004-04-15 2005-10-20 Kheng Lee T Semiconductor packages, and methods of forming semiconductor packages
US7511364B2 (en) 2004-08-31 2009-03-31 Micron Technology, Inc. Floating lead finger on a lead frame, lead frame strip, and lead frame assembly including same
US7388283B2 (en) * 2005-02-04 2008-06-17 Avago Technologies Ecbu Ip Pte Ltd Method and device for integrating an illumination source and detector into the same IC package that allows angular illumination with a common planar leadframe
JP2006278407A (ja) * 2005-03-28 2006-10-12 Renesas Technology Corp 半導体装置の製造方法
US8110913B2 (en) * 2007-06-29 2012-02-07 Stats Chippac Ltd. Integrated circuit package system with integral inner lead and paddle
US7750444B2 (en) * 2008-05-19 2010-07-06 Powertech Technology Inc. Lead-on-chip semiconductor package and leadframe for the package
US9337240B1 (en) * 2010-06-18 2016-05-10 Altera Corporation Integrated circuit package with a universal lead frame
CN102332441B (zh) * 2010-07-12 2014-05-14 无锡华润安盛科技有限公司 一种高线位封装形式的引线框及其封装结构
US8450841B2 (en) * 2011-08-01 2013-05-28 Freescale Semiconductor, Inc. Bonded wire semiconductor device
US8841758B2 (en) * 2012-06-29 2014-09-23 Freescale Semiconductor, Inc. Semiconductor device package and method of manufacture
JP6100648B2 (ja) 2013-08-28 2017-03-22 ルネサスエレクトロニクス株式会社 半導体装置及び半導体装置の製造方法
CN108735701B (zh) * 2017-04-13 2021-12-24 恩智浦美国有限公司 具有用于包封期间的毛刺缓解的虚设引线的引线框架
US20230395558A1 (en) * 2022-06-01 2023-12-07 Nanya Technology Corporation Semiconductor device with supporter against which bonding wire is disposed
US12400992B2 (en) * 2022-06-01 2025-08-26 Nanya Technology Corporation Semiconductor device with supporter against which bonding wire is disposed and method for preparing the same

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07231007A (ja) * 1994-02-15 1995-08-29 Toshiba Corp 半導体装置

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JPS59105349A (ja) * 1982-12-08 1984-06-18 Hitachi Ltd 集積回路装置
JP2637247B2 (ja) * 1989-09-12 1997-08-06 株式会社東芝 樹脂封止型半導体装置
US4992628A (en) * 1990-05-07 1991-02-12 Kyocera America, Inc. Ceramic-glass integrated circuit package with ground plane
JPH04162556A (ja) * 1990-10-25 1992-06-08 Mitsubishi Electric Corp リードフレーム及びその製造方法
US5245214A (en) * 1991-06-06 1993-09-14 Northern Telecom Limited Method of designing a leadframe and a leadframe created thereby
US5510649A (en) * 1992-05-18 1996-04-23 Motorola, Inc. Ceramic semiconductor package having varying conductive bonds
JPH0837252A (ja) * 1994-07-22 1996-02-06 Nec Corp 半導体装置
US5818114A (en) * 1995-05-26 1998-10-06 Hewlett-Packard Company Radially staggered bond pad arrangements for integrated circuit pad circuitry
JPH0945723A (ja) * 1995-07-31 1997-02-14 Rohm Co Ltd 半導体チップおよびこの半導体チップを組み込んだ半導体装置ならびにその製造方法
US5691567A (en) * 1995-09-19 1997-11-25 National Semiconductor Corporation Structure for attaching a lead frame to a heat spreader/heat slug structure
US5905299A (en) * 1996-01-05 1999-05-18 Texas Instruments, Inc. Thermally enhanced thin quad flatpack package
US5771157A (en) * 1996-03-08 1998-06-23 Honeywell, Inc. Chip-on-board printed circuit assembly using aluminum wire bonded to copper pads

Patent Citations (1)

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Publication number Priority date Publication date Assignee Title
JPH07231007A (ja) * 1994-02-15 1995-08-29 Toshiba Corp 半導体装置

Also Published As

Publication number Publication date
CN1156910C (zh) 2004-07-07
US6265762B1 (en) 2001-07-24
MY121618A (en) 2006-02-28
CN100359678C (zh) 2008-01-02
TW347585B (en) 1998-12-11
KR100473261B1 (ko) 2005-03-14
JPH09312375A (ja) 1997-12-02
CN1164127A (zh) 1997-11-05
KR970067736A (ko) 1997-10-13
CN1595646A (zh) 2005-03-16

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