JP4764608B2 - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
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- JP4764608B2 JP4764608B2 JP2004072518A JP2004072518A JP4764608B2 JP 4764608 B2 JP4764608 B2 JP 4764608B2 JP 2004072518 A JP2004072518 A JP 2004072518A JP 2004072518 A JP2004072518 A JP 2004072518A JP 4764608 B2 JP4764608 B2 JP 4764608B2
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Description
図1は本実施の形態1の半導体装置の外観斜視図、図2はその半導体装置の底面図(下面側)、図3は実施の形態1の単位リード部(詳細は後述する)の平面図であり、図3では破線が封止領域を示している。図4は図3の単位リード部のA−A切断線における断面図、図5は図3の単位リード部のB−B切断線における断面図、図6は図1の半導体装置の構造の一部を破断してその内部構造を示す平面図、図7は図6の半導体装置のC−C切断線における断面図、図8は図6の半導体装置のD−D切断線における断面図、図9は図6の半導体装置のE−E切断線における断面図である。
用樹脂11で封止されるような空間(以下、キャビティ24と称する。)が形成される。
装置1の製造工程で外装処理を行う必要がないため工程数が減少し生産性が向上される。
た実装基板27の配線28に仮付けした後、加熱炉(図示せず)でリフローすれば良い。
図24は実施の形態2の単位リード部の平面図である。なお、図24においては、破線が封止領域を示している。図25は図24の単位リード部のI−I切断線における断面図、図26は図24の単位リード部のJ−J切断線における断面図、図27は、実施の形態2の半導体装置の構造の一部を破断してその内部構造を示す平面図、図28は図27の半導体装置のK−K切断線における断面図である。
図31は本発明の実施の形態3における半導体装置の一例を封止部を破断してその内部構造を示す平面図、図32は図31に示す半導体装置のL−L切断線における断面図、図33は図31に示す半導体装置の組み立て手順の一例を示すプロセスフロー図、図34(a)〜(e)は図31に示す半導体装置の組み立てにおける主要工程ごとの構造の一例を示す断面フロー図である。
図35は本発明の実施の形態4の半導体装置の構造の一例を示す外観斜視図、図36は図35に示す半導体装置の構造を示す底面図、図37は図35に示す半導体装置のM−M切断線における断面図、図38は図35に示す半導体装置のN−N切断線における断面図、図39は図35に示す半導体装置の組み立てにおけるワイヤボンディング時の状態の一例を示す部分断面図である。
おり、かつ、タブ5を介して前記複数のタブ吊りリード4が連結されていることである。
いるとともに露出部4bが封止部12の裏面12aのコーナ部の端部に配置されている。
チップ8より小さく形成されている。すなわち、QFN50は小タブ構造のものである。
図40は本発明の実施の形態5の半導体装置におけるモールド終了時の構造の一例を封止部を透過してその内部を示す部分平面図、図41は図40に示す半導体装置のP−P切断線における断面図、図42は図40に示す半導体装置の組み立てに用いられるリードフレームの構造の一例を示す部分平面図、図43は図41のT部の構造を示す拡大部分断面図、図44は図41のT部におけるリード切断方法の一例を示す拡大部分断面図、図45は図40のQ部のリード構造を示す図であり、(a)は底面図、(b)は平面図、(c)は溝部断面図、(d)は(b)のU−U切断線における断面図、(e)は(b)のV−V切断線における断面図、図46は図40のQ部のリード構造の変形例を示す平面図である。
、例えば、図46に示すように、両者ともほぼ同じ大きさの長円形の溝であってもよい。
図47は、実施の形態5で説明した図40のR部の構造を示す拡大部分平面図である。
図48は、実施の形態5で説明した図40のS部の構造を示す図であり、(a)は拡大部分平面図、(b)は(a)のX−X切断線における断面図、図49は、図48(a)のW部の構造を示す図であり、(a)は拡大部分底面図、(b)は(a)の溝部断面図である。
図50は本発明の実施の形態8の半導体装置の構造の一例を示す図であり、(a)は平面図、(b)は側面図、(c)は底面図、図51は図50(c)のY部の構造を示す拡大部分底面図である。
装時の電気的ショートを引き起こす可能性が高くなるため、これを防止するものである。
図52は本発明の実施の形態9の半導体装置におけるモールド終了時の構造の一例を封止部を透過してその内部を示す部分平面図、図53は図52に示す半導体装置のZ−Z切断線における断面図、図54は図53のAB部の構造を示す拡大部分断面図、図55は図53のAB部のリード切断方法の一例を示す拡大部分断面図である。
図56(a),(b),(c),(d) 、図57(a),(b),(c),(d) および図58(a),(b),(c),(d) は本発明の半導体装置の組み立てに用いられるリードフレームの加工方法の一例であるエッチングによる加工方法を示す部分断面図である。
図59(a),(b),(c) 、図60(a),(b),(c) および図61(a),(b),(c) は本発明の半導体装置の組み立てに用いられるリードフレームの加工方法の一例であるプレス方法を示す部分断面図である。
2 リード
2a 肉厚部
2b 肉薄部
2c 被接続部
2d ワイヤ接合面
2e 内側溝部
2f 外側溝部
2g 鍔部
2h テーパ部
2i 間隙部
2j 延在部
2k リード溝部
2l メッキ層
3 単位リード部
4 タブ吊りリード
4a 支持部
4b 露出部
4c チップ配置側の面
4d 溝部
4e 側壁
5 タブ
5a チップ支持面
5b 裏面
6 段差部
7 パッド
8 半導体チップ
8a 主面
8b 裏面
9 接着剤
10 ワイヤ
11 封止用樹脂
12 封止部
12a 裏面
12b モールドライン
13 メッキ部
14 マトリクスリードフレーム
14a 枠部
15 単位リードフレーム
16 応力緩和スリット
17 ガイドピン
18 シリンジ
19 コレット
20 ボンディングステージ
21 キャピラリ
22 下金型
23 上金型
24 キャビティ
25 ランナ
26 ゲート
27 実装基板
28 配線
29 接合材
30 外端部
31 内端部
32 角部
33 内部導出リード
34 タブ
35 リードフレーム
36 半導体チップ
37 ボンディングワイヤ
38 封止材
39 リードフレーム
40 吊りリード
41 タブ
42 半導体素子
43 電極
44 インナーリード部
45 金属配線
46 封止樹脂
47 外部端子
48 段差部
49,50,51 QFN(半導体装置)
52 エッチング液
53 フォトレジスト膜
54 パンチ
55 受け台
Claims (5)
- タブと、
前記タブを支持する複数のタブ吊りリードと、
複数のパッドが形成された主面、および前記主面とは反対側の裏面を有し、前記タブ上に搭載された半導体チップと、
前記半導体チップの周囲に配置された複数のインナーリード部と、
前記半導体チップの複数のパッドと前記複数のインナーリード部とをそれぞれ電気的に接続する複数のボンディングワイヤと、
前記半導体チップ、前記タブ、前記複数のタブ吊りリード、前記複数のインナーリード部、および前記複数のワイヤを封止する封止部と、
前記複数のインナーリード部のそれぞれと一体に形成され、前記封止部から露出する複数のアウターリード部と、
前記複数のアウターリード部のそれぞれに形成されたPbフリー半田メッキ層と、
を含み、
前記封止部の一部は、前記半導体チップの前記裏面と接触しており、
前記タブにおいて、前記半導体チップを支持する面とは反対側の前記裏面側は、前記封止部により覆われており、
前記タブの前記裏面側は、エッチングにより前記アウターリード部の厚さよりも薄く形成されていることを特徴とする半導体装置。 - 前記複数のインナーリード部のそれぞれのワイヤ接合面には、Agメッキ層が形成されていることを特徴とする請求項1記載の半導体装置。
- 前記Pbフリー半田メッキ層は、Sn−Ag系、又はSn−Zn系等の金属から成ることを特徴とする請求項1記載の半導体装置。
- 前記タブ、前記タブ吊りリード、前記インナーリード部、および前記アウターリード部のそれぞれは、Cu系、又はFe系の金属から成ることを特徴とする請求項1記載の半導体装置。
- 前記タブの外形寸法は、前記半導体チップの外形寸法よりも小さいことを特徴とする請求項1記載の半導体装置。
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