KR100373475B1 - 유전체 분리 웨이퍼 및 그 제조 방법 - Google Patents
유전체 분리 웨이퍼 및 그 제조 방법 Download PDFInfo
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- KR100373475B1 KR100373475B1 KR10-1999-0047003A KR19990047003A KR100373475B1 KR 100373475 B1 KR100373475 B1 KR 100373475B1 KR 19990047003 A KR19990047003 A KR 19990047003A KR 100373475 B1 KR100373475 B1 KR 100373475B1
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- wafer
- dielectric
- silicon
- dielectric separation
- polysilicon layer
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- 238000004519 manufacturing process Methods 0.000 title claims abstract description 43
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 194
- 239000010703 silicon Substances 0.000 claims abstract description 194
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 187
- 238000000926 separation method Methods 0.000 claims abstract description 170
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims abstract description 132
- 229920005591 polysilicon Polymers 0.000 claims abstract description 132
- 238000002955 isolation Methods 0.000 claims abstract description 89
- 238000005498 polishing Methods 0.000 claims abstract description 52
- 238000010030 laminating Methods 0.000 claims abstract description 4
- 238000005530 etching Methods 0.000 claims description 32
- 238000000034 method Methods 0.000 claims description 32
- 238000005260 corrosion Methods 0.000 claims description 5
- 230000007797 corrosion Effects 0.000 claims description 5
- 229910021421 monocrystalline silicon Inorganic materials 0.000 claims 7
- 238000000151 deposition Methods 0.000 claims 1
- 239000012535 impurity Substances 0.000 abstract description 43
- 239000002019 doping agent Substances 0.000 abstract description 17
- 238000007373 indentation Methods 0.000 abstract description 11
- 235000012431 wafers Nutrition 0.000 description 265
- 239000010410 layer Substances 0.000 description 165
- 238000005229 chemical vapour deposition Methods 0.000 description 33
- 239000007789 gas Substances 0.000 description 29
- 238000006243 chemical reaction Methods 0.000 description 12
- 230000000052 comparative effect Effects 0.000 description 11
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 11
- 229920002120 photoresistant polymer Polymers 0.000 description 10
- 239000010453 quartz Substances 0.000 description 10
- 238000005259 measurement Methods 0.000 description 9
- 239000002245 particle Substances 0.000 description 9
- 239000000758 substrate Substances 0.000 description 9
- 239000000356 contaminant Substances 0.000 description 8
- 230000002093 peripheral effect Effects 0.000 description 8
- 229910052698 phosphorus Inorganic materials 0.000 description 8
- 238000010438 heat treatment Methods 0.000 description 7
- 150000003376 silicon Chemical class 0.000 description 7
- 230000007547 defect Effects 0.000 description 6
- 238000009792 diffusion process Methods 0.000 description 6
- 239000011574 phosphorus Substances 0.000 description 6
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 5
- 238000007796 conventional method Methods 0.000 description 5
- 239000002356 single layer Substances 0.000 description 5
- OAKJQQAXSVQMHS-UHFFFAOYSA-N Hydrazine Chemical compound NN OAKJQQAXSVQMHS-UHFFFAOYSA-N 0.000 description 4
- 229910003902 SiCl 4 Inorganic materials 0.000 description 4
- SLLGVCUQYRMELA-UHFFFAOYSA-N chlorosilicon Chemical compound Cl[Si] SLLGVCUQYRMELA-UHFFFAOYSA-N 0.000 description 4
- 150000001875 compounds Chemical class 0.000 description 4
- 238000002474 experimental method Methods 0.000 description 4
- 238000000227 grinding Methods 0.000 description 4
- 238000005468 ion implantation Methods 0.000 description 4
- 238000000206 photolithography Methods 0.000 description 4
- 239000012159 carrier gas Substances 0.000 description 3
- 230000015556 catabolic process Effects 0.000 description 3
- 239000013078 crystal Substances 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- 238000003475 lamination Methods 0.000 description 3
- 150000004767 nitrides Chemical class 0.000 description 3
- 230000003287 optical effect Effects 0.000 description 3
- 238000012545 processing Methods 0.000 description 3
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 2
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 2
- 229910052787 antimony Inorganic materials 0.000 description 2
- WATWJIUSRGPENY-UHFFFAOYSA-N antimony atom Chemical compound [Sb] WATWJIUSRGPENY-UHFFFAOYSA-N 0.000 description 2
- 229910052785 arsenic Inorganic materials 0.000 description 2
- 229910052796 boron Inorganic materials 0.000 description 2
- 238000004140 cleaning Methods 0.000 description 2
- 239000011248 coating agent Substances 0.000 description 2
- 238000000576 coating method Methods 0.000 description 2
- 238000011109 contamination Methods 0.000 description 2
- 229910000040 hydrogen fluoride Inorganic materials 0.000 description 2
- 238000004518 low pressure chemical vapour deposition Methods 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 230000003647 oxidation Effects 0.000 description 2
- 238000007254 oxidation reaction Methods 0.000 description 2
- 230000001590 oxidative effect Effects 0.000 description 2
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- YIWGJFPJRAEKMK-UHFFFAOYSA-N 1-(2H-benzotriazol-5-yl)-3-methyl-8-[2-[[3-(trifluoromethoxy)phenyl]methylamino]pyrimidine-5-carbonyl]-1,3,8-triazaspiro[4.5]decane-2,4-dione Chemical compound CN1C(=O)N(c2ccc3n[nH]nc3c2)C2(CCN(CC2)C(=O)c2cnc(NCc3cccc(OC(F)(F)F)c3)nc2)C1=O YIWGJFPJRAEKMK-UHFFFAOYSA-N 0.000 description 1
- YTPMCWYIRHLEGM-BQYQJAHWSA-N 1-[(e)-2-propylsulfonylethenyl]sulfonylpropane Chemical compound CCCS(=O)(=O)\C=C\S(=O)(=O)CCC YTPMCWYIRHLEGM-BQYQJAHWSA-N 0.000 description 1
- DBGSRZSKGVSXRK-UHFFFAOYSA-N 1-[2-[5-[2-(2,3-dihydro-1H-inden-2-ylamino)pyrimidin-5-yl]-1,3,4-oxadiazol-2-yl]acetyl]-3,6-dihydro-2H-pyridine-4-carboxylic acid Chemical compound C1C(CC2=CC=CC=C12)NC1=NC=C(C=N1)C1=NN=C(O1)CC(=O)N1CCC(=CC1)C(=O)O DBGSRZSKGVSXRK-UHFFFAOYSA-N 0.000 description 1
- VXEGSRKPIUDPQT-UHFFFAOYSA-N 4-[4-(4-methoxyphenyl)piperazin-1-yl]aniline Chemical compound C1=CC(OC)=CC=C1N1CCN(C=2C=CC(N)=CC=2)CC1 VXEGSRKPIUDPQT-UHFFFAOYSA-N 0.000 description 1
- 229910004298 SiO 2 Inorganic materials 0.000 description 1
- FHKPLLOSJHHKNU-INIZCTEOSA-N [(3S)-3-[8-(1-ethyl-5-methylpyrazol-4-yl)-9-methylpurin-6-yl]oxypyrrolidin-1-yl]-(oxan-4-yl)methanone Chemical compound C(C)N1N=CC(=C1C)C=1N(C2=NC=NC(=C2N=1)O[C@@H]1CN(CC1)C(=O)C1CCOCC1)C FHKPLLOSJHHKNU-INIZCTEOSA-N 0.000 description 1
- JAWMENYCRQKKJY-UHFFFAOYSA-N [3-(2,4,6,7-tetrahydrotriazolo[4,5-c]pyridin-5-ylmethyl)-1-oxa-2,8-diazaspiro[4.5]dec-2-en-8-yl]-[2-[[3-(trifluoromethoxy)phenyl]methylamino]pyrimidin-5-yl]methanone Chemical compound N1N=NC=2CN(CCC=21)CC1=NOC2(C1)CCN(CC2)C(=O)C=1C=NC(=NC=1)NCC1=CC(=CC=C1)OC(F)(F)F JAWMENYCRQKKJY-UHFFFAOYSA-N 0.000 description 1
- 239000006061 abrasive grain Substances 0.000 description 1
- 238000000137 annealing Methods 0.000 description 1
- RQNWIZPPADIBDY-UHFFFAOYSA-N arsenic atom Chemical compound [As] RQNWIZPPADIBDY-UHFFFAOYSA-N 0.000 description 1
- 238000001505 atmospheric-pressure chemical vapour deposition Methods 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- 238000004040 coloring Methods 0.000 description 1
- 239000000470 constituent Substances 0.000 description 1
- 238000006731 degradation reaction Methods 0.000 description 1
- 230000001419 dependent effect Effects 0.000 description 1
- 230000002542 deteriorative effect Effects 0.000 description 1
- 239000003989 dielectric material Substances 0.000 description 1
- 239000003085 diluting agent Substances 0.000 description 1
- 239000012153 distilled water Substances 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 238000011049 filling Methods 0.000 description 1
- 238000009499 grossing Methods 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 230000000873 masking effect Effects 0.000 description 1
- 239000012528 membrane Substances 0.000 description 1
- 229910052757 nitrogen Inorganic materials 0.000 description 1
- 235000012771 pancakes Nutrition 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- -1 phosphorus ion Chemical class 0.000 description 1
- 230000002265 prevention Effects 0.000 description 1
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- 230000000171 quenching effect Effects 0.000 description 1
- 239000002994 raw material Substances 0.000 description 1
- 239000000523 sample Substances 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- LIVNPJMFVYWSIS-UHFFFAOYSA-N silicon monoxide Chemical compound [Si-]#[O+] LIVNPJMFVYWSIS-UHFFFAOYSA-N 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
- 239000005049 silicon tetrachloride Substances 0.000 description 1
- 238000005979 thermal decomposition reaction Methods 0.000 description 1
- 238000007669 thermal treatment Methods 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Chemical compound O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/20—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
- H01L21/2003—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy characterised by the substrate
- H01L21/2007—Bonding of semiconductor wafers to insulating substrates or to semiconducting substrates using an intermediate insulating layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/304—Mechanical treatment, e.g. grinding, polishing, cutting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76264—SOI together with lateral isolation, e.g. using local oxidation of silicon, or dielectric or polycristalline material refilled trench or air gap isolation regions, e.g. completely isolated semiconductor islands
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76264—SOI together with lateral isolation, e.g. using local oxidation of silicon, or dielectric or polycristalline material refilled trench or air gap isolation regions, e.g. completely isolated semiconductor islands
- H01L21/76275—Vertical isolation by bonding techniques
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76264—SOI together with lateral isolation, e.g. using local oxidation of silicon, or dielectric or polycristalline material refilled trench or air gap isolation regions, e.g. completely isolated semiconductor islands
- H01L21/76286—Lateral isolation by refilling of trenches with polycristalline material
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/928—Front and rear surface processing
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- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Element Separation (AREA)
- Mechanical Treatment Of Semiconductor (AREA)
Abstract
Description
종래 방법 | 본 발명 | |||
제1 회(점/웨이퍼) | 제2 회(점/웨이퍼) | 제1 회(점/웨이퍼) | 제2 회(점/웨이퍼) | |
웨이퍼 1웨이퍼 2웨이퍼 3웨이퍼 4웨이퍼 5웨이퍼 6웨이퍼 7웨이퍼 8웨이퍼 9웨이퍼 10 | 25813327111534616 | 22184117922827510 | 0000000000 | 0000000000 |
평균값 | 16.7 | 17.9 | 0 | 0 |
연마량 L1(㎛) | 유전체 분리 산화막 두께(㎛) | 단차 측정값(㎛) | |
예 1 | 8 | 0.8 | -0.08 |
예 2 | 8 | 1.3 | +0.17 |
예 3 | 14 | 0.8 | -0.18 |
예 4 | 14 | 1.3 | +0.06 |
비교예 1 | 9 | 1.5 | +0.33 |
비교예 2 | 12 | 1.5 | +0.26 |
연마량 L1(㎛) | 유전체 분리 산화막 두께(㎛) | 단층 측정값(㎛) | |
예 5 | 15 | 1.4 | +0.04 |
예 6 | 15 | 2.0 | +0.18 |
예 7 | 24 | 1.4 | -0.17 |
예 8 | 24 | 2.0 | +0.02 |
비교예 3 | 18 | 1.0 | +0.36 |
비교예 4 | 20 | 2.3 | +0.34 |
연마량 L1(㎛) | 유전체 분리 산화막 두께(㎛) | 단층 측정값(㎛) | |
예 9 | 25 | 2.1 | +0.03 |
예 10 | 25 | 2.8 | +0.19 |
예 11 | 39 | 2.1 | -0.17 |
예 12 | 39 | 2.8 | +0.04 |
비교예 5 | 35 | 1.8 | +0.25 |
비교예 6 | 35 | 3.1 | +0.44 |
Claims (8)
- 삭제
- 삭제
- 삭제
- 삭제
- 웨이퍼의 표면에, 유전체 분리막에 의해 절연 분리된 복수의 유전체 분리 단결정 실리콘섬을 갖는 유전체 분리 웨이퍼에 있어서,유전체 분리 절연막의 두께와 분리 홈의 선단으로부터의 연마량을 제어함에 의해,인접하는 유전체 분리 단결정 실리콘 섬과 유전체 분리 단결정 실리콘 섬 사이의 표면이 평탄하게 형성되는 유전체 분리 웨이퍼.
- 제5항에 있어서, 상기 유전체 분리 실리콘 섬들 사이의 표면의 평탄도는 상기 표면을 스타일러스-프로필로메터(stylus-profilometer)로 측정한 최대값과 최소값의 차이의 절대값이 0.2 ㎛ 미만인 것을 특징으로 하는 유전체 분리 웨이퍼.
- 단결정 실리콘 웨이퍼 표면에 이방성 에칭을 실시하여 유전체 분리 홈을 형성하는 공정과,상기 유전체 분리 홈을 포함하여 상기 실리콘 웨이퍼의 전면에 유전체 분리 절연막을 피착하는 공정과,상기 유전체 분리 절연막 상에 고온 CVD법에 의해 폴리실리콘층을 적층하는 공정과,상기 단결정 실리콘 웨이퍼 상의 폴리실리콘층을 적층한 면과는 반대 측의 실리콘 면을 분리 연마하여, 유전체 분리 절연막에 의해 절연 분리된 복수의 유전체 분리 단결정 실리콘 섬을 제공하는 공정을 포함한 유전체 분리 단결정 웨이퍼의 제조 방법에 있어서,상기 적층한 폴리실리콘층의 내식성, 상기 유전체 분리 절연막의 두께, 상기 유전체 분리용 홈의 형상, 깊이 및 이웃한 유전체 분리 실리콘 섬 사이의 거리를 제어하고, 또한 상기 실리콘 면의 분리 연마를 위한 유전체 분리 홈 선단으로부터의 연마량을 제어함에 의해, 유전체 분리 단결정 실리콘 섬 사이의 표면을 평탄화하는 유전체 분리 웨이퍼의 제조 방법.
- 제7항에 있어서,상기 유전체 분리 실리콘 섬들 사이의 표면 평탄도는 상기 표면을 스타일러스-프로필로메터(stylus-profilometer)로 측정할 때 최대값과 최소값의 차이의 절대값이 0.2 ㎛ 미만인 것을 특징으로 하는 유전체 분리 웨이퍼 제조 방법.
Applications Claiming Priority (6)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1998-307995 | 1998-10-29 | ||
JP10307995A JP2000133704A (ja) | 1998-10-29 | 1998-10-29 | 誘電体分離ウェーハおよびその製造方法 |
JP35969398A JP3601763B2 (ja) | 1998-12-17 | 1998-12-17 | 誘電体分離ウェーハおよびその製造方法 |
JP1998-359693 | 1998-12-17 | ||
JP1998-367625 | 1998-12-24 | ||
JP36762598A JP3601764B2 (ja) | 1998-12-24 | 1998-12-24 | 誘電体分離ウェーハの製造方法 |
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KR10-2001-0075461A Division KR100373476B1 (ko) | 1998-10-29 | 2001-11-30 | 유전체 분리 웨이퍼 및 그 제조 방법 |
KR1020010075463A Division KR20020018638A (ko) | 1998-10-29 | 2001-11-30 | 유전체 분리 웨이퍼 및 그 제조 방법 |
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KR20000029364A KR20000029364A (ko) | 2000-05-25 |
KR100373475B1 true KR100373475B1 (ko) | 2003-02-25 |
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KR10-1999-0047003A KR100373475B1 (ko) | 1998-10-29 | 1999-10-28 | 유전체 분리 웨이퍼 및 그 제조 방법 |
KR1020010075463A KR20020018638A (ko) | 1998-10-29 | 2001-11-30 | 유전체 분리 웨이퍼 및 그 제조 방법 |
KR10-2001-0075461A KR100373476B1 (ko) | 1998-10-29 | 2001-11-30 | 유전체 분리 웨이퍼 및 그 제조 방법 |
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KR1020010075463A KR20020018638A (ko) | 1998-10-29 | 2001-11-30 | 유전체 분리 웨이퍼 및 그 제조 방법 |
KR10-2001-0075461A KR100373476B1 (ko) | 1998-10-29 | 2001-11-30 | 유전체 분리 웨이퍼 및 그 제조 방법 |
Country Status (3)
Country | Link |
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US (2) | US6815774B1 (ko) |
EP (1) | EP0997932A3 (ko) |
KR (3) | KR100373475B1 (ko) |
Families Citing this family (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
AU2001294817A1 (en) * | 2000-09-27 | 2002-04-08 | Nup2 Incorporated | Fabrication of semiconductor devices |
US6933527B2 (en) * | 2001-12-28 | 2005-08-23 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and semiconductor device production system |
EP1678075A4 (en) * | 2003-09-24 | 2008-09-24 | Nano Cluster Devices Ltd | ENGRAVING MASKS BASED ON NANOAGREGATES ASSEMBLED IN TEMPLATE ETCH MASKS BASED ON TEMPLATE-ASSEMBLED NANOCLUSTERS |
US20070042563A1 (en) * | 2005-08-19 | 2007-02-22 | Honeywell International Inc. | Single crystal based through the wafer connections technical field |
US20070218639A1 (en) * | 2006-03-15 | 2007-09-20 | Fransiska Dwikusuma | Formation of a smooth polysilicon layer |
TWI361504B (en) * | 2008-01-30 | 2012-04-01 | Ind Tech Res Inst | Hollow stylus-shaped structure, methods for fabricating the same, and phase-change memory devices, magnetic random access memory devices, resistive random access memory devices, field emission display, multi-electrobeams direct writing lithography appara |
US10100402B2 (en) | 2011-10-07 | 2018-10-16 | International Business Machines Corporation | Substrate holder for graphene film synthesis |
JP6100200B2 (ja) * | 2014-04-24 | 2017-03-22 | 信越半導体株式会社 | 貼り合わせsoiウェーハの製造方法 |
JP6118757B2 (ja) * | 2014-04-24 | 2017-04-19 | 信越半導体株式会社 | 貼り合わせsoiウェーハの製造方法 |
JP6353814B2 (ja) * | 2015-06-09 | 2018-07-04 | 信越半導体株式会社 | 貼り合わせsoiウェーハの製造方法 |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS61120424A (ja) * | 1984-11-16 | 1986-06-07 | Oki Electric Ind Co Ltd | 誘電体分離基板の研磨方法 |
JPH05283515A (ja) * | 1992-03-31 | 1993-10-29 | Nec Kansai Ltd | 半導体装置製造方法 |
Family Cites Families (18)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS60140732A (ja) | 1983-12-27 | 1985-07-25 | Fujitsu Ltd | 半導体集積回路装置 |
US4606936A (en) * | 1985-04-12 | 1986-08-19 | Harris Corporation | Stress free dielectric isolation technology |
US4807012A (en) * | 1985-09-18 | 1989-02-21 | Harris Corporation | IC which eliminates support bias influence on dielectrically isolated components |
JPH01239866A (ja) * | 1988-03-22 | 1989-09-25 | Hitachi Ltd | 誘電体分離基板 |
JPH01289124A (ja) * | 1988-05-16 | 1989-11-21 | Masatoshi Utaka | 半導体装置の製造方法 |
JPH0232563A (ja) | 1988-07-21 | 1990-02-02 | Ricoh Co Ltd | 高耐圧ドライバ回路 |
JPH0654790B2 (ja) | 1988-08-17 | 1994-07-20 | 信越半導体株式会社 | 誘電体分離基板の製造方法 |
US5246877A (en) * | 1989-01-31 | 1993-09-21 | Mitsubishi Denki Kabushiki Kaisha | Method of manufacturing a semiconductor device having a polycrystalline electrode region |
JPH03153044A (ja) | 1989-11-10 | 1991-07-01 | Mitsubishi Electric Corp | 誘電体分離基板 |
US5151768A (en) * | 1990-02-22 | 1992-09-29 | Oki Electric Industry Co., Ltd. | Dielectric isolation substrate |
US5081061A (en) * | 1990-02-23 | 1992-01-14 | Harris Corporation | Manufacturing ultra-thin dielectrically isolated wafers |
US5233216A (en) * | 1990-02-28 | 1993-08-03 | Hitachi, Ltd. | Dielectric isolated substrate and process for producing the same |
JPH07118505B2 (ja) | 1990-12-28 | 1995-12-18 | 信越半導体株式会社 | 誘電体分離基板の製造方法 |
JPH08501900A (ja) * | 1992-06-17 | 1996-02-27 | ハリス・コーポレーション | 結合ウェーハの製法 |
JP3153044B2 (ja) | 1993-04-17 | 2001-04-03 | 本田技研工業株式会社 | 自動2輪車のヘッドライト取付構造 |
JP3033655B2 (ja) * | 1993-09-28 | 2000-04-17 | 日本電気株式会社 | 半導体装置及び半導体装置の製造方法 |
JPH07263541A (ja) * | 1994-03-24 | 1995-10-13 | Nec Corp | 誘電体分離基板およびその製造方法 |
JPH10335447A (ja) | 1997-05-30 | 1998-12-18 | Matsushita Electric Works Ltd | 誘電体分離基板の製造方法 |
-
1999
- 1999-10-18 US US09/421,322 patent/US6815774B1/en not_active Expired - Lifetime
- 1999-10-20 EP EP99120082A patent/EP0997932A3/en not_active Withdrawn
- 1999-10-28 KR KR10-1999-0047003A patent/KR100373475B1/ko active IP Right Grant
-
2001
- 2001-08-31 US US09/942,739 patent/US6472289B2/en not_active Expired - Lifetime
- 2001-11-30 KR KR1020010075463A patent/KR20020018638A/ko not_active Application Discontinuation
- 2001-11-30 KR KR10-2001-0075461A patent/KR100373476B1/ko active IP Right Grant
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS61120424A (ja) * | 1984-11-16 | 1986-06-07 | Oki Electric Ind Co Ltd | 誘電体分離基板の研磨方法 |
JPH05283515A (ja) * | 1992-03-31 | 1993-10-29 | Nec Kansai Ltd | 半導体装置製造方法 |
Also Published As
Publication number | Publication date |
---|---|
KR20020018637A (ko) | 2002-03-08 |
EP0997932A3 (en) | 2000-08-16 |
KR20020018638A (ko) | 2002-03-08 |
KR100373476B1 (ko) | 2003-02-25 |
EP0997932A2 (en) | 2000-05-03 |
US20020045329A1 (en) | 2002-04-18 |
US6472289B2 (en) | 2002-10-29 |
US6815774B1 (en) | 2004-11-09 |
KR20000029364A (ko) | 2000-05-25 |
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