AU2001294817A1 - Fabrication of semiconductor devices - Google Patents

Fabrication of semiconductor devices

Info

Publication number
AU2001294817A1
AU2001294817A1 AU2001294817A AU9481701A AU2001294817A1 AU 2001294817 A1 AU2001294817 A1 AU 2001294817A1 AU 2001294817 A AU2001294817 A AU 2001294817A AU 9481701 A AU9481701 A AU 9481701A AU 2001294817 A1 AU2001294817 A1 AU 2001294817A1
Authority
AU
Australia
Prior art keywords
fabrication
semiconductor devices
semiconductor
devices
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU2001294817A
Inventor
Daniel Shepard
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Contour Semiconductor Inc
Original Assignee
Contour Semiconductor Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Contour Semiconductor Inc filed Critical Contour Semiconductor Inc
Publication of AU2001294817A1 publication Critical patent/AU2001294817A1/en
Abandoned legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1203Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body the substrate comprising an insulating body on a semiconductor body, e.g. SOI
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76224Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
    • H01L21/76229Concurrent filling of a plurality of trenches having a different trench shape or dimension, e.g. rectangular and V-shaped trenches, wide and narrow trenches, shallow and deep trenches
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76224Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
    • H01L21/76232Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials of trenches having a shape other than rectangular or V-shape, e.g. rounded corners, oblique or rounded trench walls
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/84Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being other than a semiconductor body, e.g. being an insulating body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
    • H01L27/10Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
    • H01L27/101Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration including resistors or capacitors only
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
AU2001294817A 2000-09-27 2001-09-27 Fabrication of semiconductor devices Abandoned AU2001294817A1 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US23585300P 2000-09-27 2000-09-27
US60/235,853 2000-09-27
PCT/US2001/030296 WO2002027768A2 (en) 2000-09-27 2001-09-27 Fabrication of semiconductor devices

Publications (1)

Publication Number Publication Date
AU2001294817A1 true AU2001294817A1 (en) 2002-04-08

Family

ID=22887168

Family Applications (1)

Application Number Title Priority Date Filing Date
AU2001294817A Abandoned AU2001294817A1 (en) 2000-09-27 2001-09-27 Fabrication of semiconductor devices

Country Status (6)

Country Link
US (3) US6586327B2 (en)
EP (1) EP1320872A2 (en)
JP (1) JP2004523881A (en)
CN (1) CN100435347C (en)
AU (1) AU2001294817A1 (en)
WO (1) WO2002027768A2 (en)

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US8048789B2 (en) * 2005-04-26 2011-11-01 Northwestern University Mesoscale pyramids, arrays and methods of preparation
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US7593256B2 (en) * 2006-03-28 2009-09-22 Contour Semiconductor, Inc. Memory array with readout isolation
US20080023694A1 (en) * 2006-07-25 2008-01-31 Chi Mei El Corp. Display device and method of manufacturing the same
US7479671B2 (en) * 2006-08-29 2009-01-20 International Business Machines Corporation Thin film phase change memory cell formed on silicon-on-insulator substrate
US20080078268A1 (en) 2006-10-03 2008-04-03 H.C. Starck Inc. Process for preparing metal powders having low oxygen content, powders so-produced and uses thereof
BRPI0718237A2 (en) * 2006-11-07 2013-11-12 Starck H C Gmbh METHOD FOR COATING A SUBSTRATE SURFACE AND COATED PRODUCT
US20080145688A1 (en) 2006-12-13 2008-06-19 H.C. Starck Inc. Method of joining tantalum clade steel structures
US8157914B1 (en) * 2007-02-07 2012-04-17 Chien-Min Sung Substrate surface modifications for compositional gradation of crystalline materials and associated products
US7576364B2 (en) * 2007-02-15 2009-08-18 Chi Mei Optoelectronics Corp. Display device and method of manufacturing the same
US8197894B2 (en) 2007-05-04 2012-06-12 H.C. Starck Gmbh Methods of forming sputtering targets
US7799600B2 (en) * 2007-05-31 2010-09-21 Chien-Min Sung Doped diamond LED devices and associated methods
US7813157B2 (en) * 2007-10-29 2010-10-12 Contour Semiconductor, Inc. Non-linear conductor memory
US8000129B2 (en) * 2007-12-19 2011-08-16 Contour Semiconductor, Inc. Field-emitter-based memory array with phase-change storage devices
US20090225621A1 (en) * 2008-03-05 2009-09-10 Shepard Daniel R Split decoder storage array and methods of forming the same
US20090296445A1 (en) * 2008-06-02 2009-12-03 Shepard Daniel R Diode decoder array with non-sequential layout and methods of forming the same
WO2010022036A2 (en) * 2008-08-18 2010-02-25 Contour Semiconductor, Inc. Method for forming self-aligned phase-change semiconductor diode memory
US8246903B2 (en) 2008-09-09 2012-08-21 H.C. Starck Inc. Dynamic dehydriding of refractory metal powders
US8043655B2 (en) * 2008-10-06 2011-10-25 H.C. Starck, Inc. Low-energy method of manufacturing bulk metallic structures with submicron grain sizes
US8325556B2 (en) * 2008-10-07 2012-12-04 Contour Semiconductor, Inc. Sequencing decoder circuit
US20100096610A1 (en) * 2008-10-17 2010-04-22 Wang Hsingya A Phase-change material memory cell
US20100165727A1 (en) * 2008-12-31 2010-07-01 Shepard Daniel R Phase change material memory having no erase cycle
US8773881B2 (en) * 2009-03-10 2014-07-08 Contour Semiconductor, Inc. Vertical switch three-dimensional memory array
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Also Published As

Publication number Publication date
CN1476637A (en) 2004-02-18
JP2004523881A (en) 2004-08-05
US7507663B2 (en) 2009-03-24
WO2002027768A3 (en) 2002-08-22
US7183206B2 (en) 2007-02-27
EP1320872A2 (en) 2003-06-25
US20040132288A1 (en) 2004-07-08
CN100435347C (en) 2008-11-19
US20070117388A1 (en) 2007-05-24
US6586327B2 (en) 2003-07-01
US20020086542A1 (en) 2002-07-04
WO2002027768A2 (en) 2002-04-04

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