KR100367126B1 - 관통 구멍 범프 접점 - Google Patents
관통 구멍 범프 접점 Download PDFInfo
- Publication number
- KR100367126B1 KR100367126B1 KR10-2001-7002416A KR20017002416A KR100367126B1 KR 100367126 B1 KR100367126 B1 KR 100367126B1 KR 20017002416 A KR20017002416 A KR 20017002416A KR 100367126 B1 KR100367126 B1 KR 100367126B1
- Authority
- KR
- South Korea
- Prior art keywords
- plug
- opening
- conductive
- solder ball
- solder
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
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- H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
- H01L23/49816—Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/095—Conductive through-holes or vias
- H05K2201/09563—Metal filled via
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09818—Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
- H05K2201/09827—Tapered, e.g. tapered hole, via or groove
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
- H05K2201/10621—Components characterised by their electrical contacts
- H05K2201/10681—Tape Carrier Package [TCP]; Flexible sheet connector
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
- H05K2201/10621—Components characterised by their electrical contacts
- H05K2201/10734—Ball grid array [BGA]; Bump grid array
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/4007—Surface contacts, e.g. bumps
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US09/141,217 US6400018B2 (en) | 1998-08-27 | 1998-08-27 | Via plug adapter |
| US09/141,217 | 1998-08-27 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR20010072971A KR20010072971A (ko) | 2001-07-31 |
| KR100367126B1 true KR100367126B1 (ko) | 2003-01-06 |
Family
ID=22494705
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR10-2001-7002416A Expired - Fee Related KR100367126B1 (ko) | 1998-08-27 | 1999-01-15 | 관통 구멍 범프 접점 |
Country Status (10)
| Country | Link |
|---|---|
| US (2) | US6400018B2 (enExample) |
| EP (1) | EP1118119A1 (enExample) |
| JP (1) | JP3898891B2 (enExample) |
| KR (1) | KR100367126B1 (enExample) |
| CN (1) | CN1192429C (enExample) |
| AU (1) | AU2451399A (enExample) |
| CA (1) | CA2338550A1 (enExample) |
| IL (1) | IL141051A0 (enExample) |
| TW (1) | TW463348B (enExample) |
| WO (1) | WO2000013232A1 (enExample) |
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| TWI742991B (zh) * | 2021-01-20 | 2021-10-11 | 啟耀光電股份有限公司 | 基板結構與電子裝置 |
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| CN113038703B (zh) * | 2021-03-17 | 2022-08-05 | 京东方科技集团股份有限公司 | 一种柔性电路板及其制造方法及电子设备 |
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-
1998
- 1998-08-27 US US09/141,217 patent/US6400018B2/en not_active Expired - Lifetime
-
1999
- 1999-01-15 JP JP2000568124A patent/JP3898891B2/ja not_active Expired - Fee Related
- 1999-01-15 CA CA002338550A patent/CA2338550A1/en not_active Abandoned
- 1999-01-15 WO PCT/US1999/000179 patent/WO2000013232A1/en not_active Ceased
- 1999-01-15 CN CNB998100609A patent/CN1192429C/zh not_active Expired - Fee Related
- 1999-01-15 IL IL14105199A patent/IL141051A0/xx unknown
- 1999-01-15 EP EP99904023A patent/EP1118119A1/en not_active Withdrawn
- 1999-01-15 KR KR10-2001-7002416A patent/KR100367126B1/ko not_active Expired - Fee Related
- 1999-01-15 AU AU24513/99A patent/AU2451399A/en not_active Abandoned
- 1999-09-22 TW TW088114625A patent/TW463348B/zh not_active IP Right Cessation
-
2002
- 2002-04-26 US US10/132,960 patent/US6864577B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| US6400018B2 (en) | 2002-06-04 |
| US20020113312A1 (en) | 2002-08-22 |
| JP3898891B2 (ja) | 2007-03-28 |
| IL141051A0 (en) | 2002-02-10 |
| CN1315055A (zh) | 2001-09-26 |
| US6864577B2 (en) | 2005-03-08 |
| JP2002524857A (ja) | 2002-08-06 |
| US20010045611A1 (en) | 2001-11-29 |
| KR20010072971A (ko) | 2001-07-31 |
| AU2451399A (en) | 2000-03-21 |
| CN1192429C (zh) | 2005-03-09 |
| EP1118119A1 (en) | 2001-07-25 |
| CA2338550A1 (en) | 2000-03-09 |
| TW463348B (en) | 2001-11-11 |
| WO2000013232A1 (en) | 2000-03-09 |
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