JPWO2022085765A5 - - Google Patents

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Publication number
JPWO2022085765A5
JPWO2022085765A5 JP2022543605A JP2022543605A JPWO2022085765A5 JP WO2022085765 A5 JPWO2022085765 A5 JP WO2022085765A5 JP 2022543605 A JP2022543605 A JP 2022543605A JP 2022543605 A JP2022543605 A JP 2022543605A JP WO2022085765 A5 JPWO2022085765 A5 JP WO2022085765A5
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Japan
Prior art keywords
impurity layer
concentration impurity
semiconductor substrate
low
semiconductor device
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JP2022543605A
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English (en)
Japanese (ja)
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JP7179236B2 (ja
JPWO2022085765A1 (https=
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Priority claimed from PCT/JP2021/038941 external-priority patent/WO2022085765A1/ja
Publication of JPWO2022085765A1 publication Critical patent/JPWO2022085765A1/ja
Publication of JPWO2022085765A5 publication Critical patent/JPWO2022085765A5/ja
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JP2022543605A 2020-10-23 2021-10-21 半導体装置 Active JP7179236B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US202063104786P 2020-10-23 2020-10-23
US63/104,786 2020-10-23
PCT/JP2021/038941 WO2022085765A1 (ja) 2020-10-23 2021-10-21 半導体装置

Publications (3)

Publication Number Publication Date
JPWO2022085765A1 JPWO2022085765A1 (https=) 2022-04-28
JPWO2022085765A5 true JPWO2022085765A5 (https=) 2022-10-05
JP7179236B2 JP7179236B2 (ja) 2022-11-28

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JP2022543605A Active JP7179236B2 (ja) 2020-10-23 2021-10-21 半導体装置

Country Status (5)

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US (1) US11735655B2 (https=)
EP (1) EP4187617A4 (https=)
JP (1) JP7179236B2 (https=)
CN (1) CN115956297B (https=)
WO (1) WO2022085765A1 (https=)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US12051747B2 (en) * 2022-03-11 2024-07-30 Nuvoton Technology Corporation Japan Semiconductor device
US12550719B2 (en) * 2022-09-15 2026-02-10 International Business Machines Corporation VTFET circuit with optimized output

Family Cites Families (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5288653A (en) * 1991-02-27 1994-02-22 Nec Corporation Process of fabricating an insulated-gate field effect transistor
JP2861576B2 (ja) * 1991-02-27 1999-02-24 日本電気株式会社 絶縁ゲート電界効果トランジスタの製造方法
JPH11345969A (ja) * 1998-06-01 1999-12-14 Toshiba Corp 電力用半導体装置
JP2002100770A (ja) * 2000-09-22 2002-04-05 Toshiba Corp 絶縁ゲート型半導体装置
GB0327791D0 (en) * 2003-11-29 2003-12-31 Koninkl Philips Electronics Nv Trench insulated gate field effect transistor
US7372088B2 (en) 2004-01-27 2008-05-13 Matsushita Electric Industrial Co., Ltd. Vertical gate semiconductor device and method for fabricating the same
JP3999225B2 (ja) 2004-01-27 2007-10-31 松下電器産業株式会社 半導体装置およびその製造方法
JP5052025B2 (ja) * 2006-03-29 2012-10-17 株式会社東芝 電力用半導体素子
JP2007311771A (ja) * 2006-04-21 2007-11-29 Sanyo Electric Co Ltd 半導体装置及びその製造方法
JP5013436B2 (ja) * 2009-06-04 2012-08-29 三菱電機株式会社 電力用半導体装置
JP6295444B2 (ja) * 2013-07-16 2018-03-20 パナソニックＩｐマネジメント株式会社 半導体装置
JP2015162578A (ja) * 2014-02-27 2015-09-07 住友電気工業株式会社 ワイドバンドギャップ半導体装置およびその製造方法
JP6566512B2 (ja) 2014-04-15 2019-08-28 ローム株式会社 半導体装置および半導体装置の製造方法
JP6871316B2 (ja) * 2014-04-15 2021-05-12 ローム株式会社 半導体装置および半導体装置の製造方法
WO2017099095A1 (ja) * 2015-12-11 2017-06-15 富士電機株式会社 半導体装置および製造方法
CN106024609B (zh) * 2016-07-12 2019-03-08 杭州士兰集成电路有限公司 沟槽功率器件及制作方法
CN108780814B (zh) * 2016-09-14 2021-12-21 富士电机株式会社 半导体装置及其制造方法
WO2018123799A1 (ja) * 2016-12-27 2018-07-05 パナソニックＩｐマネジメント株式会社 半導体装置
JP6817116B2 (ja) * 2017-03-14 2021-01-20 エイブリック株式会社 半導体装置
US10340372B1 (en) * 2017-12-20 2019-07-02 Semiconductor Components Industries, Llc Transistor device having a pillar structure
JP2019161103A (ja) 2018-03-15 2019-09-19 株式会社東芝 半導体装置
WO2019244387A1 (ja) * 2018-06-19 2019-12-26 パナソニックＩｐマネジメント株式会社 半導体装置
JP7326725B2 (ja) * 2018-11-08 2023-08-16 富士電機株式会社 半導体装置
JP7405517B2 (ja) * 2019-03-29 2023-12-26 ローム株式会社 半導体装置

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