JPWO2016158109A1 - 撮像用部品およびこれを備える撮像モジュール - Google Patents
撮像用部品およびこれを備える撮像モジュール Download PDFInfo
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- JPWO2016158109A1 JPWO2016158109A1 JP2017509390A JP2017509390A JPWO2016158109A1 JP WO2016158109 A1 JPWO2016158109 A1 JP WO2016158109A1 JP 2017509390 A JP2017509390 A JP 2017509390A JP 2017509390 A JP2017509390 A JP 2017509390A JP WO2016158109 A1 JPWO2016158109 A1 JP WO2016158109A1
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- imaging
- electrode pad
- conductor pattern
- imaging component
- electrode pads
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- 238000003384 imaging method Methods 0.000 title claims abstract description 48
- 239000004020 conductor Substances 0.000 claims abstract description 59
- 239000000758 substrate Substances 0.000 claims abstract description 42
- 239000000463 material Substances 0.000 claims abstract description 10
- 229920005989 resin Polymers 0.000 claims abstract description 9
- 239000011347 resin Substances 0.000 claims abstract description 9
- 230000005484 gravity Effects 0.000 claims description 10
- 230000008646 thermal stress Effects 0.000 description 3
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 2
- 239000004593 Epoxy Substances 0.000 description 2
- 229910052802 copper Inorganic materials 0.000 description 2
- 239000010949 copper Substances 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 239000003822 epoxy resin Substances 0.000 description 2
- 239000011521 glass Substances 0.000 description 2
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 2
- 229910052737 gold Inorganic materials 0.000 description 2
- 239000010931 gold Substances 0.000 description 2
- 239000007769 metal material Substances 0.000 description 2
- 229920000647 polyepoxide Polymers 0.000 description 2
- 229910000679 solder Inorganic materials 0.000 description 2
- 230000008602 contraction Effects 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 239000003365 glass fiber Substances 0.000 description 1
- 238000010030 laminating Methods 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 230000035882 stress Effects 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
- H01L27/14636—Interconnect structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/12—Mountings, e.g. non-detachable insulating substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/482—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body
- H01L23/4824—Pads with extended contours, e.g. grid structure, branch structure, finger structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
- H01L23/49816—Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49838—Geometry or layout
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/4985—Flexible insulating substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
- H01L23/5386—Geometry or layout of the interconnection structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/03—Use of materials for the substrate
- H05K1/0393—Flexible materials
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
- H01L23/5383—Multilayer substrates
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Electromagnetism (AREA)
- Geometry (AREA)
- Manufacturing & Machinery (AREA)
- Structure Of Printed Boards (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
- Solid State Image Pick-Up Elements (AREA)
Abstract
Description
11:層
2:電極パッド
3:導体パターン
31:幅広部
4:撮像素子
5:電子部品
10:撮像用部品
100:撮像モジュール
Claims (8)
- 樹脂材料から成る積層基板と、該積層基板の上面に設けられた、撮像素子が実装される複数の電極パッドと、前記積層基板の層間に設けられて複数の前記電極パッドのいずれかにそれぞれ接続された帯状の複数の導体パターンとを備えており、少なくとも1つの該導体パターンの一部は、接続されていないいずれかの前記電極パッドの直下に位置する部位が幅広とされた幅広部を備えている撮像用部品。
- 平面透視において、前記幅広部の外形が、前記電極パッドの外形と同形状である請求項1に記載の撮像用部品。
- 請求項1または請求項2に記載の撮像用部品と、該撮像用部品の前記電極パッドに実装された撮像素子とを備えた撮像モジュール。
- 樹脂材料から成る複数の層が積層された積層基板と、該積層基板の表面上に設けられた複数の電極パッドと、前記複数の層の間に設けられた複数の導体パターンとを備えており、該複数の導体パターンは帯状であって、該複数の導体パターンの少なくとも1つは第1部分および第2部分を有しており、前記第1部分は前記複数の電極パッドの1つと前記複数の層の積層方向に重なっており、前記第2部分は前記複数の電極パッドと前記積層方向に重なっておらず、前記第1部分の幅が前記第2部分の幅よりも大きい撮像用部品。
- 前記表面に対して垂直な方向から見たときに、前記第1部分の外形と前記第1部分に重なる前記電極パッドの外形とが同形状である請求項4に記載の撮像用部品。
- 前記表面に対して垂直な方向から見たときに、前記第1部分が前記第1部分に重なる前記電極パッドよりも幅が大きい請求項4に記載の撮像用部品。
- 前記表面に対して垂直な方向から見たときに、前記第1部分の重心が、前記第1部分に重なる前記電極パッドの重心よりも、前記積層基板の重心から遠くに位置している請求項6に記載の撮像用部品。
- 請求項4乃至請求項7のいずれかに記載の撮像用部品と、該撮像用部品の前記複数の電極パッドに実装された撮像素子とを備えた撮像モジュール。
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2015067248 | 2015-03-27 | ||
JP2015067248 | 2015-03-27 | ||
PCT/JP2016/055575 WO2016158109A1 (ja) | 2015-03-27 | 2016-02-25 | 撮像用部品およびこれを備える撮像モジュール |
Publications (2)
Publication Number | Publication Date |
---|---|
JPWO2016158109A1 true JPWO2016158109A1 (ja) | 2017-12-28 |
JP6454001B2 JP6454001B2 (ja) | 2019-01-16 |
Family
ID=57005690
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2017509390A Active JP6454001B2 (ja) | 2015-03-27 | 2016-02-25 | 撮像用部品およびこれを備える撮像モジュール |
Country Status (5)
Country | Link |
---|---|
US (1) | US20180130841A1 (ja) |
EP (1) | EP3277065B1 (ja) |
JP (1) | JP6454001B2 (ja) |
CN (1) | CN107409471B (ja) |
WO (1) | WO2016158109A1 (ja) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE102017128568A1 (de) * | 2017-12-01 | 2019-06-06 | Infineon Technologies Ag | Halbleiterchip mit einer vielzahl von externen kontakten, chip-anordnung und verfahren zum überprüfen einer ausrichtung einer position eines halbleiterchips |
Citations (17)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5136059U (ja) * | 1974-09-11 | 1976-03-17 | ||
JPS60175494A (ja) * | 1984-02-20 | 1985-09-09 | 松下電器産業株式会社 | 金属ベ−ス回路基板の製造方法 |
JPH04286392A (ja) * | 1991-03-15 | 1992-10-12 | Fujitsu Ltd | 印刷回路基板 |
JPH05152382A (ja) * | 1991-12-02 | 1993-06-18 | Matsushita Electric Ind Co Ltd | 回路装置 |
JPH05235547A (ja) * | 1992-02-26 | 1993-09-10 | Fujitsu Ltd | 薄膜基板の配線構造 |
JPH07106764A (ja) * | 1993-10-08 | 1995-04-21 | Fujitsu Ltd | セラミック多層回路基板 |
JPH08500467A (ja) * | 1991-12-31 | 1996-01-16 | テッセラ、インク. | 多層回路製造方法、顧客別特殊仕様構造物およびその構成要素 |
JPH09223715A (ja) * | 1996-02-15 | 1997-08-26 | Pfu Ltd | フリップチップまたはフリップチップキャリアの接続構造 |
JPH11307886A (ja) * | 1998-04-21 | 1999-11-05 | Matsushita Electric Ind Co Ltd | フリップチップ接合ランドうねり防止パターン |
JP2004104078A (ja) * | 2002-06-28 | 2004-04-02 | Sanyo Electric Co Ltd | カメラモジュールおよびその製造方法 |
JP2004214586A (ja) * | 2002-11-14 | 2004-07-29 | Kyocera Corp | 多層配線基板 |
JP2005268259A (ja) * | 2004-03-16 | 2005-09-29 | Kyocera Corp | 多層配線基板 |
WO2006129762A1 (ja) * | 2005-06-02 | 2006-12-07 | Sony Corporation | 半導体イメージセンサ・モジュール及びその製造方法 |
JP2008227429A (ja) * | 2007-03-16 | 2008-09-25 | Alps Electric Co Ltd | 電子回路モジュールおよび多層配線板 |
WO2010131529A1 (ja) * | 2009-05-12 | 2010-11-18 | 株式会社村田製作所 | 回路基板及びその製造方法 |
WO2014054353A1 (ja) * | 2012-10-05 | 2014-04-10 | 株式会社村田製作所 | 電子部品内蔵モジュール及び通信端末装置 |
US20140146505A1 (en) * | 2012-11-27 | 2014-05-29 | Omnivision Technologies, Inc. | Ball grid array and land grid array having modified footprint |
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JPH06326214A (ja) * | 1993-05-17 | 1994-11-25 | Nkk Corp | 多層配線構造及びその形成方法 |
JP2000208665A (ja) * | 1999-01-13 | 2000-07-28 | Pfu Ltd | 小型半導体装置および小型半導体装置の実装構造 |
US6879492B2 (en) * | 2001-03-28 | 2005-04-12 | International Business Machines Corporation | Hyperbga buildup laminate |
JP4304163B2 (ja) * | 2005-03-09 | 2009-07-29 | パナソニック株式会社 | 撮像モジュールおよびその製造方法 |
JP5407667B2 (ja) * | 2008-11-05 | 2014-02-05 | 株式会社村田製作所 | 半導体装置 |
JP5547594B2 (ja) * | 2010-09-28 | 2014-07-16 | 新光電気工業株式会社 | 配線基板、半導体装置及び配線基板の製造方法 |
JP2013093538A (ja) * | 2011-10-04 | 2013-05-16 | Ngk Spark Plug Co Ltd | 配線基板及びその製造方法 |
US9117825B2 (en) * | 2012-12-06 | 2015-08-25 | Taiwan Semiconductor Manufacturing Company, Ltd. | Substrate pad structure |
KR102214512B1 (ko) * | 2014-07-04 | 2021-02-09 | 삼성전자 주식회사 | 인쇄회로기판 및 이를 이용한 반도체 패키지 |
-
2016
- 2016-02-25 JP JP2017509390A patent/JP6454001B2/ja active Active
- 2016-02-25 EP EP16771993.9A patent/EP3277065B1/en active Active
- 2016-02-25 CN CN201680014936.7A patent/CN107409471B/zh active Active
- 2016-02-25 US US15/561,872 patent/US20180130841A1/en not_active Abandoned
- 2016-02-25 WO PCT/JP2016/055575 patent/WO2016158109A1/ja active Application Filing
Patent Citations (17)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5136059U (ja) * | 1974-09-11 | 1976-03-17 | ||
JPS60175494A (ja) * | 1984-02-20 | 1985-09-09 | 松下電器産業株式会社 | 金属ベ−ス回路基板の製造方法 |
JPH04286392A (ja) * | 1991-03-15 | 1992-10-12 | Fujitsu Ltd | 印刷回路基板 |
JPH05152382A (ja) * | 1991-12-02 | 1993-06-18 | Matsushita Electric Ind Co Ltd | 回路装置 |
JPH08500467A (ja) * | 1991-12-31 | 1996-01-16 | テッセラ、インク. | 多層回路製造方法、顧客別特殊仕様構造物およびその構成要素 |
JPH05235547A (ja) * | 1992-02-26 | 1993-09-10 | Fujitsu Ltd | 薄膜基板の配線構造 |
JPH07106764A (ja) * | 1993-10-08 | 1995-04-21 | Fujitsu Ltd | セラミック多層回路基板 |
JPH09223715A (ja) * | 1996-02-15 | 1997-08-26 | Pfu Ltd | フリップチップまたはフリップチップキャリアの接続構造 |
JPH11307886A (ja) * | 1998-04-21 | 1999-11-05 | Matsushita Electric Ind Co Ltd | フリップチップ接合ランドうねり防止パターン |
JP2004104078A (ja) * | 2002-06-28 | 2004-04-02 | Sanyo Electric Co Ltd | カメラモジュールおよびその製造方法 |
JP2004214586A (ja) * | 2002-11-14 | 2004-07-29 | Kyocera Corp | 多層配線基板 |
JP2005268259A (ja) * | 2004-03-16 | 2005-09-29 | Kyocera Corp | 多層配線基板 |
WO2006129762A1 (ja) * | 2005-06-02 | 2006-12-07 | Sony Corporation | 半導体イメージセンサ・モジュール及びその製造方法 |
JP2008227429A (ja) * | 2007-03-16 | 2008-09-25 | Alps Electric Co Ltd | 電子回路モジュールおよび多層配線板 |
WO2010131529A1 (ja) * | 2009-05-12 | 2010-11-18 | 株式会社村田製作所 | 回路基板及びその製造方法 |
WO2014054353A1 (ja) * | 2012-10-05 | 2014-04-10 | 株式会社村田製作所 | 電子部品内蔵モジュール及び通信端末装置 |
US20140146505A1 (en) * | 2012-11-27 | 2014-05-29 | Omnivision Technologies, Inc. | Ball grid array and land grid array having modified footprint |
Also Published As
Publication number | Publication date |
---|---|
WO2016158109A1 (ja) | 2016-10-06 |
CN107409471A (zh) | 2017-11-28 |
EP3277065B1 (en) | 2021-08-11 |
CN107409471B (zh) | 2020-07-21 |
US20180130841A1 (en) | 2018-05-10 |
EP3277065A1 (en) | 2018-01-31 |
JP6454001B2 (ja) | 2019-01-16 |
EP3277065A4 (en) | 2018-12-12 |
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