WO2010131529A1 - 回路基板及びその製造方法 - Google Patents
回路基板及びその製造方法 Download PDFInfo
- Publication number
- WO2010131529A1 WO2010131529A1 PCT/JP2010/055873 JP2010055873W WO2010131529A1 WO 2010131529 A1 WO2010131529 A1 WO 2010131529A1 JP 2010055873 W JP2010055873 W JP 2010055873W WO 2010131529 A1 WO2010131529 A1 WO 2010131529A1
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- Prior art keywords
- circuit board
- external electrode
- conductor
- insulator layer
- insulator
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0271—Arrangements for reducing stress or warp in rigid printed circuit boards, e.g. caused by loads, vibrations or differences in thermal expansion
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
- H01L23/49816—Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49822—Multilayer substrates
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/38—Improvement of the adhesion between the insulating substrate and the metal
- H05K3/382—Improvement of the adhesion between the insulating substrate and the metal by special treatment of the metal
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/01—Dielectrics
- H05K2201/0137—Materials
- H05K2201/0141—Liquid crystal polymer [LCP]
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
- H05K3/4614—Manufacturing multilayer circuits by laminating two or more circuit boards the electrical connections between the circuit boards being made during lamination
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
- H05K3/4626—Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials
- H05K3/4632—Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials laminating thermoplastic or uncured resin sheets comprising printed circuits without added adhesive materials between the sheets
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
Definitions
- the present invention relates to a circuit board and a manufacturing method thereof, and more particularly to a circuit board on which electronic components are mounted and a manufacturing method thereof.
- FIG. 11 is a view showing a state in which a conventional circuit board 500 is mounted on a printed wiring board 600.
- An electronic component 700 is mounted on the circuit board 500.
- the circuit board 500 is composed of a main body 501 and external electrodes 502 and 503 as shown in FIG.
- the main body 501 is configured by laminating ceramic layers and is a hard substrate.
- the external electrodes 502 and 503 are provided on the upper surface and the lower surface of the main body 501, respectively.
- the printed wiring board 600 is a mother board mounted on an electronic device such as a mobile phone, for example, and includes a main body 601 and external electrodes 602 as shown in FIG.
- the main body 601 is a hard substrate made of resin or the like.
- the external electrode 602 is provided on the upper surface of the main body 601.
- the electronic component 700 is, for example, a semiconductor integrated circuit, and includes a main body 701 and an external electrode 702.
- the main body 701 is a semiconductor substrate.
- the external electrode 702 is provided on the lower surface of the main body 701.
- the circuit board 500 is mounted on a printed wiring board 600 as shown in FIG. Specifically, the circuit board 500 is mounted by connecting the external electrode 502 and the external electrode 602 with solder.
- the electronic component 700 is mounted on a circuit board 500 as shown in FIG. Specifically, the electronic component 700 is mounted by connecting the external electrode 503 and the external electrode 702 with solder.
- the circuit board 500, the printed wiring board 600, and the electronic component 700 as described above are mounted on an electronic device such as a mobile phone.
- the conventional circuit board 500 has a problem that it may be detached from the printed wiring board 600. More specifically, the printed wiring board 600 may bend due to an impact when an electronic device on which the circuit board 500 and the printed wiring board 600 are mounted falls. Even if the printed wiring board 600 is bent, the circuit board 500 is a hard board, and therefore cannot be greatly deformed following the bending of the printed wiring board 600. Therefore, a load is applied to the solder connecting the external electrode 502 and the external electrode 602. As a result, the solder may be damaged and the circuit board 500 may be detached from the printed wiring board 600.
- the circuit board 500 can be manufactured by laminating sheets made of a flexible material.
- a circuit board formed by laminating sheets made of such a flexible material for example, a printed circuit board described in Patent Document 1 is known. Note that FIG. 11 is used for the configuration of the printed circuit board 800.
- the printed circuit board 800 described in Patent Document 1 includes a main body 801 and external electrodes (lands) 802 and 803 as shown in FIG.
- the main body 801 is configured by laminating sheets made of a thermoplastic resin.
- the external electrodes 802 and 803 are provided on the upper surface and the lower surface of the main body 801, respectively.
- the printed board 800 is mounted on the printed wiring board 600 via the external electrodes 802 on the lower surface.
- the electronic component 700 is mounted on the printed board 800 via the external electrode 803 on the upper surface.
- the electronic component 700 may be detached. More specifically, since the printed circuit board 800 is constituted by a sheet made of a flexible material, the printed circuit board 800 can be bent. Therefore, even if the printed wiring board 600 is bent, the printed board 800 can be bent following the bending of the printed wiring board 600. Therefore, it is possible to prevent the printed circuit board 800 from being detached from the printed circuit board 600 due to breakage of the solder connecting the external electrode 602 and the external electrode 802.
- the printed circuit board 800 has flexibility over the entire surface, it bends over the entire surface.
- the electronic component 700 since the electronic component 700 is formed of a semiconductor substrate, it cannot be greatly bent. Therefore, a load is applied to the external electrodes 702 and 803 and the solder connecting them. As a result, the solder is damaged, or the external electrodes 702 and 803 are peeled off from the main bodies 701 and 801. That is, the connection between the electronic component 700 and the printed circuit board 800 is disconnected.
- an object of the present invention is to provide a circuit board and a method for manufacturing the same that can prevent electronic components from being detached from the circuit board.
- a circuit board includes a laminate formed by laminating a plurality of insulator layers made of a flexible material, an upper surface of the laminate, and an electronic component.
- a method of manufacturing a circuit board comprising: forming the first external electrode, the second external electrode, and the slip generation layer on the plurality of insulator layers; Laminating the plurality of insulator layers so that the slip generation layer crosses a region obtained by connecting the first external electrode and the second external electrode located closest to the external electrode; It is characterized by having.
- FIG. 1 is an external perspective view of a circuit board according to an embodiment of the present invention. It is a disassembled perspective view of the circuit board of FIG.
- FIG. 2 is a cross-sectional structural view taken along line AA of the circuit board of FIG. It is an enlarged view in B of FIG. It is a block diagram of the module provided with the circuit board. It is a sectional structure figure of a circuit board concerning the 1st modification. It is an enlarged view in D of FIG. It is an enlarged view in E of FIG. It is the figure which showed the internal conductor which concerns on a modification. It is the figure which showed the internal conductor which concerns on a modification. It is the figure which showed a mode that the conventional circuit board was mounted on the printed wiring board.
- FIG. 1 is an external perspective view of a circuit board 10 according to an embodiment of the present invention.
- FIG. 2 is an exploded perspective view of the circuit board 10 of FIG.
- FIG. 3 is a cross-sectional structural view taken along the line AA of the circuit board 10 of FIG.
- FIG. 4 is an enlarged view of FIG. 3B. 1 to 4, the direction in which the insulator layers are stacked when the circuit board 10 is manufactured is defined as a stacking direction.
- the stacking direction is the z-axis direction
- the direction along the long side of the circuit board 10 is the x-axis direction
- the direction along the short side of the circuit board 10 is the y-axis direction.
- the surface on the positive direction side in the z-axis direction is referred to as an upper surface
- the surface on the negative direction side in the z-axis direction is referred to as a lower surface
- the other surfaces are referred to as side surfaces.
- the circuit board 10 includes a multilayer body 11, external electrodes 12 (12a to 12d) and 14 (14a to 14f), internal conductors 18 (18a to 18d) and 20, and via-hole conductors b1 to b5 is provided.
- the laminate 11 is configured by laminating rectangular insulator layers 16a to 16h made of a flexible material (for example, a thermoplastic resin such as a liquid crystal polymer). Thereby, the laminated body 11 has comprised the rectangular parallelepiped shape.
- the surface of the insulator layer 16 refers to the main surface on the positive direction side in the z-axis direction
- the back surface of the insulator layer 16 refers to the main surface on the negative direction side in the z-axis direction.
- the external electrode 12 is a layer made of a metal foil of a conductive material (for example, copper), and is provided on the upper surface of the laminate 11 as shown in FIG. More specifically, the external electrode 12 is provided on the surface of the insulator layer 16a provided on the most positive side in the z-axis direction.
- the external electrodes 12a and 12b are provided so as to be aligned in the y-axis direction.
- the external electrodes 12c and 12d are provided so as to be aligned in the y-axis direction on the positive side in the x-axis direction than the external electrodes 12a and 12b.
- the external electrode 12 is used for connection with an electronic component mounted on the upper surface of the multilayer body 11.
- the external electrode 14 is a layer made of a metal foil of a conductive material (for example, copper), and is provided on the lower surface of the multilayer body 11 as shown in FIG. That is, the external electrode 14 is provided on the back surface of the insulator layer 16h provided on the most negative direction side in the z-axis direction. Further, the external electrodes 14a to 14c are provided along the short side located on the negative side of the lower surface of the multilayer body 11 in the x-axis direction. The external electrodes 14d to 14f are provided along the short side located on the positive side of the lower surface of the multilayer body 11 in the x-axis direction. The external electrode 14 is used for connection with a mother board such as a printed wiring board.
- a mother board such as a printed wiring board.
- the inner conductor 18 is a wiring layer made of a metal foil of a conductive material (for example, copper), and is built in the multilayer body 11 as shown in FIG. Specifically, the inner conductor 18 is provided on the back surface of the insulator layer 16a. A part of the inner conductors 18a to 18d overlaps the outer electrodes 12a to 12d when viewed in plan from the z-axis direction. In FIG. 2, the inner conductor 18 is shown only in the vicinity of the portion overlapping the outer electrode 12, and the other portions are omitted.
- the inner conductor 20 is a film conductor having a large area such as a capacitor conductor or a ground conductor made of a metal foil of a conductive material (for example, copper), and is built in the laminate 11.
- the inner conductor 20 is provided on the back surface of the insulator layer 16g. Thereby, the internal conductor 20 is located on the insulator layer 16 h that constitutes the lower surface of the multilayer body 11.
- the internal conductor 20 lies across the regions A1 to A6 (see FIG. 1) obtained by connecting the external electrode 12 located closest to the external electrode 14 to the external electrode 14.
- the region A1 is a region obtained by connecting the external electrode 14a and the external electrode 12a.
- the region A2 is a region obtained by connecting the external electrode 14b and the external electrode 12b.
- the region A3 is a region obtained by connecting the external electrode 14c and the external electrode 12b.
- the region A4 is a region obtained by connecting the external electrode 14d and the external electrode 12c.
- the region A5 is a region obtained by connecting the external electrode 14e and the external electrode 12d.
- the region A6 is a region obtained by connecting the external electrode 14f and the external electrode 12d.
- the region obtained by connecting the external electrode 12 and the external electrode 14 is a prismatic region having the external electrode 12 as an upper surface and the external electrode 14 as a lower surface.
- the inner conductor 20 crosses the regions A1 to A6 (only the regions A2 and A5 are shown in FIG. 3).
- the inner conductor 20 divides the regions A1 to A6 into an upper region in the z-axis direction and a lower region in the z-axis direction. It shows that.
- the laminated body 11 includes coils (circuit elements) L1 and L2 and a capacitor (circuit element) C.
- the coils L1 and L2 are constituted by internal conductors (not shown in FIG. 2) and via-hole conductors (not shown) provided on the back surfaces of the insulator layers 16b to 16f.
- the capacitor C is composed of an internal conductor (not shown in FIG. 2) provided on the back surfaces of the insulator layers 16e and 16f.
- the inner conductors 18 and 20 and the inner conductors constituting the coils L1 and L2 and the capacitor C are provided between two adjacent insulator layers 16, and are fixed to one insulator layer 16. In addition, it is not fixed to the other insulator layer 16.
- the inner conductor 20 will be described in detail as an example.
- the inner conductor 20 has main surfaces S1 and S2 as shown in FIG.
- the main surface S1 is a main surface located on the positive direction side in the z-axis direction from the main surface S2.
- the surface roughness Ra of the main surface S1 is larger than the surface roughness Ra of the main surface S2.
- the surface roughness Ra of the main surface S2 is 10% or less of the thickness of the internal conductor 20, and the surface roughness Ra of the main surface S1 is larger than the surface roughness Ra of the main surface S2.
- the internal conductor 20 is in contact with the back surface of the insulator layer 16g through the main surface S1.
- the main surface S1 has irregularities.
- the inner conductor 20 is fixed to the back surface of the insulator layer 16g by an anchor effect that is generated when the irregularities of the main surface S1 are recessed into the back surface of the insulator layer 16g. Therefore, no slip occurs in the x-axis direction and the y-axis direction between the inner conductor 20 and the back surface of the insulator layer 16g.
- the inner conductor 20 may be fixed to the back surface of the insulating layer 16g by an adhesive such as an epoxy adhesive.
- the inner conductor 20 is in contact with the surface of the insulating layer 16h via the main surface S2.
- the main surface S2 has almost no unevenness, and no adhesive or the like is applied between the main surface S2 and the surface of the insulator layer 16h. Therefore, the inner conductor 20 is not fixed to the surface of the insulator layer 16h. Therefore, slip can occur between the inner conductor 20 and the surface of the insulating layer 16h in the x-axis direction and the y-axis direction.
- the surface of the inner conductor 20 is preferably coated with silicon, chromium, zinc or the like. Further, the surface of the inner conductor 20 (interface with the insulator layer 16h) may be coated with a carbon resin paste. Further, by not performing plasma ion treatment or chemical treatment with caustic soda or the like only on this surface, the inner conductor 20 and the insulator layer 16h may be prevented from sticking to each other.
- the via-hole conductors b1 to b5 are provided so as to connect the external electrodes 12 and 14, the internal conductors 18 and 20, the coils L1 and L2, and the capacitor C and penetrate the insulator layer 16 in the z-axis direction. Specifically, as shown in FIG. 2, each of the via-hole conductors b1 to b4 passes through the insulator layer 16a in the z-axis direction, and connects the external electrodes 12a to 12d and the internal conductors 18a to 18d. Yes.
- the via-hole conductor b5 passes through the insulator layer 16g in the z-axis direction, and connects the coils L1, L2 or the capacitor C (not shown in FIG. 2) and the internal conductor 20. ing. In FIG. 2, only the via-hole conductors b1 to b5 are shown, but actually other via-hole conductors are provided.
- the via hole conductor is preferably not connected to the internal conductor 20 in each of the regions A1 to A6.
- FIG. 5 is a configuration diagram of the module 150 including the circuit board 10.
- the module 150 includes a circuit board 10, an electronic component 50, and a printed wiring board 100.
- the electronic component 50 is an element such as a semiconductor integrated circuit mounted on the circuit board 10 as shown in FIG.
- the electronic component 50 has a main body 52 and external electrodes 54 (54a to 54d).
- the main body 52 is a hard substrate constituted by a semiconductor substrate, for example.
- the external electrode 54 is provided on the main surface (lower surface) of the main body 52 on the negative direction side in the z-axis direction.
- the external electrodes 54a to 54d are connected to the external electrodes 12a to 12d by solder 60, respectively. Thereby, the electronic component 50 is mounted on the upper surface of the circuit board 10.
- the printed wiring board 100 has a main body 102 and external electrodes 104 (104a to 104f).
- the main body 102 is a hard substrate made of, for example, a resin.
- the external electrode 104 is provided on the main surface (upper surface) of the main body 102 on the positive direction side in the z-axis direction.
- the external electrodes 104a to 104f are connected to the external electrodes 14a to 14f by a bonding material such as solder 70, respectively.
- the circuit board 10 is mounted on the printed wiring board 100 via the lower surface.
- the module 150 as described above is mounted on an electronic device such as a mobile phone.
- circuit board manufacturing method below, the manufacturing method of the circuit board 10 is demonstrated, referring drawings.
- an insulator layer 16a having a copper foil formed on the entire surface of both main surfaces is prepared, and insulator layers 16b to 16h having a copper foil formed on the entire surface of one main surface are prepared.
- the main surface on which the copper foil is formed is the back surface.
- a laser beam is irradiated from the front surface side or the back surface side to the positions (see FIG. 2) where the via hole conductors b1 to b4 of the insulating layer 16a are formed to form via holes.
- a via hole is formed by irradiating a laser beam from the surface side to a position (see FIG. 2) where the via hole conductor b5 of the insulator layer 16g is formed.
- via holes are formed in the insulator layers 16b to 16f and 16h as necessary.
- the external electrode 12 shown in FIG. 2 is formed on the surface of the insulator layer 16a by a photolithography process. Specifically, a resist having the same shape as that of the external electrode 12 shown in FIG. 2 is printed on the copper foil of the insulator layer 16a. And the copper foil of the part which is not covered with the resist is removed by performing an etching process with respect to copper foil. Thereafter, the resist is removed. Thereby, the external electrode 12 as shown in FIG. 2 is formed on the surface of the insulator layer 16a.
- the internal conductor 18 shown in FIG. 2 is formed on the back surface of the insulator layer 16a by a photolithography process.
- the photolithography process here is the same as the photolithography process in forming the external electrode 12, and thus the description thereof is omitted.
- the inner conductor 20 shown in FIG. 2 is formed on the back surface of the insulator layer 16g by a photolithography process.
- the inner conductors (not shown in FIG. 2) to be the coils L1 and L2 and the capacitor C in FIG. 3 are formed on the back surfaces of the insulator layers 16b to 16f by a photolithography process.
- the external electrode 14 shown in FIG. 2 is formed on the back surface of the insulator layer 16h by a photolithography process. Note that these photolithography processes are the same as the photolithography process in forming the external electrode 12, and thus the description thereof is omitted.
- the via holes formed in the insulator layers 16a and 16g are filled with a conductive paste containing copper as a main component to form the via hole conductors b1 to b5 shown in FIG.
- the via holes are also filled with a conductive paste.
- the insulator layers 16a to 16h are stacked in this order.
- the internal conductor 20 crosses the external electrode 12 located closest to the external electrode 14 and the regions A1 to A6 (see FIG. 1) obtained by connecting the external electrode 14.
- Insulator layers 16a to 16h are stacked.
- the insulator layers 16a to 16h are pressure-bonded by applying a force to the insulator layers 16a to 16h from the vertical direction in the stacking direction. Thereby, the circuit board 10 shown in FIG. 1 is obtained.
- the circuit board 10 can be prevented from being detached from the printed wiring board 100. More specifically, the printed wiring board 600 may bend due to an impact when an electronic device on which the conventional circuit board 500 and the printed wiring board 600 shown in FIG. 11 are mounted falls. Even if the printed wiring board 600 is bent, the circuit board 500 is a hard board, and therefore cannot be greatly deformed following the bending of the printed wiring board 600. Therefore, a load is applied to the solder connecting the external electrode 502 and the external electrode 602. As a result, the solder may be damaged and the circuit board 500 may be detached from the printed wiring board 600.
- the laminate 11 is configured by laminating an insulating layer 16 made of a flexible material. Therefore, the circuit board 10 can be bent more easily than the circuit board 500. Therefore, even if the printed wiring board 100 is bent due to the drop of the electronic device on which the module 150 shown in FIG. 5 is mounted, the circuit board 10 can be deformed following the bending of the printed wiring board 100. . As a result, it is possible to suppress a load from being applied to the solder connecting the external electrode 14 and the external electrode 104, and to prevent the circuit board 10 from being detached from the printed wiring board 100.
- the circuit board 10 can suppress the electronic component 50 from being detached from the circuit board 10 as described below. More specifically, since the printed circuit board 800 described in Patent Document 1 shown in FIG. 11 has flexibility over the entire surface, it bends over the entire surface. On the other hand, since the electronic component 700 is formed of a semiconductor substrate, it cannot be greatly bent. Therefore, a load is applied to the external electrodes 702 and 803 and the solder connecting them. As a result, the solder is damaged, or the external electrodes 702 and 803 are peeled off from the main bodies 701 and 801. That is, the connection between the electronic component 700 and the printed circuit board 800 is disconnected.
- the internal conductor 20 crosses the external electrode 12 positioned closest to the external electrode 14 and regions A 1 to A 6 obtained by connecting the external electrode 14. Furthermore, the inner conductor 20 is fixed to the insulator layer 16g and is not fixed to the insulator layer 16h. As a result, the electronic component 50 is prevented from being detached from the circuit board 10 as described below. More specifically, when the printed wiring board 100 is bent in a convex shape, the external electrode 104 is displaced in the direction of arrow F as shown in FIG. The external electrode 104 is connected to the external electrode 14 via the solder 70. Furthermore, the laminated body 11 has flexibility. Therefore, the external electrode 14 receives stress in the direction of arrow F as the external electrode 104 is displaced. As a result, a tensile stress ⁇ 1 is generated in the insulator layer 16h in the x-axis direction. The stress ⁇ 1 tends to be transmitted to the positive direction side in the z-axis direction.
- the internal conductor 20 is made of, for example, a metal foil such as copper, and the insulator layer 16h is made of a thermoplastic resin such as a liquid crystal polymer. Since the insulator layer 16h and the inner conductor 20 are merely pressure-bonded, there is no chemical bond between the surface of the insulator layer 16h and the inner conductor 20, and they are not fixed to each other. Therefore, the surface of the insulator layer 16 and the inner conductor 20 can slide with each other. Therefore, when a tensile stress is generated in the insulator layer 16h, a slip occurs between the surface of the insulator layer 16h and the internal conductor 20.
- the stress is not efficiently transmitted from the insulator layer 16h to the insulator layer 16g.
- the tensile stress ⁇ 2 generated in the insulator layer 16g is smaller than the tensile stress ⁇ 1 generated in the insulator layer 16h. Therefore, the elongation in the x-axis direction that occurs in the insulator layers 16a to 16h decreases as it goes from the negative direction side to the positive direction side in the z-axis direction. Therefore, the external electrodes 12a and 12b provided on the surface of the insulator layer 16a are hardly displaced. As a result, in the circuit board 10, the electronic component 50 can be prevented from being detached from the circuit board 10.
- the stress from the external electrode 14 is most efficiently transmitted to the external electrode 12 located closest to the external electrode 14 among the plurality of external electrodes 12. That is, the stress from the external electrodes 14a to 14f is transmitted to the external electrodes 12a to 12d through the regions A1 to A6. Therefore, in the circuit board 10, the inner conductor 20 crosses the regions A1 to A6. Thereby, it is suppressed that the stress from the external electrode 14 is transmitted to the external electrode 12 located closest to the external electrode 14. As a result, in the circuit board 10, it is possible to effectively suppress the electronic component 50 from being detached from the circuit board 10.
- the inner conductor 20 is in contact with the insulator layer 16 h constituting the lower surface of the multilayer body 11. That is, the internal conductor 20 is provided in the multilayer body 11 at the boundary between the insulator layers 16 closest to the lower surface of the multilayer body 11. Therefore, the stress ⁇ 1 shown in FIG. 5 is less likely to be transmitted to the insulator layers 16a to 16g located on the positive side in the z-axis direction relative to the internal conductor 20. Thereby, the deformation of the insulator layers 16a to 16g is suppressed, and the deformation of the coils L1 and L2 and the capacitor C is suppressed. As a result, changes in the characteristics of the coils L1 and L2 and the capacitor C are suppressed.
- the internal conductor 18, and some of the internal conductors constituting the coils L1 and L2 and the capacitor C are also provided in the regions A1 to A6. Across. Therefore, the internal conductor 18 and a part of the internal conductors constituting the coils L ⁇ b> 1 and L ⁇ b> 2 and the capacitor C also contribute to suppressing the electronic component 50 from being detached from the circuit board 10.
- the internal conductor 16 has been described as an example of the slip generation layer that can cause slip between the insulator layer 16, but the slip generation layer is not limited to the internal conductor 18, and the insulating layer 16 is stacked and pressed.
- Various inorganic material layers or organic material layers that are sometimes not fused to the insulator layer 16 may be used. Further, it may be a material that disappears at the time of lamination and pressure bonding and can form a gap between insulator layers.
- FIG. 6 is a cross-sectional structure diagram of a circuit board 10a according to a first modification.
- FIG. 7 is an enlarged view of FIG. 6D.
- FIG. 8 is an enlarged view of E in FIG.
- the internal conductor 20 is connected to the external electrode 14e by a via-hole conductor b6 that penetrates the insulator layer 16h.
- the via-hole conductor b ⁇ b> 6 is connected to the main surface S ⁇ b> 2 of the internal conductor 20. Since the via-hole conductor b6 and the inner conductor 20 are made of the same metal (for example, copper), they are metal-bonded at the time of pressure bonding. Therefore, when the via-hole conductor b6 is connected to the main surface S2 of the inner conductor 20, it is prevented that slip occurs between the inner conductor 20 and the surface of the insulator layer 16h. As a result, the stress ⁇ 1 from the external electrode 14e is transmitted to the positive side in the z-axis direction from the internal conductor 20.
- the inner conductor 20 ′ does not cross the region A2. Therefore, sufficient slip does not occur between the inner conductor 20 ′ and the surface of the insulator layer 16h. As a result, the stress ⁇ 1 from the external electrode 14b is transmitted to the positive side in the z-axis direction from the internal conductor 20 ′.
- the internal conductors 22a and 22b are provided so as to cross the regions A2 and A5 between the insulator layers 16f and 16g. Thereby, it is suppressed that stress (alpha) 1 is transmitted to the positive direction side of z-axis direction rather than internal conductor 22a, 22b. As a result, also in the circuit board 10a, it can suppress that the electronic component 50 remove
- the via-hole conductor b3 is connected to the internal conductor 18c. Therefore, it is also considered that slippage hardly occurs between the inner conductor 18c and the surface of the insulating layer 16b.
- the via-hole conductor b3 is connected to the main surface S1 of the internal conductor 18c and penetrates the insulator layer 16a.
- the inner conductor 18c is fixed to the insulator layer 16a. Therefore, slip can occur between the inner conductor 18c and the surface of the insulator layer 16b. Therefore, the inner conductor 18c can also contribute to suppressing the electronic component 50 from being detached from the circuit board 10a.
- FIG. 9 and 10 are diagrams showing inner conductors 20a to 20e according to modifications.
- a plurality of via-hole conductors b penetrating the insulator layer 16g are connected to the internal conductor 20a.
- the plurality of via-hole conductors b are arranged in the y-axis direction.
- the x-axis direction corresponds to the longitudinal direction of the inner conductor 20a. Therefore, the inner conductor 20a is easier to expand and contract in the x-axis direction than in the y-axis direction. Therefore, it is desirable that the plurality of via-hole conductors b are arranged in the y-axis direction that is not easily affected by the expansion / contraction of the internal conductor 20a.
- the via-hole conductor b may not be provided at all as in the internal conductor 20b shown in FIG. 9B.
- the inner conductor 20b functions as a dummy conductor.
- the via-hole conductor b when the via-hole conductor b is connected to the branch portion 30 provided in the internal conductors 20c to 20e as shown in the internal conductors 20c to 20e, the via-hole conductor b is x They may be arranged in the axial direction.
- the via-hole conductor b is provided in the insulator layer 16g.
- the via-hole conductor b is shown in FIGS. 9 and 10 even if it is provided in the insulator layer 16h. It is desirable that they are arranged as follows.
- the inner conductor 20 crosses all the areas A1 to A6. However, the inner conductor 20 does not necessarily need to cross all the regions A1 to A6, and may only cross at least one of the regions A1 to A6. However, the inner conductor 20 has outer electrodes 12a, 12b, 12c, 12d positioned closest to the outer electrodes 14a, 14c, 14d, 14f positioned closest to the four corners of the lower surface of the multilayer body 11, and It is desirable to cross the regions A1, A3, A4, and A6 obtained by connecting the external electrodes 14a, 14c, 14d, and 14f. This is because the external electrodes 14a, 14c, 14d, and 14f located near the corners of the lower surface are more easily displaced than the external electrodes 14b and 14e.
- the internal conductor 20 may be provided not on the back surface of the insulator layer 16g but on the surface of the insulator layer 16h.
- a fluorine coating may be applied to the main surface S2.
- the internal conductor may be a ground conductor, a capacitor conductor, a dummy conductor, or a wiring conductor.
- the slip generation layer is provided not in a single layer but in a plurality of layers in the region A.
- the present invention is useful for a circuit board, and is particularly excellent in that the electronic component can be prevented from being detached from the circuit board.
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Abstract
Description
以下に、本発明の一実施形態に係る回路基板の構成について図面を参照しながら説明する。図1は、本発明の一実施形態に係る回路基板10の外観斜視図である。図2は、図1の回路基板10の分解斜視図である。図3は、図1の回路基板10のA-Aにおける断面構造図である。図4は、図3のBにおける拡大図である。図1ないし図4において、回路基板10の作製時に、絶縁体層が積層される方向を積層方向と定義する。そして、この積層方向をz軸方向とし、回路基板10の長辺に沿った方向をx軸方向とし、回路基板10の短辺に沿った方向をy軸方向とする。また、回路基板10において、z軸方向の正方向側の面を上面と称し、z軸方向の負方向側の面を下面と称し、その他の面を側面と称す。
以下に、回路基板10の製造方法について図面を参照しながら説明する。まず、両方の主面の全面に銅箔が形成された絶縁体層16aを準備すると共に、一方の主面の全面に銅箔が形成された絶縁体層16b~16hを準備する。ここで、絶縁体層16b~16hでは、銅箔が形成された主面を裏面とする。
回路基板10では、以下に説明するように、プリント配線基板100が変形したとしても、回路基板10がプリント配線基板100から外れることを抑制できる。より詳細には、図11に示す従来の回路基板500及びプリント配線基板600が搭載された電子機器が落下した際の衝撃により、プリント配線基板600に撓みが発生する場合がある。プリント配線基板600に撓みが発生しても、回路基板500は、硬質基板であるので、プリント配線基板600の撓みに追従して大きく変形できない。そのため、外部電極502と外部電極602とを接続しているはんだに負荷がかかる。その結果、はんだが破損して、回路基板500がプリント配線基板600から外れてしまうことがある。
以下に、第1の変形例に係る回路基板10aについて図面を参照しながら説明する。図6は、第1の変形例に係る回路基板10aの断面構造図である。図7は、図6のDにおける拡大図である。図8は、図6のEにおける拡大図である。
L1,L2 コイル
b,b1~b6 ビアホール導体
10,10a 回路基板
11 積層体
12a~12d,14a~14f 外部電極
16a~16h 絶縁体層
18a~18d,20,20',20a~20e,22a,22b 内部導体
Claims (9)
- 可撓性材料からなる複数の絶縁体層が積層されることにより構成されている積層体と、
前記積層体の上面に設けられ、かつ、電子部品が接続される複数の第1の外部電極と、
前記積層体の下面に設けられ、かつ、配線基板に接続される第2の外部電極と、
隣接する2つの前記絶縁体層間に設けられ、かつ、前記第2の外部電極の最も近くに位置する前記第1の外部電極と該第2の外部電極とを結んで得られる領域を横切っていると共に、少なくとも一方の前記絶縁体層には固着していない滑り発生層と、
を備えていること、
を特徴とする回路基板。 - 前記滑り発生層は、一方の前記絶縁体層には固着しておらず、かつ、他方の前記絶縁体層に固着している内部導体であること、
を特徴とする請求項1に記載の回路基板。 - 前記一方の絶縁体層と接している前記内部導体の主面の表面粗さは、前記他方の絶縁体層と接している該内部導体の主面の表面粗さよりも大きいこと、
を特徴とする請求項2に記載の回路基板。 - 前記内部導体は、前記下面を構成している前記絶縁体層上に位置していること、
を特徴とする請求項2又は請求項3のいずれかに記載の回路基板。 - 前記内部導体は、グランド導体、コンデンサ導体、コイル導体、配線導体、又は、ダミー導体のいずれかであること、
を特徴とする請求項2ないし請求項4のいずれかに記載の回路基板。 - 前記下面は、長方形状をなしており、
前記第2の外部電極は、前記下面の互いに平行な2つの辺に沿って並ぶように複数設けられており、
前記滑り発生層は、前記下面の4つの角の最も近くに位置している前記第2の外部電極の最も近くに位置する前記第1の外部電極と該第2の外部電極とを結んで得られる領域を横切っていること、
を特徴とする請求項1ないし請求項5のいずれかに記載の回路基板。 - 前記一方の絶縁体層を貫通するように設けられ、かつ、前記内部導体に接続されているビアホール導体を、
更に備えていること、
を特徴とする請求項2ないし請求項5のいずれかに記載の回路基板。 - 前記ビアホール導体は、前記第1の外部電極と前記第2の外部電極とを結んで得られる領域内には設けられていないこと、
を特徴とする請求項7に記載の回路基板。 - 請求項1ないし請求項8のいずれかに記載の回路基板の製造方法において、
前記第1の外部電極、前記第2の外部電極及び前記滑り発生層を、前記複数の絶縁体層に形成する工程と、
前記第2の外部電極の最も近くに位置する前記第1の外部電極と該第2の外部電極とを結んで得られる領域を前記滑り発生層が横切るように、前記複数の絶縁体層を積層する工程と、
を備えていること、
を特徴とする回路基板の製造方法。
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CN201080021482.9A CN102422729B (zh) | 2009-05-12 | 2010-03-31 | 电路基板及其制造方法 |
JP2011513286A JP5344036B2 (ja) | 2009-05-12 | 2010-03-31 | 回路基板及びその製造方法 |
US13/286,318 US8383953B2 (en) | 2009-05-12 | 2011-11-01 | Circuit board and method for manufacturing the same |
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