JPWO2011142064A1 - アクティブマトリクス基板及び表示パネル - Google Patents
アクティブマトリクス基板及び表示パネル Download PDFInfo
- Publication number
- JPWO2011142064A1 JPWO2011142064A1 JP2012514682A JP2012514682A JPWO2011142064A1 JP WO2011142064 A1 JPWO2011142064 A1 JP WO2011142064A1 JP 2012514682 A JP2012514682 A JP 2012514682A JP 2012514682 A JP2012514682 A JP 2012514682A JP WO2011142064 A1 JPWO2011142064 A1 JP WO2011142064A1
- Authority
- JP
- Japan
- Prior art keywords
- insulating film
- contact hole
- wiring
- layer
- active matrix
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Images
Classifications
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136227—Through-hole connection of the pixel electrode to the active element through an insulation layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1222—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer
- H01L27/1225—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1345—Conductors connecting electrodes to cell terminals
- G02F1/13458—Terminal pads
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136286—Wiring, e.g. gate line, drain line
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136286—Wiring, e.g. gate line, drain line
- G02F1/13629—Multilayer wirings
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136286—Wiring, e.g. gate line, drain line
- G02F1/136295—Materials; Compositions; Manufacture processes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
- H01L27/1244—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits for preventing breakage, peeling or short circuiting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1248—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition or shape of the interlayer dielectric specially adapted to the circuit arrangement
Abstract
Description
図1〜図10は、本発明に係るアクティブマトリクス基板及び表示パネルの実施形態1を示している。具体的に、図1は、本実施形態のアクティブマトリクス基板20aの平面図であり、図2は、図1中のII−II線に沿ったアクティブマトリクス基板20a及びそれを備えた液晶表示パネル50aの断面図であり、図3は、図1中のIII−III線に沿ったアクティブマトリクス基板20aの断面図である。また、図4は、アクティブマトリクス基板20aの配線端子部の平面図であり、図5は、図4中のV−V線に沿ったその断面図である。さらに、図6は、アクティブマトリクス基板20aの配線接続部の平面図であり、図7は、図6中のVII−VII線に沿ったその断面図である。
まず、ガラス基板などの絶縁基板10aの基板全体に、スパッタリング法により、例えば、チタン膜、アルミニウム膜及びチタン膜などを順に成膜して、Ti/Al/Ti膜(厚さ100nm〜500nm程度)などの金属積層膜を成膜した後に、その金属積層膜に対して、フォトリソグラフィ、ウエットエッチング又はドライエッチング及びレジストの剥離洗浄を行うことにより、図8(a)、図9(a)及び図10(a)に示すように、ゲート配線11a及びソース引出配線11bを形成する。
まず、ガラス基板などの絶縁基板10bの基板全体に、スピンコート法又はスリットコート法により、例えば、黒色に着色された感光性樹脂を塗布した後に、その塗布膜を露光及び現像することにより、ブラックマトリクスを厚さ1.0μm程度に形成する。
まず、上記アクティブマトリクス基板製造工程で製造されたアクティブマトリクス基板20a、及び上記対向基板製造工程で製造された対向基板30の各表面に、印刷法によりポリイミドの樹脂膜を塗布した後に、その塗布膜に対して、焼成及びラビング処理を行うことにより、配向膜を形成する。
図11〜図18は、本発明に係るアクティブマトリクス基板及び表示パネルの実施形態2を示している。具体的に図11は、本実施形態のアクティブマトリクス基板20bを備えた液晶表示パネル50bの断面図である。また、図12は、アクティブマトリクス基板20bの配線端子部の平面図であり、図13は、図12中のXIII−XIII線に沿ったその断面図である。さらに、図14は、アクティブマトリクス基板20bの配線接続部の平面図であり、図15は、図14中のXV−XV線に沿ったその断面図である。なお、以下の実施形態において、図1〜図10と同じ部分については同じ符号を付して、その詳細な説明を省略する。
Ha〜Hh コンタクトホール
S 段差
5 TFT
10a 絶縁基板
11a ゲート配線(ゲート電極)
11b ソース引出配線(下層配線)
12a ゲート絶縁膜
13a,13b バリア層
15a ソース配線
15aa ソース電極
15b ドレイン電極
16a,16b 半導体層
17a 層間絶縁膜
18a 画素電極
18b 配線端子層
18c 配線接続層
20a,20b アクティブマトリクス基板
30 対向基板
40 液晶層(表示媒体層)
50a,50b 液晶表示パネル
Claims (9)
- マトリクス状に設けられた複数の画素電極と、
上記各画素電極にそれぞれ接続され、各々、絶縁基板に設けられたゲート電極、該ゲート電極を覆うように設けられたゲート絶縁膜、該ゲート絶縁膜上に上記ゲート電極に重なるようにチャネル領域が設けられた半導体層、並びに該ゲート絶縁膜上に該半導体層のチャネル領域を介して互いに離間するように銅又は銅合金により設けられたソース電極及びドレイン電極を有する複数の薄膜トランジスタとを備えたアクティブマトリクス基板であって、
上記半導体層は、酸化物半導体により上記ソース電極及びドレイン電極を覆うように設けられていることを特徴とするアクティブマトリクス基板。 - 請求項1に記載されたアクティブマトリクス基板において、
上記ソース電極及びドレイン電極の上記ゲート絶縁膜側には、該ソース電極及びドレイン電極からの銅の拡散を抑制するためのバリア層が設けられていることを特徴とするアクティブマトリクス基板。 - 請求項1又は2に記載されたアクティブマトリクス基板において、
上記ゲート絶縁膜は、酸化シリコン膜からなることを特徴とするアクティブマトリクス基板。 - 請求項1乃至3の何れか1つに記載されたアクティブマトリクス基板において、
上記各薄膜トランジスタを覆うように、酸化シリコン膜からなる層間絶縁膜が設けられていることを特徴とするアクティブマトリクス基板。 - 請求項4に記載されたアクティブマトリクス基板において、
上記各画素電極は、上記層間絶縁膜上に設けられ、該層間絶縁膜に形成されたコンタクトホール、及び上記半導体層に形成されたコンタクトホールを介して、上記各薄膜トランジスタのドレイン電極に接続され、
上記層間絶縁膜に形成されたコンタクトホールは、上記半導体層に形成されたコンタクトホールよりも平面視で大きく、該層間絶縁膜に形成されたコンタクトホールの内壁と該半導体層に形成されたコンタクトホールの内壁との間には、段差が設けられていることを特徴とするアクティブマトリクス基板。 - 請求項4又は5に記載されたアクティブマトリクス基板において、
上記ゲート電極と同一層に同一材料により設けられた下層配線と、
上記各画素電極と同一層に同一材料により設けられ、上記下層配線に接続された配線端子層とを備え、
上記下層配線及び配線端子層は、上記層間絶縁膜に形成されたコンタクトホール、及び上記ゲート絶縁膜に形成されたコンタクトホールを介して互いに接続され、
上記ゲート絶縁膜及び層間絶縁膜の間には、上記ゲート絶縁膜に形成されたコンタクトホールを囲むと共に、上記層間絶縁膜に形成されたコンタクトホールから露出するように、上記半導体層と同一材料により他の半導体層がリング状に設けられていることを特徴とするアクティブマトリクス基板。 - 請求項6に記載されたアクティブマトリクス基板において、
上記下層配線は、上記ゲート電極に接続されたゲート配線であることを特徴とするアクティブマトリクス基板。 - 請求項6に記載されたアクティブマトリクス基板において、
上記ソース電極及びドレイン電極と同一層に同一材料により設けられ、上記半導体層で覆われ、且つ該ソース電極に接続されたソース配線と、
上記各画素電極と同一層に同一材料により設けられ、上記下層配線及びソース配線を互いに接続するための配線接続層とを備え、
上記ソース配線及び配線接続層は、上記層間絶縁膜に形成されたコンタクトホール、及び上記半導体層に形成されたコンタクトホールを介して互いに接続され、
上記ソース配線及び配線接続層の接続部分では、上記層間絶縁膜に形成されたコンタクトホールが上記半導体層に形成されたコンタクトホールよりも平面視で大きく、該層間絶縁膜に形成されたコンタクトホールの内壁と該半導体層に形成されたコンタクトホールの内壁との間に段差が設けられ、
上記下層配線及び配線接続層は、上記層間絶縁膜に形成されたコンタクトホール、及び上記ゲート絶縁膜に形成されたコンタクトホールを介して互いに接続され、
上記下層配線及び配線接続層の接続部分では、上記半導体層が、上記ゲート絶縁膜及び層間絶縁膜の間において、上記ゲート絶縁膜に形成されたコンタクトホールを囲むと共に、上記層間絶縁膜に形成されたコンタクトホールから露出するように設けられていることを特徴とするアクティブマトリクス基板。 - 互いに対向するように設けられたアクティブマトリクス基板及び対向基板と、
上記アクティブマトリクス基板及び対向基板の間に設けられた表示媒体層とを備えた表示パネルであって、
上記アクティブマトリクス基板は、
マトリクス状に設けられた複数の画素電極と、
上記各画素電極にそれぞれ接続され、各々、絶縁基板に設けられたゲート電極、該ゲート電極を覆うように設けられたゲート絶縁膜、該ゲート絶縁膜上に上記ゲート電極に重なるようにチャネル領域が設けられた半導体層、並びに該ゲート絶縁膜上に該半導体層のチャネル領域を介して互いに離間するように銅又は銅合金により設けられたソース電極及びドレイン電極を有する複数の薄膜トランジスタとを備え、
上記半導体層は、酸化物半導体により上記ソース電極及びドレイン電極を覆うように設けられていることを特徴とする表示パネル。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2012514682A JP5133467B2 (ja) | 2010-05-11 | 2011-02-14 | アクティブマトリクス基板及び表示パネル |
Applications Claiming Priority (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2010109411 | 2010-05-11 | ||
JP2010109411 | 2010-05-11 | ||
PCT/JP2011/000808 WO2011142064A1 (ja) | 2010-05-11 | 2011-02-14 | アクティブマトリクス基板及び表示パネル |
JP2012514682A JP5133467B2 (ja) | 2010-05-11 | 2011-02-14 | アクティブマトリクス基板及び表示パネル |
Publications (2)
Publication Number | Publication Date |
---|---|
JP5133467B2 JP5133467B2 (ja) | 2013-01-30 |
JPWO2011142064A1 true JPWO2011142064A1 (ja) | 2013-07-22 |
Family
ID=44914127
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2012514682A Expired - Fee Related JP5133467B2 (ja) | 2010-05-11 | 2011-02-14 | アクティブマトリクス基板及び表示パネル |
Country Status (5)
Country | Link |
---|---|
US (1) | US8592811B2 (ja) |
JP (1) | JP5133467B2 (ja) |
KR (1) | KR101278353B1 (ja) |
CN (1) | CN102893315B (ja) |
WO (1) | WO2011142064A1 (ja) |
Families Citing this family (17)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103765597B (zh) * | 2012-11-02 | 2016-09-28 | 京东方科技集团股份有限公司 | 薄膜晶体管及其制作方法、阵列基板、显示装置和阻挡层 |
EP2916360A4 (en) | 2012-11-02 | 2016-06-22 | Boe Technology Group Co Ltd | THIN-LAYER TRANSISTOR AND MANUFACTURING METHOD, ARRAY SUBSTRATE, DISPLAY DEVICE AND BARRIER LAYER THEREFOR |
CN103456740B (zh) | 2013-08-22 | 2016-02-24 | 京东方科技集团股份有限公司 | 像素单元及其制造方法、阵列基板和显示装置 |
CN103794651A (zh) * | 2014-01-23 | 2014-05-14 | 京东方科技集团股份有限公司 | 一种薄膜晶体管及其制备方法、阵列基板、显示装置 |
CN104733475A (zh) * | 2015-03-26 | 2015-06-24 | 南京中电熊猫液晶显示科技有限公司 | 一种阵列基板及其制造方法 |
CN104867985A (zh) * | 2015-05-18 | 2015-08-26 | 京东方科技集团股份有限公司 | 一种薄膜晶体管、其制备方法、阵列基板及显示装置 |
JP6513197B2 (ja) * | 2015-07-22 | 2019-05-15 | シャープ株式会社 | タッチパネル付き表示装置及びタッチパネル付き表示装置の製造方法 |
KR20170080320A (ko) * | 2015-12-31 | 2017-07-10 | 엘지디스플레이 주식회사 | 박막트랜지스터, 그를 갖는 표시장치, 및 박막트랜지스터의 제조방법 |
CN108701720B (zh) * | 2016-02-24 | 2021-09-21 | 夏普株式会社 | 薄膜晶体管基板和显示面板 |
WO2018003633A1 (ja) * | 2016-06-28 | 2018-01-04 | シャープ株式会社 | アクティブマトリクス基板、光シャッタ基板、表示装置、アクティブマトリクス基板の製造方法 |
CN109661701A (zh) * | 2016-09-01 | 2019-04-19 | 夏普株式会社 | 有源矩阵基板和显示装置 |
CN109791892A (zh) * | 2016-09-27 | 2019-05-21 | 夏普株式会社 | 有源矩阵基板及其制造方法 |
JP6781051B2 (ja) * | 2017-01-12 | 2020-11-04 | 株式会社Joled | 半導体装置、表示装置および電子機器 |
CN110476200B (zh) * | 2017-03-29 | 2021-11-16 | 夏普株式会社 | Tft基板、tft基板的制造方法、显示装置 |
US11189645B2 (en) * | 2017-03-31 | 2021-11-30 | Sharp Kabushiki Kaisha | Active matrix substrate and liquid crystal display device |
US10847733B2 (en) * | 2017-08-04 | 2020-11-24 | Sharp Kabushiki Kaisha | Display device |
CN110190028A (zh) * | 2019-06-10 | 2019-08-30 | 北海惠科光电技术有限公司 | 薄膜晶体管阵列基板制备方法 |
Family Cites Families (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2003051463A (ja) * | 2001-05-29 | 2003-02-21 | Sharp Corp | 金属配線の製造方法およびその方法を用いた金属配線基板 |
WO2003088193A1 (fr) * | 2002-04-16 | 2003-10-23 | Sharp Kabushiki Kaisha | Substrat, affichage a cristaux liquides comprenant ce substrat et procede de production du substrat |
JP4831954B2 (ja) * | 2003-11-14 | 2011-12-07 | 株式会社半導体エネルギー研究所 | 表示装置の作製方法 |
KR101111470B1 (ko) * | 2003-11-14 | 2012-02-21 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | 표시 장치 및 그 제조 방법 |
KR101086477B1 (ko) * | 2004-05-27 | 2011-11-25 | 엘지디스플레이 주식회사 | 표시 소자용 박막 트랜지스터 기판 제조 방법 |
KR101107682B1 (ko) * | 2004-12-31 | 2012-01-25 | 엘지디스플레이 주식회사 | 표시 소자용 박막 트랜지스터 기판 및 그 제조 방법 |
KR101158903B1 (ko) * | 2005-08-05 | 2012-06-25 | 삼성전자주식회사 | 표시장치용 기판, 그 제조방법 및 이를 갖는 표시장치 |
KR20100020514A (ko) | 2007-06-08 | 2010-02-22 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | 표시 장치 |
JP2010056136A (ja) * | 2008-08-26 | 2010-03-11 | Toshiba Mobile Display Co Ltd | 配線、その製造方法、薄膜トランジスタおよび表示素子 |
JP5442234B2 (ja) | 2008-10-24 | 2014-03-12 | 株式会社半導体エネルギー研究所 | 半導体装置及び表示装置 |
CN103972246B (zh) | 2009-07-27 | 2017-05-31 | 株式会社神户制钢所 | 布线结构以及具备布线结构的显示装置 |
-
2011
- 2011-02-14 KR KR1020127031712A patent/KR101278353B1/ko active IP Right Grant
- 2011-02-14 JP JP2012514682A patent/JP5133467B2/ja not_active Expired - Fee Related
- 2011-02-14 WO PCT/JP2011/000808 patent/WO2011142064A1/ja active Application Filing
- 2011-02-14 CN CN201180022972.5A patent/CN102893315B/zh active Active
- 2011-02-14 US US13/697,106 patent/US8592811B2/en active Active
Also Published As
Publication number | Publication date |
---|---|
WO2011142064A1 (ja) | 2011-11-17 |
US8592811B2 (en) | 2013-11-26 |
JP5133467B2 (ja) | 2013-01-30 |
CN102893315A (zh) | 2013-01-23 |
US20130207114A1 (en) | 2013-08-15 |
KR20130000430A (ko) | 2013-01-02 |
CN102893315B (zh) | 2014-01-22 |
KR101278353B1 (ko) | 2013-06-25 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP5133467B2 (ja) | アクティブマトリクス基板及び表示パネル | |
JP5133469B2 (ja) | 薄膜トランジスタ基板及びそれを備えた液晶表示装置並びに薄膜トランジスタ基板の製造方法 | |
KR101640293B1 (ko) | 반도체 장치, 표시 장치, 및 반도체 장치 및 표시 장치의 제조 방법 | |
TWI546975B (zh) | 半導體裝置、液晶顯示裝置及半導體裝置之製造方法 | |
US8957418B2 (en) | Semiconductor device and display apparatus | |
JP5347071B2 (ja) | アクティブマトリクス基板の製造方法及びその方法により製造されたアクティブマトリクス基板、並びに表示パネル | |
KR102075530B1 (ko) | 박막트랜지스터 어레이 기판 및 그 제조방법, 및 이를 포함하는 표시장치 | |
WO2012144165A1 (ja) | 薄膜トランジスタ、表示パネル及び薄膜トランジスタの製造方法 | |
JP6235021B2 (ja) | 半導体装置、表示装置および半導体装置の製造方法 | |
WO2012008080A1 (ja) | 薄膜トランジスタ基板 | |
JP5379331B2 (ja) | 半導体装置の製造方法 | |
JP5162050B2 (ja) | 半導体素子、半導体素子の製造方法、アクティブマトリクス基板及び表示装置 | |
US9171940B2 (en) | Thin film transistor substrate, display device, and method for manufacturing thin film transistor substrate | |
US20150287799A1 (en) | Semiconductor device, display panel, and semiconductor device manufacturing method | |
JP5243665B2 (ja) | 表示装置の製造方法 | |
JP2013055080A (ja) | 表示装置および表示装置の製造方法 | |
JP2022159307A (ja) | 表示装置 | |
WO2012169397A1 (ja) | 薄膜トランジスタ、その製造方法、および表示素子 | |
WO2010092725A1 (ja) | 接続端子及び該接続端子を備えた表示装置 | |
US10804406B2 (en) | Thin-film transistor substrate, liquid crystal display device including the same, and method for producing thin-film transistor substrate | |
JP2012204548A (ja) | 表示装置およびその製造方法 | |
JP6482256B2 (ja) | 薄膜トランジスタ基板および液晶表示装置 | |
WO2013008441A1 (ja) | アクティブマトリクス基板及びその製造方法 | |
WO2012056663A1 (ja) | 回路基板及びその製造方法並びに表示装置 | |
JP6727414B2 (ja) | 薄膜トランジスタ基板及びその製造方法 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20120903 |
|
A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20120903 |
|
A871 | Explanation of circumstances concerning accelerated examination |
Free format text: JAPANESE INTERMEDIATE CODE: A871 Effective date: 20120903 |
|
A975 | Report on accelerated examination |
Free format text: JAPANESE INTERMEDIATE CODE: A971005 Effective date: 20121003 |
|
TRDD | Decision of grant or rejection written | ||
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20121009 |
|
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 |
|
A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20121107 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20151116 Year of fee payment: 3 |
|
R150 | Certificate of patent or registration of utility model |
Ref document number: 5133467 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R150 Free format text: JAPANESE INTERMEDIATE CODE: R150 |
|
LAPS | Cancellation because of no payment of annual fees |