JPS643045B2 - - Google Patents

Info

Publication number
JPS643045B2
JPS643045B2 JP14327079A JP14327079A JPS643045B2 JP S643045 B2 JPS643045 B2 JP S643045B2 JP 14327079 A JP14327079 A JP 14327079A JP 14327079 A JP14327079 A JP 14327079A JP S643045 B2 JPS643045 B2 JP S643045B2
Authority
JP
Japan
Prior art keywords
film
substrate
single crystal
polycrystalline
semiconductor film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP14327079A
Other languages
English (en)
Japanese (ja)
Other versions
JPS5667923A (en
Inventor
Hiroyuki Tango
Yoshihisa Mizutani
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Shibaura Electric Co Ltd filed Critical Tokyo Shibaura Electric Co Ltd
Priority to JP14327079A priority Critical patent/JPS5667923A/ja
Publication of JPS5667923A publication Critical patent/JPS5667923A/ja
Publication of JPS643045B2 publication Critical patent/JPS643045B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28512Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
    • H01L21/28525Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table the conductive layers comprising semiconducting material

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Recrystallisation Techniques (AREA)
JP14327079A 1979-11-07 1979-11-07 Preparation method of semiconductor system Granted JPS5667923A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14327079A JPS5667923A (en) 1979-11-07 1979-11-07 Preparation method of semiconductor system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14327079A JPS5667923A (en) 1979-11-07 1979-11-07 Preparation method of semiconductor system

Related Child Applications (3)

Application Number Title Priority Date Filing Date
JP57087879A Division JPS5825222A (ja) 1982-05-26 1982-05-26 半導体装置の製造方法
JP57087878A Division JPS5825221A (ja) 1982-05-26 1982-05-26 半導体装置の製造方法
JP57087880A Division JPS5825271A (ja) 1982-05-26 1982-05-26 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
JPS5667923A JPS5667923A (en) 1981-06-08
JPS643045B2 true JPS643045B2 (enrdf_load_stackoverflow) 1989-01-19

Family

ID=15334838

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14327079A Granted JPS5667923A (en) 1979-11-07 1979-11-07 Preparation method of semiconductor system

Country Status (1)

Country Link
JP (1) JPS5667923A (enrdf_load_stackoverflow)

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS586121A (ja) * 1981-07-02 1983-01-13 Seiko Epson Corp 半導体基板
JPS5817674A (ja) * 1981-07-24 1983-02-01 Seiko Epson Corp Mos型半導体装置
JPS5837913A (ja) * 1981-08-28 1983-03-05 Matsushita Electric Ind Co Ltd 半導体装置の製造方法
JPS5839062A (ja) * 1981-09-02 1983-03-07 Toshiba Corp 半導体装置とその製造方法
JPS5853821A (ja) * 1981-09-25 1983-03-30 Toshiba Corp 積層半導体装置の製造方法
JPS5853822A (ja) * 1981-09-25 1983-03-30 Toshiba Corp 積層半導体装置
JPS5890769A (ja) * 1981-11-25 1983-05-30 Mitsubishi Electric Corp 積層半導体装置
JPS5893217A (ja) * 1981-11-30 1983-06-02 Toshiba Corp 半導体結晶膜の製造方法
JPS5893221A (ja) * 1981-11-30 1983-06-02 Toshiba Corp 半導体薄膜構造とその製造方法
JPS58175821A (ja) * 1982-04-08 1983-10-15 Toshiba Corp 半導体装置の製造方法
JPS6055614A (ja) * 1983-09-07 1985-03-30 Agency Of Ind Science & Technol 半導体単結晶膜の製造方法
JPS60189217A (ja) * 1984-03-09 1985-09-26 Agency Of Ind Science & Technol 多層soi用シ−ド構造
JPS61199624A (ja) * 1985-03-02 1986-09-04 Agency Of Ind Science & Technol 半導体単結晶層の製造方法
JPS62122120A (ja) * 1986-01-10 1987-06-03 Seiko Epson Corp 半導体基板の製造方法
JPS635559A (ja) * 1986-06-25 1988-01-11 Matsushita Electronics Corp 半導体装置の製造方法
JPS63285184A (ja) * 1988-04-22 1988-11-22 Seiko Epson Corp 単結晶膜の製造方法
WO2006007188A1 (en) * 2004-06-30 2006-01-19 Advanced Micro Devices, Inc. Technique for forming a substrate having crystalline semiconductor regions of different characteristics

Also Published As

Publication number Publication date
JPS5667923A (en) 1981-06-08

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