JPS6360551B2 - - Google Patents

Info

Publication number
JPS6360551B2
JPS6360551B2 JP54150978A JP15097879A JPS6360551B2 JP S6360551 B2 JPS6360551 B2 JP S6360551B2 JP 54150978 A JP54150978 A JP 54150978A JP 15097879 A JP15097879 A JP 15097879A JP S6360551 B2 JPS6360551 B2 JP S6360551B2
Authority
JP
Japan
Prior art keywords
semiconductor layer
insulating film
single crystal
substrate
impurity
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP54150978A
Other languages
English (en)
Japanese (ja)
Other versions
JPS5673447A (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP15097879A priority Critical patent/JPS5673447A/ja
Publication of JPS5673447A publication Critical patent/JPS5673447A/ja
Publication of JPS6360551B2 publication Critical patent/JPS6360551B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Recrystallisation Techniques (AREA)
  • Local Oxidation Of Silicon (AREA)
  • Bipolar Transistors (AREA)
  • Drying Of Semiconductors (AREA)
JP15097879A 1979-11-21 1979-11-21 Manufacture of semiconductor device Granted JPS5673447A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15097879A JPS5673447A (en) 1979-11-21 1979-11-21 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15097879A JPS5673447A (en) 1979-11-21 1979-11-21 Manufacture of semiconductor device

Publications (2)

Publication Number Publication Date
JPS5673447A JPS5673447A (en) 1981-06-18
JPS6360551B2 true JPS6360551B2 (enrdf_load_stackoverflow) 1988-11-24

Family

ID=15508601

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15097879A Granted JPS5673447A (en) 1979-11-21 1979-11-21 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS5673447A (enrdf_load_stackoverflow)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5846677A (ja) * 1981-09-11 1983-03-18 Matsushita Electric Ind Co Ltd バイポ−ラトランジスタおよびその製造方法
JPS5848440A (ja) * 1981-09-16 1983-03-22 Fujitsu Ltd 半導体装置の製造方法
JPS61242073A (ja) * 1985-04-19 1986-10-28 Fujitsu Ltd 半導体装置の製造方法
JP2023023459A (ja) * 2021-08-05 2023-02-16 東京エレクトロン株式会社 成膜方法及び成膜装置

Also Published As

Publication number Publication date
JPS5673447A (en) 1981-06-18

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