JPS6317227B2 - - Google Patents
Info
- Publication number
- JPS6317227B2 JPS6317227B2 JP56062882A JP6288281A JPS6317227B2 JP S6317227 B2 JPS6317227 B2 JP S6317227B2 JP 56062882 A JP56062882 A JP 56062882A JP 6288281 A JP6288281 A JP 6288281A JP S6317227 B2 JPS6317227 B2 JP S6317227B2
- Authority
- JP
- Japan
- Prior art keywords
- region
- layer
- isolation
- field effect
- ion
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Junction Field-Effect Transistors (AREA)
- Element Separation (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56062882A JPS57177537A (en) | 1981-04-24 | 1981-04-24 | Isolation of semiconductor element |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56062882A JPS57177537A (en) | 1981-04-24 | 1981-04-24 | Isolation of semiconductor element |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS57177537A JPS57177537A (en) | 1982-11-01 |
| JPS6317227B2 true JPS6317227B2 (enrdf_load_stackoverflow) | 1988-04-13 |
Family
ID=13213073
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP56062882A Granted JPS57177537A (en) | 1981-04-24 | 1981-04-24 | Isolation of semiconductor element |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS57177537A (enrdf_load_stackoverflow) |
Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6155938A (ja) * | 1984-08-27 | 1986-03-20 | Yokogawa Hokushin Electric Corp | 電子素子の分離法 |
| US4705606A (en) * | 1985-01-31 | 1987-11-10 | Gould Inc. | Thin-film electrical connections for integrated circuits |
| JPH0810704B2 (ja) * | 1986-06-18 | 1996-01-31 | 株式会社日立製作所 | 半導体装置の製造方法 |
| JP2551203B2 (ja) * | 1990-06-05 | 1996-11-06 | 三菱電機株式会社 | 半導体装置 |
| US9171936B2 (en) | 2006-12-06 | 2015-10-27 | Cypress Semiconductor Corporation | Barrier region underlying source/drain regions for dual-bit memory devices |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5153489A (en) * | 1974-11-06 | 1976-05-11 | Hitachi Ltd | Handotaisochino seizohoho |
-
1981
- 1981-04-24 JP JP56062882A patent/JPS57177537A/ja active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS57177537A (en) | 1982-11-01 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US4683637A (en) | Forming depthwise isolation by selective oxygen/nitrogen deep implant and reaction annealing | |
| US4717681A (en) | Method of making a heterojunction bipolar transistor with SIPOS | |
| US4651408A (en) | Fabrication of stacked MOS devices utilizing lateral seeding and a plurality of separate implants at different energies | |
| US4426767A (en) | Selective epitaxial etch planar processing for gallium arsenide semiconductors | |
| US4412868A (en) | Method of making integrated circuits utilizing ion implantation and selective epitaxial growth | |
| US4463492A (en) | Method of forming a semiconductor device on insulating substrate by selective amorphosization followed by simultaneous activation and reconversion to single crystal state | |
| US4149307A (en) | Process for fabricating insulated-gate field-effect transistors with self-aligned contacts | |
| JPH0476503B2 (enrdf_load_stackoverflow) | ||
| JP2746499B2 (ja) | 半導体装置及びその製造方法 | |
| US3914784A (en) | Ion Implanted gallium arsenide semiconductor devices fabricated in semi-insulating gallium arsenide substrates | |
| JPS6224945B2 (enrdf_load_stackoverflow) | ||
| JPS59117167A (ja) | 半導体装置の製造方法 | |
| JPS6317227B2 (enrdf_load_stackoverflow) | ||
| JPS59208851A (ja) | 半導体装置とその製造法 | |
| EP0063139A4 (en) | METHOD FOR MANUFACTURING A III-V BIPOLAR TRANSISTOR BY SELECTIVE ION IMPLANTATION AND DEVICE OBTAINED ACCORDING TO THIS PROCESS. | |
| US5786261A (en) | Method for fabricating semiconductor device having device isolation layer | |
| KR0136532B1 (ko) | 박막트랜지스터 제조방법 | |
| JP2664416B2 (ja) | 半導体装置の製造方法 | |
| JPH0362015B2 (enrdf_load_stackoverflow) | ||
| JPS6386565A (ja) | 半導体装置の製造方法 | |
| JPS59138363A (ja) | 半導体装置及びその製造方法 | |
| JP2745946B2 (ja) | 半導体集積回路の製造方法 | |
| JPH02187035A (ja) | 半導体装置の製造方法 | |
| JPH08264724A (ja) | 半導体装置およびその製造方法 | |
| JPH05136084A (ja) | 半導体装置の表面にメタライゼーシヨンを形成する方法 |