JPS6333737B2 - - Google Patents
Info
- Publication number
- JPS6333737B2 JPS6333737B2 JP54158400A JP15840079A JPS6333737B2 JP S6333737 B2 JPS6333737 B2 JP S6333737B2 JP 54158400 A JP54158400 A JP 54158400A JP 15840079 A JP15840079 A JP 15840079A JP S6333737 B2 JPS6333737 B2 JP S6333737B2
- Authority
- JP
- Japan
- Prior art keywords
- output
- flip
- flop
- frequency
- predetermined
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K23/00—Pulse counters comprising counting chains; Frequency dividers comprising counting chains
- H03K23/58—Gating or clocking signals not applied to all stages, i.e. asynchronous counters
Landscapes
- Synchronisation In Digital Transmission Systems (AREA)
- Manipulation Of Pulses (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP15840079A JPS5680931A (en) | 1979-12-06 | 1979-12-06 | Frequency dividing circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP15840079A JPS5680931A (en) | 1979-12-06 | 1979-12-06 | Frequency dividing circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5680931A JPS5680931A (en) | 1981-07-02 |
JPS6333737B2 true JPS6333737B2 (enrdf_load_stackoverflow) | 1988-07-06 |
Family
ID=15670907
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP15840079A Granted JPS5680931A (en) | 1979-12-06 | 1979-12-06 | Frequency dividing circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5680931A (enrdf_load_stackoverflow) |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS58206236A (ja) * | 1982-05-26 | 1983-12-01 | Nec Corp | 非同期式ダウンカウンタ |
JP2547723B2 (ja) * | 1985-06-07 | 1996-10-23 | 日本電気株式会社 | 分周回路 |
US5442670A (en) * | 1994-02-16 | 1995-08-15 | National Semiconductor Corporation | Circuit for dividing clock frequency by N.5 where N is an integer |
US5557224A (en) * | 1994-04-15 | 1996-09-17 | International Business Machines Corporation | Apparatus and method for generating a phase-controlled clock signal |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5224458A (en) * | 1975-08-20 | 1977-02-23 | Matsushita Electric Ind Co Ltd | Counter circuit |
JPS5267560A (en) * | 1975-12-02 | 1977-06-04 | Toshiba Corp | Counter |
-
1979
- 1979-12-06 JP JP15840079A patent/JPS5680931A/ja active Granted
Also Published As
Publication number | Publication date |
---|---|
JPS5680931A (en) | 1981-07-02 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US4443887A (en) | Frequency-dividing circuit | |
US4423381A (en) | Pulse control circuit | |
US4550307A (en) | Pulse generator | |
JP2877205B2 (ja) | 2相ノンオーバラップ信号生成回路 | |
JP3815209B2 (ja) | クロック信号からのパルス信号の生成 | |
JPS6333737B2 (enrdf_load_stackoverflow) | ||
JP2659186B2 (ja) | デイジタル可変分周回路 | |
JP2606262B2 (ja) | パルス発生回路 | |
JP2754005B2 (ja) | 多相パルス発生回路 | |
JP3427939B2 (ja) | 遅延回路 | |
JP2757714B2 (ja) | フレームパルス生成回路 | |
JPH0548432A (ja) | 1/3分周回路 | |
JP2655509B2 (ja) | シリアル/パラレル変換回路 | |
US4658364A (en) | Signal processing apparatus | |
JP3236235B2 (ja) | トグルフリップフロップ | |
JPH1084277A (ja) | クロック生成回路 | |
JPH0529924A (ja) | 9分周回路 | |
JPH0529925A (ja) | 11分周回路 | |
JPH0884069A (ja) | 可変分周器 | |
JPH02305022A (ja) | 分周回路 | |
JPS601650B2 (ja) | 1ビツト遅延型全加算器 | |
JPS6398213A (ja) | パワ−オンリセツト回路 | |
JPS60227521A (ja) | 2/3分周回路 | |
JPH0756651A (ja) | クロック発生回路 | |
JPH04302527A (ja) | 計数回路 |