JPS63193553A - 半導体装置 - Google Patents

半導体装置

Info

Publication number
JPS63193553A
JPS63193553A JP63007389A JP738988A JPS63193553A JP S63193553 A JPS63193553 A JP S63193553A JP 63007389 A JP63007389 A JP 63007389A JP 738988 A JP738988 A JP 738988A JP S63193553 A JPS63193553 A JP S63193553A
Authority
JP
Japan
Prior art keywords
conductor
semiconductor device
substrate
conductors
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP63007389A
Other languages
English (en)
Other versions
JPH0680762B2 (ja
Inventor
ハインツ、アマン
レオ、ローレンツ
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Siemens AG
Original Assignee
Siemens AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens AG filed Critical Siemens AG
Publication of JPS63193553A publication Critical patent/JPS63193553A/ja
Publication of JPH0680762B2 publication Critical patent/JPH0680762B2/ja
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/64—Impedance arrangements
    • H01L23/645—Inductive arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/07—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00
    • H01L25/072—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00 the devices being arranged next to each other
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/003—Constructional details, e.g. physical layout, assembly, wiring or busbar connections
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/04042—Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0555—Shape
    • H01L2224/05552—Shape in top view
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0555—Shape
    • H01L2224/05552—Shape in top view
    • H01L2224/05554—Shape in top view being square
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0555—Shape
    • H01L2224/05556—Shape in side view
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
    • H01L2224/0601—Structure
    • H01L2224/0603—Bonding areas having different sizes, e.g. different heights or widths
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
    • H01L2224/0605—Shape
    • H01L2224/06051—Bonding areas having different shapes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/4847—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
    • H01L2224/48472—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4911—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
    • H01L2224/49111—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain the connectors connecting two common bonding areas, e.g. Litz or braid wires
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49175—Parallel arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01005—Boron [B]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01013—Aluminum [Al]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01015—Phosphorus [P]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01032—Germanium [Ge]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01082—Lead [Pb]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01083—Bismuth [Bi]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/014—Solder alloys
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/1015—Shape
    • H01L2924/1016—Shape being a cuboid
    • H01L2924/10161—Shape being a cuboid with a rectangular active surface
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1305—Bipolar Junction Transistor [BJT]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1306—Field-effect transistor [FET]
    • H01L2924/13091—Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901—Structure
    • H01L2924/1904—Component type
    • H01L2924/19041—Component type being a capacitor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/30107—Inductance

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Combinations Of Printed Boards (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。

Description

【発明の詳細な説明】 〔産業上の利用分野］ 本発明は、絶縁基板と、この絶縁基板上に配置されて電
気的に互いに分離された少なくとも２つの導体路と、接
触を有する少なくとも１つの半導体基体と、前記接触と
導体路との間を接続する電気的接続部と、それぞれ１つ
が前記両導体路の１つに電気的に接続された接続導体と
を備えた半導体装置に関する。
〔従来の技術〕
この種の半導体装置は本件出願人により既に特願昭６２
−２６３６４２号にて提案されている。
この既提案の実施例においては、負荷電流を案内する接
続導体は基板の互いに対向する端部に配置されている。
〔発明が解決しようとする課題〕
従って、接続導体は負荷回路内に比較的高いインダクタ
ンスを形成し、そのために２、勾配の負荷電流でもって
半導体装置をターンオフする際、半導体デバイスを破壊
させるような高電圧が誘起される。
本発明は、主電流回路のインダクタンスを減少させるこ
とを目的とする。
（課題を解決するための手段〕 この目的を達成するために、本発明は、接続導体は接近
して一緒にかつ少なくとも一部分が互いに平行に配置さ
れることを特徴とする。
本発明の実施態様は特許請求の範囲第２項以下に記載さ
れている。
〔実施例］ 次に、本発明を図面に示された実施例に基づいて詳細に
説明する。
第１図は本発明の第１実施例を示す斜視図、第２図は本
発明の第２実施例を示す平面図である。
第１図に示された半導体装置は基板１上に構成されてい
る。基板は良絶縁性で熱良導性の材料、例えば酸化アル
ミニウムまたは酸化ベリリウムから成る。基板上には導
体路２，３．４および５が設けられている。導体路２．
３はＵ字形に形成されており、導体路２内に導体路３が
入れられている。導体路３上には半導体基体６が設けら
れ、導体路と電気的に接続されている。この半導体基体
は例えばパワーＭＯ５ＦＥＴまたはバイポーラトランジ
スタである。この場合には、半導体基体はＭＯＳ　Ｆ　
ＥＴであるとする。半導体基体６は導体路３とは反対側
の面にゲート接触７およびソース接触８を有している。
ドレイン接触は下面に位置して、導体路３に接続されて
いる。ゲート接触７はボンディングワイヤ１３を介して
導体路４に接続されている。ソース接触８はボンディン
グワイヤ９を介して導体路２に接続されている。さらに
、ソース接触８はボンディングワイヤ１０を介して第４
の導体路５に接続されている。
導体路２．３は負荷回路内のインダクタンスを出来る限
り僅かにするという理由から接近して一緒に配置されて
いる。しかしながら、それらの間隔は必要な絶縁耐力が
保証されるような大きさである。さらに、導体路２．３
は互いに平行に位置している０両Ｕ字形導体路２．３の
同様に互いに平行に位置する横桁上には、それぞれ１つ
の接続導体１１．１２が設けられている、例えばろう付
けされている。接Ｖｔ導体１１．１２は外部導線への接
続に供される接続面１４．１５に到るまで互いに平行で
ある。それらの間隔ａは両導体路２゜３間の間隔と同様
に、絶縁耐力が保証される範囲で出来る限り小さく選定
されている。
上述した構成によれば、主電流回路のインダクタンスは
冒頭で述べた既提案の半導体装置に比較して約半分とな
る。従って、ｉｉ流をターンオフする際に発生する誘導
電圧も同様に半分になる。
導体路４および導体路５はゲート端子１７およびソース
補助端子１６にそれぞれ接続されている。
ＭＯＳＦＥＴは端子１６．１７間に印加された電圧によ
って制御される。制御回路は従って誘導的には充分に負
荷回路から減結合されており、それゆえ負荷電流の増大
は半導体装置のターンオン特性に僅かしか影響しない。
接続導体１１．１２間の間隔ａが僅かであるにも拘わら
ず存在するインダクタンスは、接続導体間の中間空間に
、比誘電率が１よりも大きい誘電体を充填することによ
って部分的に補償することができる。この場合、コンデ
ンサとして使用可能な材料を使用することができる。誘
電体に加えて、または、誘電体に代えて、両接続導体間
には絶縁シートを配置することができる。
インダクタンスを僅かにするという理由から、接続導体
は出来る限り短くすることが推奨される。
従って、接続導体は基板１の表面に対して特に垂直に設
けられる。
半導体装置が複数の半導体基体を有する場合には、第２
図に示されるように、接続導体１１．１２は基板１およ
び導体路２．３上に対称に配置される。第２図に示され
た実施例においては、導体路２．３はそれぞれ対称軸線
２２に対して鏡面対称に形成された閉リングを構成して
いる。同様に、半導体基体６は導体路３上に対称軸線２
２に対して対称に分散されている。接続導体１１．１２
は対称軸線の両側に配置されている。短絡を回避するた
めに、接続導体１１は脚部１８．１９を有し、接続導体
１２は脚部２０．２１を存している。半導体基体６はゲ
ート接触７およびソース接触８が同様に対称軸線２２に
対して対称となるように導体路３上に配置されている。
【図面の簡単な説明】
第１図は本発明の第１の実施例を示す斜視図、第２図は
本発明の第２の実施例を示す平面図であ１・・・基板、
２〜５・・・導体路、６・・・半導体基体、７・・・ゲ
ート接触、８・・・ソース接触、９，１０．１３・・・
ボンディングワイヤ、１１．１２・・・接続導体、１４
．１５・・・接続面、１６・・・ソース補助端子、１７
・・・ゲート端子、１８〜２１・・・脚部、２２・・・
対称軸線。 ８１１８）代理人弁珪士冨村　謬）７：：７：どｒ′５
１玉： ０［？艮τ士

Claims (1)

  1. 【特許請求の範囲】 １）絶縁基板と、この絶縁基板上に配置されて電気的に
    互いに分離された少なくとも２つの導体路と、接触を有
    する少なくとも１つの半導体基体と、前記接触と導体路
    との間を接続する電気的接続部と、それぞれ１つが前記
    両導体路の１つに電気的に接続された接続導体とを備え
    た半導体装置において、前記接続導体（１１，１２）は
    接近して一緒にかつ少なくとも一部分が互いに平行に配
    置されることを特徴とする半導体装置。 ２）両導体路（２，３）は基板（１）の同一表面上に配
    置され、前記両導体路は互いに平行に位置し、接続導体
    は前記導体路の互いに隣接して平行に位置する部分に固
    定され、前記接続導体は基板表面上に直角に立設される
    ことを特徴とする特許請求の範囲第１項記載の半導体装
    置。 ３）第１導体路（２）と第２導体路（３）とはそれぞれ
    鏡面対称に形成され、半導体基体（６）は前記第２導体
    路（３）上に対称に分散して配置され、接続導体（１１
    ，１２）は対称軸線（２２）の両側で対応する導体路に
    接続されることを特徴とする特許請求の範囲第１項また
    は第２項記載の半導体装置。 ４）両接続導体間の空間には、比誘電率が１よりも大き
    い誘電体が充填されることを特徴とする特許請求の範囲
    第１項ないし第３項のいずれか１項に記載の半導体装置
    。 ５）両接続導体（１１，１２）間には絶縁シートが配置
    されることを特徴とする特許請求の範囲第４項記載の半
    導体装置。
JP63007389A 1987-01-21 1988-01-14 半導体装置 Expired - Lifetime JPH0680762B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE3701650.4 1987-01-21
DE3701650 1987-01-21

Publications (2)

Publication Number Publication Date
JPS63193553A true JPS63193553A (ja) 1988-08-10
JPH0680762B2 JPH0680762B2 (ja) 1994-10-12

Family

ID=6319219

Family Applications (1)

Application Number Title Priority Date Filing Date
JP63007389A Expired - Lifetime JPH0680762B2 (ja) 1987-01-21 1988-01-14 半導体装置

Country Status (4)

Country Link
US (1) US4907068A (ja)
EP (1) EP0277546B1 (ja)
JP (1) JPH0680762B2 (ja)
DE (1) DE3871968D1 (ja)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03292764A (ja) * 1990-04-11 1991-12-24 Okuma Mach Works Ltd インバータモジュール
US5185097A (en) * 1989-12-29 1993-02-09 Canon Kabushiki Kaisha Polymeric liquid-crystalline compound, liquid-crystal composition containing it, and liquid-crystal drive
JPH06291251A (ja) * 1993-04-06 1994-10-18 Sansha Electric Mfg Co Ltd 電力用半導体モジュール
JP2003046058A (ja) * 2001-07-30 2003-02-14 Mitsubishi Electric Corp 半導体装置
JP2005347561A (ja) * 2004-06-03 2005-12-15 Toshiba Corp パワー半導体モジュールおよび電力変換装置
JP2014011227A (ja) * 2012-06-28 2014-01-20 Sumitomo Electric Ind Ltd 半導体装置

Families Citing this family (57)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5210439A (en) * 1988-01-30 1993-05-11 Robert Bosch Gmbh Power transistor monolithic integrated structure
US5202578A (en) * 1989-09-11 1993-04-13 Kabushiki Kaisha Toshiba Module-type semiconductor device of high power capacity
JPH0671063B2 (ja) * 1989-09-11 1994-09-07 株式会社東芝 大電力半導体装置
FR2652983B1 (fr) * 1989-10-11 1993-04-30 Alsthom Gec Montage en cascade d'etages de transistors en parallele realise en circuit hybride.
DE3937045A1 (de) * 1989-11-07 1991-05-08 Abb Ixys Semiconductor Gmbh Leistungshalbleitermodul
JPH0724270B2 (ja) * 1989-12-14 1995-03-15 株式会社東芝 半導体装置及びその製造方法
US5731970A (en) * 1989-12-22 1998-03-24 Hitachi, Ltd. Power conversion device and semiconductor module suitable for use in the device
US5038197A (en) * 1990-06-26 1991-08-06 Harris Semiconductor Patents, Inc. Hermetically sealed die package with floating source
DE4105155C2 (de) * 1991-02-20 1994-07-07 Export Contor Ausenhandelsgese Stromrichterschaltungsanordnung
DE4108154A1 (de) * 1991-03-14 1992-09-17 Telefunken Electronic Gmbh Elektronische baugruppe und verfahren zur herstellung von elektronischen baugruppen
WO1992019013A1 (en) * 1991-04-16 1992-10-29 Arthur Iversen Power semiconductor packaging
USRE35807E (en) * 1991-04-16 1998-05-26 Iversen Arthur H Power semiconductor packaging
US5537074A (en) * 1993-08-24 1996-07-16 Iversen; Arthur H. Power semiconductor packaging
US5579217A (en) * 1991-07-10 1996-11-26 Kenetech Windpower, Inc. Laminated bus assembly and coupling apparatus for a high power electrical switching converter
US5172310A (en) * 1991-07-10 1992-12-15 U.S. Windpower, Inc. Low impedance bus for power electronics
JP2782647B2 (ja) * 1991-08-06 1998-08-06 富士電機株式会社 半導体装置
EP0533158B1 (en) * 1991-09-20 1998-07-08 Hitachi, Ltd. Three-phase three-level inverter device
JP2725952B2 (ja) * 1992-06-30 1998-03-11 三菱電機株式会社 半導体パワーモジュール
JP2725954B2 (ja) * 1992-07-21 1998-03-11 三菱電機株式会社 半導体装置およびその製造方法
JP3053298B2 (ja) * 1992-08-19 2000-06-19 株式会社東芝 半導体装置
EP0609432A4 (en) * 1992-08-24 1995-03-01 Arthur H Iversen MODULARIZATION OF POWER SEMICONDUCTORS.
DE59304797D1 (de) * 1992-08-26 1997-01-30 Eupec Gmbh & Co Kg Leistungshalbleiter-Modul
JPH06233554A (ja) * 1993-01-28 1994-08-19 Fuji Electric Co Ltd インバータ装置
US5498907A (en) * 1993-04-29 1996-03-12 Allied Signal Inc. Interconnection arrangement for power semiconductor switching devices
US5444295A (en) * 1993-09-07 1995-08-22 Delco Electronics Corp. Linear dual switch module
US5563447A (en) * 1993-09-07 1996-10-08 Delco Electronics Corp. High power semiconductor switch module
DE59407007D1 (de) * 1993-12-23 1998-11-05 Asea Brown Boveri Umrichteranordnung mit niederinduktivem Kommutierungskreis
US5523620A (en) * 1994-02-14 1996-06-04 Delco Electronics Corporation Coplanar linear dual switch module
US5539254A (en) * 1994-03-09 1996-07-23 Delco Electronics Corp. Substrate subassembly for a transistor switch module
DE9403108U1 (de) * 1994-02-24 1994-04-14 Siemens Ag Niederinduktive Hochstromverschienung für Stromrichtermodule
US5517059A (en) * 1994-04-26 1996-05-14 Delco Electronics Corp. Electron and laser beam welding apparatus
US5528073A (en) * 1994-07-05 1996-06-18 Allen-Bradley Company, Inc. Bus bar having reduced parasitic inductances and equal current path lengths
US5956231A (en) * 1994-10-07 1999-09-21 Hitachi, Ltd. Semiconductor device having power semiconductor elements
EP0830811B1 (en) * 1995-06-07 2000-02-02 SMITHS INDUSTRIES AEROSPACE & DEFENSE SYSTEMS INC. Heat sink with integrated bus bar
US6088227A (en) * 1995-06-07 2000-07-11 Smiths Industries Aerospace And Defense Systems, Inc. Heat sink with integrated buss bar
JP3480771B2 (ja) * 1995-12-20 2003-12-22 三菱電機株式会社 半導体装置
US6954368B1 (en) 1996-07-22 2005-10-11 HYDRO-QUéBEC Low stray interconnection inductance power converting molecule for converting a DC voltage into an AC voltage, and a method therefor
DE19732402B4 (de) * 1997-07-28 2004-07-15 Danfoss Drives A/S Elektrische Busanordnung zur Gleichstromversorgung von Schaltungselementen eines Wechselrichters
US5895974A (en) * 1998-04-06 1999-04-20 Delco Electronics Corp. Durable substrate subassembly for transistor switch module
US6127727A (en) * 1998-04-06 2000-10-03 Delco Electronics Corp. Semiconductor substrate subassembly with alignment and stress relief features
JP3508670B2 (ja) * 1999-02-05 2004-03-22 株式会社豊田自動織機 半導体モジュール
DE19942770A1 (de) 1999-09-08 2001-03-15 Ixys Semiconductor Gmbh Leistungshalbleiter-Modul
JP3633432B2 (ja) 2000-03-30 2005-03-30 株式会社日立製作所 半導体装置及び電力変換装置
JP3642012B2 (ja) 2000-07-21 2005-04-27 株式会社日立製作所 半導体装置，電力変換装置及び自動車
DE10037533C1 (de) * 2000-08-01 2002-01-31 Semikron Elektronik Gmbh Induktivitätsarme Schaltungsanordnung
DE10159851B4 (de) 2001-12-06 2006-05-24 Infineon Technologies Ag Halbleiterbauelementanordnung mit verminderter Oszillationsneigung
US6939743B2 (en) * 2002-01-29 2005-09-06 Advanced Power Technology, Inc. Split-gate power module and method for suppressing oscillation therein
DE10237561C1 (de) * 2002-08-16 2003-10-16 Semikron Elektronik Gmbh Induktivitätsarme Schaltungsanordnung bzw. Schaltungsaufbau für Leistungshalbleitermodule
DE10316136A1 (de) * 2003-04-09 2004-11-18 Ixys Semiconductor Gmbh Gekapselte Leistungshalbleiteranordnung
DE102004027185B4 (de) * 2004-06-03 2008-08-28 Infineon Technologies Ag Niederinduktives Halbleiterbauelement mit Halbbrückenkonfiguration
US7791208B2 (en) * 2007-09-27 2010-09-07 Infineon Technologies Ag Power semiconductor arrangement
US8405206B1 (en) * 2011-09-30 2013-03-26 Infineon Technologies Ag Low-inductive semiconductor module
DE102014111931B4 (de) * 2014-08-20 2021-07-08 Infineon Technologies Ag Niederinduktive Schaltungsanordnung mit Laststromsammelleiterbahn
DE102014219998B4 (de) * 2014-10-02 2020-09-24 Vitesco Technologies GmbH Leistungsmodul, Leistungsmodulgruppe, Leistungsendstufe sowie Antriebssystem mit einer Leistungsendstufe
US11837826B2 (en) * 2014-11-18 2023-12-05 Transportation Ip Holdings, Llc Bus bar and power electronic device with current shaping terminal connector and method of making a terminal connector
DE102015216083A1 (de) * 2015-08-24 2017-03-02 Siemens Aktiengesellschaft Modulanordnung zum induktivitätsarmen Betrieb eines Leistungshalbleitermoduls an einem Gleichspannungskreis
JP6838243B2 (ja) 2017-09-29 2021-03-03 日立Astemo株式会社 電力変換装置

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5797661A (en) * 1980-12-10 1982-06-17 Mitsubishi Electric Corp Semiconductor device
JPS5816632A (ja) * 1981-07-24 1983-01-31 Q P Corp 容器入り殺菌マツシユポテトの製造方法
JPS59177951A (ja) * 1983-03-29 1984-10-08 Toshiba Corp 半導体装置
JPS6393126A (ja) * 1986-10-08 1988-04-23 Fuji Electric Co Ltd 半導体装置
JPS6390850U (ja) * 1986-12-04 1988-06-13

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4213141A (en) * 1978-05-12 1980-07-15 Solid State Scientific Inc. Hybrid transistor
US4237522A (en) * 1979-06-29 1980-12-02 International Business Machines Corporation Chip package with high capacitance, stacked vlsi/power sheets extending through slots in substrate
US4328530A (en) * 1980-06-30 1982-05-04 International Business Machines Corporation Multiple layer, ceramic carrier for high switching speed VLSI chips
JPS58181968A (ja) * 1982-04-16 1983-10-24 国産金属工業株式会社 ドア錠のハンドル装置
JPS60239051A (ja) * 1984-05-11 1985-11-27 Mitsubishi Electric Corp 半導体装置
DE3538933A1 (de) * 1985-11-02 1987-05-14 Bbc Brown Boveri & Cie Leistungshalbleitermodul

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5797661A (en) * 1980-12-10 1982-06-17 Mitsubishi Electric Corp Semiconductor device
JPS5816632A (ja) * 1981-07-24 1983-01-31 Q P Corp 容器入り殺菌マツシユポテトの製造方法
JPS59177951A (ja) * 1983-03-29 1984-10-08 Toshiba Corp 半導体装置
JPS6393126A (ja) * 1986-10-08 1988-04-23 Fuji Electric Co Ltd 半導体装置
JPS6390850U (ja) * 1986-12-04 1988-06-13

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5185097A (en) * 1989-12-29 1993-02-09 Canon Kabushiki Kaisha Polymeric liquid-crystalline compound, liquid-crystal composition containing it, and liquid-crystal drive
JPH03292764A (ja) * 1990-04-11 1991-12-24 Okuma Mach Works Ltd インバータモジュール
JPH06291251A (ja) * 1993-04-06 1994-10-18 Sansha Electric Mfg Co Ltd 電力用半導体モジュール
JP2003046058A (ja) * 2001-07-30 2003-02-14 Mitsubishi Electric Corp 半導体装置
JP4601874B2 (ja) * 2001-07-30 2010-12-22 三菱電機株式会社 半導体装置
JP2005347561A (ja) * 2004-06-03 2005-12-15 Toshiba Corp パワー半導体モジュールおよび電力変換装置
JP2014011227A (ja) * 2012-06-28 2014-01-20 Sumitomo Electric Ind Ltd 半導体装置

Also Published As

Publication number Publication date
EP0277546B1 (de) 1992-06-17
DE3871968D1 (de) 1992-07-23
US4907068A (en) 1990-03-06
JPH0680762B2 (ja) 1994-10-12
EP0277546A1 (de) 1988-08-10

Similar Documents

Publication Publication Date Title
JPS63193553A (ja) 半導体装置
JP3268081B2 (ja) 電力用半導体モジュール
US4042952A (en) R. F. power transistor device with controlled common lead inductance
US7821128B2 (en) Power semiconductor device having lines within a housing
KR930020666A (ko) 수직형 집적 반도체 구조체
JPS58182308A (ja) 高周波回路
JPH0365016B2 (ja)
US6885097B2 (en) Semiconductor device
JPH088269B2 (ja) 半導体デバイス
KR100679910B1 (ko) 반도체 장치 및 그의 제조 방법
CN112951605B (zh) 具有低电感连接特征的电容器和电子模块组件
US5617293A (en) Bridge module
US6822399B2 (en) Half-bridge circuit
JP3629172B2 (ja) 圧接型半導体装置
US6664629B2 (en) Semiconductor device
US10790249B2 (en) Discrete electronic component comprising a transistor
US6776663B2 (en) Electronic component with isolation barriers between the terminal pins
JPH05218252A (ja) 半導体装置
US5060048A (en) Semiconductor component having at least one power mosfet
US5929520A (en) Circuit with small package for mosfets
US10930606B2 (en) Electronic device comprising a discrete transistor assembled on a printed circuit board
JP3449217B2 (ja) 半導体モジュール
US20230178462A1 (en) Package for a lateral power transistor
GB2268332A (en) Power transistor with reduced gate resistance and inductance
US20120074506A1 (en) Semiconductor Package for Higher Power Transistors

Legal Events

Date Code Title Description
R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20081012

Year of fee payment: 14

EXPY Cancellation because of completion of term
FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20081012

Year of fee payment: 14