WO1992019013A1

WO1992019013A1 - Power semiconductor packaging

Info

Publication number: WO1992019013A1
Application number: PCT/US1992/003164
Authority: WO
Inventors: Arthur Iversen; George Gabor
Original assignee: Arthur Iversen
Priority date: 1991-04-16
Filing date: 1992-04-15
Publication date: 1992-10-29

Abstract

An electrical converter (10) including respective positively and negatively biased, generally cylindrical collective electrodes (12, 14), an output electrode (15, 16, 17) electrically isolated therefrom, and at least one power semi-conductor device (24) being mechanically and electrically attached to a flat portion (46, 47, 49, 51, 53, 55) on each of said positively and negatively biased collective electrodes (12, 14). A drive circuit (26) is configured to alternately activate the devices mounted on the positively biased electrode while turning off the devices mounted on the negatively biased electrode, then reversing the process to generate an alternating current to the output electrode (15, 16, 17). To enhance the rate of removal of thermal energy from the devices, each of the positively and negatively biased electrodes (12, 14) includes an internal coolant conduit (32) with concavely curved surfaces (37) in close proximity to the flats upon which the devices are mounted, the conduit (32) having a width (162) at least as great as that of the devices.

Description

POWER SEMICONDUCTOR PACKAGING

Technical Field The present invention relates to the packaging of power semiconductors and particularly packages capable of high frequency operation, high power density construction, and high heat flux thermal management.

Background Art

Power semiconductors such as, e.g., Power MOSFETs, MOS controlled thyristors, MCTs, IGBTs, bi-polar power devices, SCRs, thyristors, diodes, etc., are commonly used in a variety of converters (e.g., AC-AC, DC-DC, AC-DC and DC-AC) and power amplifiers. DC-AC converters (inverters) are often used, for example, in motor drives, R.F. generators (induction heating), and in pulse width modulation

(PWM) power supplies.

In general, the power rating of power semiconductors are limited by thermal considerations.

As the power rating of the semiconductors are increased, larger assemblies are required, with consequent lower power densities, reduced efficiency, and compromised frequency response. The need exists for packaging and thermal management designs that are characterized by compactness, high efficiency and low cost.

Summary of the Invention The present invention provides for the efficient high heat flux cooling of power semiconductors. The present invention also provides for the design of a compact, high power density package for power semiconductors.

The present invention further provides for a symmetrical power semiconductor package design with high frequency characteristics.

The present invention also provides for a power semiconductor package that is low cost. BRIEF DESCRIPTION OF THE DRAWINGS

A preferred exemplary embodiment of the present invention will hereinafter be described in conjunction with the appended drawings, wherein like designations denote like elements and:

Fig. 1 is a schematic cross-section view of a three phase inverter employing the present invention. Fig. 2 is a schematic top view of the inverter of Figure 1. Fig. 3 illustrates cross-sections of various geometries that may be employed as extended surfaces on heat exchange surfaces.

Fig. 4 is a schematic cross-section view of a three phase inverter with a separate assembly for each phase.

Fig. 5 is a schematic cross-section view of a compact high voltage assembly with integral insulator construction.

Fig. 6 is a partial schematic front view of the assembly of Fig. 15 illustrating device mounting and electrical interconnection between stages.

Fig. 7 is a schematic cross-section view of the assembly of Fig. 15 illustrating coolant conduit construction and the partially encompassing drive line. DETAILED DESCRIPTION OF A PREFERRED EXEMPLARY EMBODIMENT

Referring now to Figures 1 and 2, a preferred embodiment of the present invention is described in the context of a symmetric three phase inverter 10, as might be used in a motor drive. Inventer 10 includes: respective collective electrodes 12 and 14, e.g., positive collective drain 12 and negative collective

5 drain 14; a respective output electrode for each of the three output phases, e.g., a phase 1 source 15, a phase 2 source 16, and a phase 3 source 17; respective positive 18 and negative 20 drain electrical insulators; respective power devices 24 such as, e.g., power MOSFETs (at least one positive and one negative device for each phase); a respective positive and negative driver chip 26 for each phase; and respective positive (28, 29 and 30) and negative (31, 33 and 35) drive lines for each phase. Driver chips

10 26 are interconnected with power devices 24 by respective gate leads 40. Power devices 24 are, in turn, connected to respective sources 15, 16, and 17 by source leads 42. Drains and sources are made of metals with suitable electrical, mechanical and thermal characteristics, such as Copper, Tungsten,

Molybdenum, Beryllium, and dispersion hardened coppers including Cu-Cr.

Drains 12 and 14 are generally cylindrical, but preferably manifest a peripheral surface 44 5 including respective flats 46, 47, 49, 51, 53 and 55 of predetermined height 39 (Figure 1) and width 48

(Figure 2). The flats facilitate mounting of power devices 24. The number of flats employed is determined by drain dimensions, device dimensions, required performance, etc., and may comprise more or less flats than illustrated in the example. In general, flat width 48 is at least that of one device 24, and preferably large enough to accommodate multiple devices; flat height 39 is equal to the full extent of the 0 drain. Drains 12 and 14 are each provided with peripheral circumferential coolant conduit 32 having a heat exchange surface 37. As best seen in Figure 2, coolant conduit 32 is connected to a coolant input fitting 56 and coolant discharge fitting 58. Coolant conduit 32 is symmetrical about a centerline, and is less than 360° around. A circular construction is illustrated, however different shapes, e.g. elliptical, may be employed, generally conforming to the active portion of peripheral surface 44. Conduit 32 is suitably 5 of a predetermined width 162 (anally relative to the drain) and height 166 (radially relative to the drain) .

Sources 15, 16 and 17, are suitably each in the form of flat conductive plates 91, 93 and 95 extending radially outward beyond peripheral surface 44 of drains 12 and 14, and include an extension

21 or 23, of predetermined geometry to facilitate interconnection to power devices 24, extending axially from plate 91 at a juncture 117 to a tip 115. Plates 91 are electrically isolated from drains 12 and 14 by, 0 e.g., insulators 18 and 20 interposed between plate 91 and drain 12 and 14 respectively. As best seen in

Figure 2, each plate 91, 93, 95 is disposed centered upon a juncture 11 between respective flats, and underlies the majority of those flats, while maintaining a minimum physical separation 89 to ensure electrical isolation between output electrodes.

To facilitate manufacture, each source 15, 16 and 17 may be formed of an upper plate attached 5 to positive drain insulator 18, and a lower plate attached to negative drain insulator 20. In this manner, the positive and negative drain sub-assemblies may be independently manufactured and tested and then joined together with each set of upper and lower source plates electrically in common upon assembly.

The positive and negative sub-assemblies may be identical and interchangeable to reduce manufacturing costs. Preferably, all drains are of the same size and geometry, and if only one size power device 24 is employed, preferably the same number of devices are mounted on each drain.

Each output phase has associated therewith a positive driver device 26; a negative driver device 26; a positive set of power devices 24, electrically interconnected to operate in parallel; a respective parallel set of power devices 24; an output electrode (e.g., one of source electrodes 15, 16 or 17); and if desired one or more snubber resistors 54. Plate 91 of the source electrode for an output phase defines a portion of peripheral surface 44 of each of drains 12 and 14 associated with that phase. Power devices 24 associated with the phase are mounted on that portion of peripheral surface 44, in thermal communication with the composite drain and with the drain pod of each individual device electrically connected to the composite drain. In the embodiment of Figures 1 and 2, sets of two flats are associated with each phase and the power device 24 associated with the phase are mounted on those flats; flats 46 and 47 with phase 1; flats 49 and 51 with phase 2; and flats 53 and 55 with phase 3. The respective individual positive power devices 24 associated with a particular phase are mounted on positive collective drain 12 and operate in parallel, electrically connected to an associated positive driver chip 26 and to the associated source electrode. The positive driver chip 26 is suitably mounted, on an interposed insulation pad 27 mounted on the outer surface 12A of composite drain 12 disposed proximate peripheral surface 44 towards the center of the area defined by plate 91. The negative power devices 24 associated with the phase are similarly mounted on corresponding faces on negative composite drain 14, and similarly connected to a negative driver chip 26 disposed on the outer surface 14A of negative drain 14. Control signals are applied to the positive driver chips 26 through control lines 28, 29 and 30, and to negative driver chips 26 through control lines 31, 33 and 35.

Conduit 32 provides for cooling of power devices 24, to enable high power, high frequency operation. Referring again to Figure 2, coolant input fitting 56 is supplied coolant 50 from a closed or open loop heat exchange system (not shown). Because the drains 12 and 14 are biased positive and negative, the coolant used in conduit 32 is preferably a dielectric, such as a fluorocarbon. This tends to eliminate coolant electrical conductivity related problems such as the need to electrically isolate the coolant to the positive (12) and negative (14) drains, and electrolysis problems.

Referring to Figure 1, conduit width 162 is generally at least equal to the length of the column 164 of devices 24 on flats 46, 47, 49, 51, 53 and 55. Conduit height 166 is determined by the peak heat flux that must be removed from heat exchange surface 37, i.e., the coolant velocity and the desired coolant bulk temperature rise, i.e., volume flow rate. Conduit height 166 generally ranges from 0.2 mm to 6 mm. The length of a row 170 (Figure 2) of devices 24 on a particular flat is determined by the width 48 of the flat.

Cooling of power devices 24 is accomplished by the flow of coolant 50 in conduit 32. Heat generated in driver chips 26 or snubber resistors 54 may be conductively transmitted through insulators 27, then through drains 12, 14 to coolant conduit 32. Conduit 32 is curved {e.g. circular); the flow of coolant 50 generates a centrifugal force proportional to v /τ against the heat exchange surface 37, where v is the velocity of coolant 50 and r is the radius of curvature 168 of the peripheral surface 37 of conduit 32 opposing devices 24. The centrifugal force generated accelerates removal of nucleate bubbles from heat exchange surface 37 thereby significantly enhancing heat transfer.

To further enhance heat transfer, extended surfaces may be employed on heat exchange surface 37 of conduit 32. Extended surface cross-sections (Figure 3) may be, for example, rectangular 76, triangular 78, right angle triangles 80, curved 82 or some combination of the foregoing. For purposes of illustration, triangular 78 extended heat exchange surfaces are shown in Figure 1. Extended surface 76, 78, 80 and 82 have heights 77 ranging from 0.2 mm to 3 mm and pitches 79 ranging from 0.5 mm to 5 mm.

Referring again to Figures 1 and 2, the operation of the three phase inverter involves the proper switching sequence of devices 24 associated with each source (output phase) 15, 16 and 17. The positively and negatively biased devices 24 on drains 12 and 14, respectively, for each of phases 15, 16, and 17, are alternately turned on and off thereby generating the AC output for each phase, with each of the output phases 15, 16, and 17 being 120° apart from each other in phase. The symmetrical, e.g. circular, construction of inverter 10 (Figure 2) lends itself to co-axial construction and shielding which is highly desirable for hi h frequency operation and for shielding purposes, i.e. RFI and EMI.

If single phase use is desired, sources 15, 16 and 17 of Figures 1 and 2 are combined as a single, preferably continuous, conductor and all positive drive chips 26 on drain 12 act in unison, and in like manner, all negative drive chips 26 on drain 14 act in unison. The positive and negative drive chips 26 are alternately turned on and off to generate the positive and negative components of the single phase output wave form. Alternatively, a single driver chip 26 of suitable capacity may be used to drive the gates of all devices 24 mounted on positive drain 12. In like manner, a single driver chip 26 may be used to drive the gates of all devices 24 mounted on negative drain 14. For a polyphase system, as in the three phase system, isolated and independent sources and gate drive chips corresponding to the number of required phases are employed. Poly (eg., three) phase inverters may also be implemented using a plurality (e.g., three) of the above described single phase inverters. Referring to Figure 4, separate single phase inverters 700A, 700B and 700C are employed. Output signals 120° apart in phase, are provided at output electrodes 715, 716, and 717. This construction has the advantage of simplifying the series connection of multiple stages (e.g. , 14, 86; 12, 84) to increase the output voltage, or to provide better protection against incoming voltage spikes or other potentially destructive voltage surges. Each source 715, 716 and 717 and associated drains 12, 14, 84 and 86 are shown as independent assemblies connected in series. Construction of the individual drain stages may be similar to that described in conjunction with Figures 1 and 2, with a unitary output electrode. On inverter 700A source lead 42 of devices 24 mounted on negative drain 86 is connected in series to negative drain 14. The source lead 42 of devices 24 on drain 14 are, in turn, connected to output electrode 715. In like manner, source lead 42 of devices 24 mounted on positive drain 84 are connected in series to positive drain 12. The source leads 42 of devices 24 mounted on positive drab 12, in turn, are likewise connected to output source 715. Positive driver chips 26 on drains 12 and 84 and negative driver chips 26 on drains 14 and 86 alternately turn on and off devices 24 mounted respectively on positive and negative drains. Inverters 700B and 700C are similarly constructed. The switching of gate drivers 26 is timed to provided the desired three phase output. Any number of drain stages may be connected in series to obtain a desired voltage output. Construction may be similar to that used in Figures 1 and 2. This type of design is best suited to very large motors, e.g. 500 HP (375 kW) where higher voltages and very high currents are required. 5 The foregoing described single phase and three phase DC to AC inverters may also be employed as AC to DC converters. The voltage connections, e.g., AC, DC or polarity, to drains 12 and 14, and to devices 24 and 26 may vary depending on the configuration employed, e.g., DC-DC, AC-AC, DC-AC, AC-DC converters, or amplifiers of the class A, AB, B, C or D type. Instead of employing diodes as a conventional rectifier, devices such as MOSFETs, MCTs, IGBTs etc. may be employed in a synchronized

10 rectifier configuration. Use of an FET eliminates forward (diode) voltage drop of about 0.8 to 1.2 volt. By using a majority carrier device, i.e. an FET, the fast switching characteristics at zero crossover minimizes losses and can reduce converter losses by 20% to 50%. DC to DC and AC to AC converters may be constructed by proper combination of the AC to DC and DC to AC converters.

Drain assemblies may also be stacked one upon the other, separated by insulated plates. In such

15 instances, the driver devices would be mounted on the peripheral surface of the drain stage. Referring to Figures 5, 6 and 7, a compact stacked high voltage assembly comprises a plurality of stacked drains 146 separated by insulators 148. Drains 146 are provided with conduits 32 which extend the height of drains 146 and a peripheral surface 44 manifesting flats 46, 47, 49, 51, 53 and 55 (Figure 7) similar to those shown in Figure 2. Referring again to Figure 5, insulators 148 are thin, e.g. 1-4 mm, but sufficient

20 to withstand the interstage voltages, up to 5 KV, between drains. Insulators 148 are joined to the mating surfaces 150 of drains 146. The portion 152 of surface 150 radially outward of conduit 32 are joined in a leak tight manner so as to prevent loss of coolant to the external environment. The portion of mating surfaces 150 radially inward of conduit 32 need only maintain internal coolant leakage, e.g., between input 56 and discharge 58 conduits, within acceptable limits, for example a few percent. Stacked drains 146

25 are fed coolant 50 in parallel (Figure 5) from common input 56 and discharge 58 coolant conduits (Figure 7) in a preferably closed loop heat exchange system.

With particular reference to Figure 6, each drain 146 includes a single row of devices 24 mounted on flats 46, 47, 49, 51, 53 and 55 partially girdling (Figure 7) peripheral surface 44 of drains 146. A predetermined number (e.g., three) of devices 24 are mounted on each flat. For large devices, about

30 1 cm on side or greater, one device is preferably mounted on each flat. With smaller devices, multiple devices may be mounted on each flat. Driver chips 26 are mounted on insulators 27 on a flat and are supplied a drive signal through external lines 117. The driver chip 26 on each ascending drain 146 is voltage biased at sequentially increasing voltages (or decreasing for positive ground use). Gate lead 40 interconnects drive chip 26 to gate line 41. One gate line 41 substantially girdles the peripheral surface

35 44 of each of drains 146 and is electrically connected to devices 24 by lead 114 (Figure 7). Thus, all devices 24 on each drain 146 are simultaneously driven by the driver chip 26 mounted on that drain. To provide the desired voltage increase, source leads 42 from devices 24 are attached to the drain 146 of the next higher voltage stage (Figure 6). The process is repeated until the high voltage output 94 is reached (Figures 5 and 6). It will be understood that the above description is of preferred exemplary embodiments of the present invention, and the invention is not limited to the specific form shown. The basic construction technique and components described in connection with the preferred embodiments may be employed in substantially all converters, inverters and power amplifiers using linear or switching techniques, and in connection with any semiconductor power device, a principal variant being the number of control electrodes. For example, the invention is described in the context of a three phase invertor. However, the invention ma be employed in conjunction with any type of device employing power semiconductors, such as, for example, various other types of converters and power amplifiers, particularly amplifiers operating in any of the classes of operation, e.g., A, AB, B, C, or D. Likewise, while the invention is described in the context of a device employing MOSFETs and in terms peculiar to MOSFETs, other devices, such as MOS controlled thyristers (MCTs), SCRs, bipolar devices, and the like, may also be employed. The drain source and gate terminology employed in describing the preferred embodiment is not intended to be limiting; cathode, anode and gate terminology may aptly be applied to the components referred to as drain source and gate in the context of MOSFETs, when MCTs or SCRs are employed. The compact geometry of the invention may be used to advantage to increase efficiencies at high frequency of MOSFETs, BiPolar or any device capable of high frequency operation. Further, although the embodiment of Figures 1 and 2 employ two flats in association with each output phase, one flat, or a multiplicity of flats may be employed in association with each phase.

Claims

1. An electrical converter comprising; a first collective electrode of generally cylindrical construction adapted to be positively biased; a second collective electrode of generally cylindrical construction adapted to be negatively biased; means for electrically insulating said first and second electrodes; output electrode electrically isolated from said first and second electrodes; said first and second biased electrodes having multiple sequential flats formed on the peripheral surfaces thereof; a plurality of power semiconductor devices, at least one of said power semiconductor devices being mechanically and electrically attached to each of said flats; means for communicating signals from said power semiconductor devices to said output electrode; drive means cooperating with said power semiconductors to alternately activate those semiconductor power devices mounted on the first electrode and turn off those devices on the second electrode, then reversing the process, to generate a resulting alternating current to said output electrode; each of said first and second electrodes having an internal coolant conduit with concavely curved surfaces in close proximity to said peripheral fiats opposing said power semiconductor said conduit having a width at least as great as that of said semi¬ conductor devices mounted on said opposing external flat surface, and a height of between 0.2 mm and 6 mm; and means external to said first and second electrodes for providing a forced flow of coolant through said coolant conduits.

2. The converter of Claim 1 adapted for use as a poly-phase DC-AC inverter, wherein: said output electrode comprises a plurality of portions, electrically isolated from each other, at least one output electrode portion corresponding to each phase; said means for communicating signals from said power devices comprises means, for each said output electrode portion, for communicating signals from a respective associates set of said power devices on said first collective electrode and a corresponding associated set of said power devices on said second collective electrode to said output electrode portion; and said drive means comprises means for selectively actuating said respective sets of power devices.

3. The converter of Claim 1 wherein said drive means includes at least two semiconductor drive devices, one each mounted on and electrically isolated from said first and second collective electrodes.

4. The converter of Claim 2 wherein said drive means comprises at least six semiconductor drive devices, three each mounted on and electrically isolated from said first and second collective electrodes, one each of said semiconductor drive devices on said first and second collective electrodes driving on associated set of power devices.

5. A high voltage stack for generating a desired output voltage comprising: a plurality of electrodes, each of said electrodes being of generally circular symmetry with a plurality of flats formed on the periphery thereof and an internal coolant conduit formed therein; at least one power device mounted and electrically connected to said conduit being disposed in close proximity to said flats, and including a heat exchange surface concavely curved where opposed by a power device, said conduit having a width at least as great as the corresponding dimension of said semiconductor devices mounted on said opposing external flats, and a height between 0.2 mm and 6 mm; means, external to said electrodes, for providing a forced flow of coolant through said coolant conduits; means for electrically isolating said electrode from the other; means for coupling the output of the devices mounted on each electrode to the next successive electrode in the stack; means for busing each successive electrode at successively a higher voltage with each voltage increment being within the operating characteristics of said power devices; the number of electrodes being such that the product of the number electrodes and the voltage increment between electrodes provides the desired output voltage; and means for selectively actuating said power devices.

6. The converter or Claim 1, wherein said heat exchange surface is prepared with at least one of extended surface geometries whose cross-section is rectangular, triangular, right triangular, concave curved, and combined concave curved and linear, said surface extensions having a height from said heat exchange surface ranging from 0.3 mm to 3 mm and a pitch ranging from 0.5 mm to 5 mm.

7. The stack of Claim 11, wherein said electrodes each have mounted on said flats at least one drive semiconductor device, said drive device having its output connected to a drive line mounted on the peripheral surface of said electrode, said drive line at least partially girding said electrode, said drive line being interconnected to said power devices whereby all devices on all electrodes may be switched in a substantially simultaneous manner.

8. The stack of Claim 11, wherein said power devices mounted on each flat in a single row girdling each of said electrodes.

9. The stack of Claim 11, wherein: said means for coupling the output of the power devices of one electrode to the next successive electrode comprises lead bond wires of predetermined width, and said means for isolating comprises insulating members disposed between electrodes extending radially beyond said electrodes and provided with slots having a width slightly greater than the lead bond wire; said lead bond wires being fitted into said slots.

10. A three phase DC-AC inverter comprising first, second and third phase structures, electrically isolated from each other, each said structure comprising: a positively biased electrode of generally cylindrical construction; a negatively biased electrode of generally cylindrical construction; an electrical insulator disposed between said positive and negative electrodes; an output electrode separate from and electrically isolated from said positively and negatively biased electrodes; said positively and negatively biased electrodes having multiple sequential flats prepared on the peripheral surfaces thereof, and each of said flat surfaces having at least one power semiconductor device mechanically and electrically attached thereto; at least two semiconductor drive devices, one each mounted on said positively and negatively biased electrodes, said drive devices connected to said power semiconductors to alternately turn on, first those devices mounted on the positive electrode while those devices on the negative electrode are turned off and then reversing the process, the resulting alternating current signal then being alternately transmitted by electrical interconnects to said output electrode by the devices on said positively and negatively biased electrodes; said drive semiconductor devices for each of the phases structures being switched at phase of 120° apart; said biased electrodes each having an internal coolant conduit with heat exchange surfaces in close proximity to said flat surfaces, concavely curved opposing said power semiconductor, the conduit length being at least as great as that of said semiconductor devices mounted on said opposing external flat surface, and the width of said conduit being between 0.2 mm and 6 mm; and means external to said electrodes for forcing a flow of coolant through said coolant conduits.

11. The inverter of Claim 10, wherein each said phase structure further comprises at least one additional positively biased electrode electrically and mechanically connected to said positively biased electrode and at least one additional negatively biased electrode electrically and mechanically connected to said negatively biased electrode, the outputs of the power devices of said additional electrodes bemg connected to the adjacent electrode thereby at least doubling the voltage rating of said inverter.

12. The converter of Claim 1, wherein said electrodes are formed from at least one of the metals including Copper, Tungsten, Molybdenum, Beryllium, and dispersion hardened coppers including Cu-Cr.