JPS60231355A - 相補型半導体集積回路 - Google Patents

相補型半導体集積回路

Info

Publication number
JPS60231355A
JPS60231355A JP59086829A JP8682984A JPS60231355A JP S60231355 A JPS60231355 A JP S60231355A JP 59086829 A JP59086829 A JP 59086829A JP 8682984 A JP8682984 A JP 8682984A JP S60231355 A JPS60231355 A JP S60231355A
Authority
JP
Japan
Prior art keywords
power supply
voltage
semiconductor integrated
integrated circuit
peripheral
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP59086829A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0144022B2 (enExample
Inventor
Tatsuo Yamada
山田 達雄
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP59086829A priority Critical patent/JPS60231355A/ja
Publication of JPS60231355A publication Critical patent/JPS60231355A/ja
Publication of JPH0144022B2 publication Critical patent/JPH0144022B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/82Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
    • H10D84/83Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
    • H10D84/85Complementary IGFETs, e.g. CMOS
    • H10D84/854Complementary IGFETs, e.g. CMOS comprising arrangements for preventing bipolar actions between the different IGFET regions, e.g. arrangements for latchup prevention
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D89/00Aspects of integrated devices not covered by groups H10D84/00 - H10D88/00
    • H10D89/60Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD]
    • H10D89/601Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD] for devices having insulated gate electrodes, e.g. for IGFETs or IGBTs
    • H10D89/811Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD] for devices having insulated gate electrodes, e.g. for IGFETs or IGBTs using FETs as protective elements

Landscapes

  • Semiconductor Integrated Circuits (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
JP59086829A 1984-04-27 1984-04-27 相補型半導体集積回路 Granted JPS60231355A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59086829A JPS60231355A (ja) 1984-04-27 1984-04-27 相補型半導体集積回路

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59086829A JPS60231355A (ja) 1984-04-27 1984-04-27 相補型半導体集積回路

Publications (2)

Publication Number Publication Date
JPS60231355A true JPS60231355A (ja) 1985-11-16
JPH0144022B2 JPH0144022B2 (enExample) 1989-09-25

Family

ID=13897698

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59086829A Granted JPS60231355A (ja) 1984-04-27 1984-04-27 相補型半導体集積回路

Country Status (1)

Country Link
JP (1) JPS60231355A (enExample)

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01223761A (ja) * 1988-03-02 1989-09-06 Fujitsu Ltd 半導体記憶装置
US4871927A (en) * 1987-03-03 1989-10-03 Sgs-Thomson Microelectronics S.P.A. Latch-up prevention in a two-power-supply CMOS integrated circuit by means of a single integrated MOS transistor
JPH01169049U (enExample) * 1988-05-18 1989-11-29
JPH02158165A (ja) * 1988-12-12 1990-06-18 Hitachi Ltd 一体形複数信号処理回路
US5717359A (en) * 1995-04-14 1998-02-10 Mitsubishi Denki Kabushiki Kaisha Semiconductor integrated circuit having elongated fixed potential lines to reduce noise on the lines
US6507067B1 (en) * 1995-08-02 2003-01-14 Stmicroelectronics S.R.L. Flash EEPROM with integrated device for limiting the erase source voltage
JP2006510203A (ja) * 2002-12-12 2006-03-23 コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ ワンタイム・プログラマブル・メモリ・デバイス

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4871927A (en) * 1987-03-03 1989-10-03 Sgs-Thomson Microelectronics S.P.A. Latch-up prevention in a two-power-supply CMOS integrated circuit by means of a single integrated MOS transistor
JPH01223761A (ja) * 1988-03-02 1989-09-06 Fujitsu Ltd 半導体記憶装置
JPH01169049U (enExample) * 1988-05-18 1989-11-29
JPH02158165A (ja) * 1988-12-12 1990-06-18 Hitachi Ltd 一体形複数信号処理回路
US5717359A (en) * 1995-04-14 1998-02-10 Mitsubishi Denki Kabushiki Kaisha Semiconductor integrated circuit having elongated fixed potential lines to reduce noise on the lines
US6507067B1 (en) * 1995-08-02 2003-01-14 Stmicroelectronics S.R.L. Flash EEPROM with integrated device for limiting the erase source voltage
JP2006510203A (ja) * 2002-12-12 2006-03-23 コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ ワンタイム・プログラマブル・メモリ・デバイス
JP4787500B2 (ja) * 2002-12-12 2011-10-05 エヌエックスピー ビー ヴィ ワンタイム・プログラマブル・メモリ・デバイス

Also Published As

Publication number Publication date
JPH0144022B2 (enExample) 1989-09-25

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Legal Events

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EXPY Cancellation because of completion of term