JPH0144022B2 - - Google Patents

Info

Publication number
JPH0144022B2
JPH0144022B2 JP59086829A JP8682984A JPH0144022B2 JP H0144022 B2 JPH0144022 B2 JP H0144022B2 JP 59086829 A JP59086829 A JP 59086829A JP 8682984 A JP8682984 A JP 8682984A JP H0144022 B2 JPH0144022 B2 JP H0144022B2
Authority
JP
Japan
Prior art keywords
power supply
voltage
supply line
internal
semiconductor integrated
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP59086829A
Other languages
English (en)
Japanese (ja)
Other versions
JPS60231355A (ja
Inventor
Tatsuo Yamada
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP59086829A priority Critical patent/JPS60231355A/ja
Publication of JPS60231355A publication Critical patent/JPS60231355A/ja
Publication of JPH0144022B2 publication Critical patent/JPH0144022B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
    • H10D84/83—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
    • H10D84/85—Complementary IGFETs, e.g. CMOS
    • H10D84/854—Complementary IGFETs, e.g. CMOS comprising arrangements for preventing bipolar actions between the different IGFET regions, e.g. arrangements for latchup prevention
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D89/00—Aspects of integrated devices not covered by groups H10D84/00 - H10D88/00
    • H10D89/60—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD]
    • H10D89/601—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD] for devices having insulated gate electrodes, e.g. for IGFETs or IGBTs
    • H10D89/811—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD] for devices having insulated gate electrodes, e.g. for IGFETs or IGBTs using FETs as protective elements

Landscapes

  • Semiconductor Integrated Circuits (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
JP59086829A 1984-04-27 1984-04-27 相補型半導体集積回路 Granted JPS60231355A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59086829A JPS60231355A (ja) 1984-04-27 1984-04-27 相補型半導体集積回路

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59086829A JPS60231355A (ja) 1984-04-27 1984-04-27 相補型半導体集積回路

Publications (2)

Publication Number Publication Date
JPS60231355A JPS60231355A (ja) 1985-11-16
JPH0144022B2 true JPH0144022B2 (enExample) 1989-09-25

Family

ID=13897698

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59086829A Granted JPS60231355A (ja) 1984-04-27 1984-04-27 相補型半導体集積回路

Country Status (1)

Country Link
JP (1) JPS60231355A (enExample)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
IT1217104B (it) * 1987-03-03 1990-03-14 Sgs Microelettronica Spa Circuito integrato cmos a due alimentazioni con un transistore mos integrato di protezione contro il <<latch-up>>.
JP2615767B2 (ja) * 1988-03-02 1997-06-04 富士通株式会社 半導体記憶装置
JPH01169049U (enExample) * 1988-05-18 1989-11-29
JP2608944B2 (ja) * 1988-12-12 1997-05-14 株式会社日立製作所 一体形複数信号処理回路
JPH08288462A (ja) * 1995-04-14 1996-11-01 Mitsubishi Electric Corp 半導体集積回路装置
EP0758129B1 (en) * 1995-08-02 2001-05-23 STMicroelectronics S.r.l. Flash EEPROM with integrated device for limiting the erase source voltage
CN100483553C (zh) * 2002-12-12 2009-04-29 Nxp股份有限公司 一次可编程存储器件

Also Published As

Publication number Publication date
JPS60231355A (ja) 1985-11-16

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Legal Events

Date Code Title Description
EXPY Cancellation because of completion of term