JPS6020908B2 - Mos二重多結晶集積回路の製造方法 - Google Patents
Mos二重多結晶集積回路の製造方法Info
- Publication number
- JPS6020908B2 JPS6020908B2 JP51113550A JP11355076A JPS6020908B2 JP S6020908 B2 JPS6020908 B2 JP S6020908B2 JP 51113550 A JP51113550 A JP 51113550A JP 11355076 A JP11355076 A JP 11355076A JP S6020908 B2 JPS6020908 B2 JP S6020908B2
- Authority
- JP
- Japan
- Prior art keywords
- silicon layer
- layer
- gate
- silicon
- substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/01—Manufacture or treatment
- H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
- H10D30/0411—Manufacture or treatment of FETs having insulated gates [IGFET] of FETs having floating gates
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/68—Floating-gate IGFETs
- H10D30/681—Floating-gate IGFETs having only two programming levels
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/01—Manufacture or treatment
- H10D64/031—Manufacture or treatment of data-storage electrodes
- H10D64/035—Manufacture or treatment of data-storage electrodes comprising conductor-insulator-conductor-insulator-semiconductor structures
-
- H10P50/263—
Landscapes
- Non-Volatile Memory (AREA)
- Semiconductor Memories (AREA)
- Weting (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US62685975A | 1975-10-29 | 1975-10-29 | |
| US626859 | 2000-07-27 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5259585A JPS5259585A (en) | 1977-05-17 |
| JPS6020908B2 true JPS6020908B2 (ja) | 1985-05-24 |
Family
ID=24512170
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP51113550A Expired JPS6020908B2 (ja) | 1975-10-29 | 1976-09-21 | Mos二重多結晶集積回路の製造方法 |
Country Status (4)
| Country | Link |
|---|---|
| JP (1) | JPS6020908B2 (OSRAM) |
| DE (1) | DE2645014C3 (OSRAM) |
| FR (1) | FR2330146A1 (OSRAM) |
| GB (1) | GB1540450A (OSRAM) |
Families Citing this family (14)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| IT1089299B (it) | 1977-01-26 | 1985-06-18 | Mostek Corp | Procedimento per fabbricare un dispositivo semiconduttore |
| JPS5419372A (en) * | 1977-07-14 | 1979-02-14 | Nec Corp | Production of semiconductor memory |
| JPS54109785A (en) * | 1978-02-16 | 1979-08-28 | Nec Corp | Semiconductor device |
| US4288256A (en) * | 1977-12-23 | 1981-09-08 | International Business Machines Corporation | Method of making FET containing stacked gates |
| JPS5550667A (en) * | 1978-10-09 | 1980-04-12 | Fujitsu Ltd | Method of fabricating double gate mos-type integrated circuit |
| JPS55105373A (en) * | 1978-12-04 | 1980-08-12 | Mostek Corp | Metal oxide semiconductor transistor and method of fabricating same |
| US4240196A (en) * | 1978-12-29 | 1980-12-23 | Bell Telephone Laboratories, Incorporated | Fabrication of two-level polysilicon devices |
| DE3037744A1 (de) * | 1980-10-06 | 1982-05-19 | Siemens AG, 1000 Berlin und 8000 München | Verfahren zum herstellen einer monolithisch integrierten zwei-transistor-speicherzelle in mos-technik |
| FR2468185A1 (fr) * | 1980-10-17 | 1981-04-30 | Intel Corp | Procede de fabrication d'une matrice de memoire electriquement programmable a haute densite |
| JPS5787176A (en) * | 1980-11-20 | 1982-05-31 | Seiko Epson Corp | Fabrication of semiconductor device |
| JPS57106171A (en) * | 1980-12-24 | 1982-07-01 | Fujitsu Ltd | Manufacture of semiconductor device |
| US4490900A (en) * | 1982-01-29 | 1985-01-01 | Seeq Technology, Inc. | Method of fabricating an MOS memory array having electrically-programmable and electrically-erasable storage devices incorporated therein |
| IT1218344B (it) * | 1983-03-31 | 1990-04-12 | Ates Componenti Elettron | Processo per l'autoallineamento di un doppio strato di silicio policristallino,in un dispositivo a circuito integrato,mediante un' operazione di ossidazione |
| JPS60187852A (ja) * | 1984-03-07 | 1985-09-25 | Shimadzu Corp | Νmr ct装置における静磁場発生装置 |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3719866A (en) * | 1970-12-03 | 1973-03-06 | Ncr | Semiconductor memory device |
| DE2139631C3 (de) * | 1971-08-07 | 1979-05-10 | Deutsche Itt Industries Gmbh, 7800 Freiburg | Verfahren zum Herstellen eines Halbleiterbauelements, bei dem der Rand einer Diffusionszone auf den Rand einer polykristallinen Siliciumelektrode ausgerichtet ist |
| GB1360770A (en) * | 1972-05-30 | 1974-07-24 | Westinghouse Electric Corp | N-channel mos transistor |
| JPS5024084A (OSRAM) * | 1973-07-05 | 1975-03-14 |
-
1976
- 1976-08-31 GB GB35950/76A patent/GB1540450A/en not_active Expired
- 1976-09-21 JP JP51113550A patent/JPS6020908B2/ja not_active Expired
- 1976-09-21 FR FR7628293A patent/FR2330146A1/fr active Granted
- 1976-10-06 DE DE2645014A patent/DE2645014C3/de not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| DE2645014A1 (de) | 1977-05-12 |
| JPS5259585A (en) | 1977-05-17 |
| FR2330146B1 (OSRAM) | 1982-08-27 |
| DE2645014B2 (de) | 1979-06-07 |
| DE2645014C3 (de) | 1980-02-28 |
| GB1540450A (en) | 1979-02-14 |
| FR2330146A1 (fr) | 1977-05-27 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US4142926A (en) | Self-aligning double polycrystalline silicon etching process | |
| JPH01152660A (ja) | 半導体記憶装置の製造方法 | |
| JPH0783066B2 (ja) | 半導体装置の製造方法 | |
| JPH0158661B2 (OSRAM) | ||
| US4734887A (en) | Erasable programmable read only memory (EPROM) device and a process to fabricate thereof | |
| JPS6020908B2 (ja) | Mos二重多結晶集積回路の製造方法 | |
| JPS5836508B2 (ja) | 半導体装置の製造方法 | |
| JPS63181459A (ja) | 半導体装置の製造方法 | |
| JP2971085B2 (ja) | 半導体装置の製造方法 | |
| JPH0563206A (ja) | 不揮発性半導体記憶装置の製造方法 | |
| JPH06101540B2 (ja) | 半導体集積回路の製造方法 | |
| JPH0330335A (ja) | 半導体装置の製造方法 | |
| JPS6228587B2 (OSRAM) | ||
| JP2767104B2 (ja) | 半導体装置の製造方法 | |
| JPS6237960A (ja) | 読み出し専用半導体記憶装置の製造方法 | |
| JPS58171864A (ja) | 半導体装置 | |
| JPS6240765A (ja) | 読み出し専用半導体記憶装置およびその製造方法 | |
| JPS6050964A (ja) | 半導体装置 | |
| JPH0237778A (ja) | 半導体記憶装置の製造方法 | |
| JP3361973B2 (ja) | 半導体装置の製造方法および半導体装置 | |
| JPH0227737A (ja) | 半導体装置の製造方法 | |
| JPH08130195A (ja) | 半導体装置及びその製造方法 | |
| JP2985202B2 (ja) | Mos型半導体装置の製造方法 | |
| JPS6399563A (ja) | 半導体装置の製造方法 | |
| JPH03136348A (ja) | 不揮発性メモリ素子の製造方法 |