JPS5787176A - Fabrication of semiconductor device - Google Patents
Fabrication of semiconductor deviceInfo
- Publication number
- JPS5787176A JPS5787176A JP16355680A JP16355680A JPS5787176A JP S5787176 A JPS5787176 A JP S5787176A JP 16355680 A JP16355680 A JP 16355680A JP 16355680 A JP16355680 A JP 16355680A JP S5787176 A JPS5787176 A JP S5787176A
- Authority
- JP
- Japan
- Prior art keywords
- gate
- control gate
- polycrystalline silicon
- layers
- floating gate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title abstract 2
- 238000004519 manufacturing process Methods 0.000 title 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 abstract 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 abstract 2
- 238000009792 diffusion process Methods 0.000 abstract 2
- XUFQPHANEAPEMJ-UHFFFAOYSA-N famotidine Chemical compound NC(N)=NC1=NC(CSCCC(N)=NS(N)(=O)=O)=CS1 XUFQPHANEAPEMJ-UHFFFAOYSA-N 0.000 abstract 2
- 239000012535 impurity Substances 0.000 abstract 2
- 229910052710 silicon Inorganic materials 0.000 abstract 2
- 239000010703 silicon Substances 0.000 abstract 2
- 239000000758 substrate Substances 0.000 abstract 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 abstract 1
- 229910052782 aluminium Inorganic materials 0.000 abstract 1
- 230000015572 biosynthetic process Effects 0.000 abstract 1
- 239000011248 coating agent Substances 0.000 abstract 1
- 238000000576 coating method Methods 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/788—Field effect transistors with field effect produced by an insulated gate with floating gate
- H01L29/7881—Programmable transistors with only two possible levels of programmation
- H01L29/7884—Programmable transistors with only two possible levels of programmation charging by hot carrier injection
- H01L29/7886—Hot carrier produced by avalanche breakdown of a PN junction, e.g. FAMOS
Abstract
PURPOSE:To obtain an FAMOS transistor free from disconnection in a silicon gate MOS transistor with two gate layers consisting of a floating gate and control gate layers by diffusing impurities into both the layers of polycrystalline silicon. CONSTITUTION:Thick field oxide film 204 is formed on the periphery of a silicon substrate 201 so as to surround its internal regions. On the internal surface of the substrate 201, a thin gate oxide film 202 is formed and on which the floating gate 203 of polycrystalline silicon is formed at its center. Then, the control gate 206 of polycrystalline silicon is provided on the floating gate with a gate oxide coating 205 interlaid for formation of an FAMOS transistor. In such structure, normally diffusion of impurities is introduced only into the floating gate 203, not into the control gate 206. This particular type of semiconductor, however, provides the control gate 206 also with approximately the same degree of diffusion, so that there is no fear of disconnection of aluminum wiring on the control gate.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16355680A JPS5787176A (en) | 1980-11-20 | 1980-11-20 | Fabrication of semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16355680A JPS5787176A (en) | 1980-11-20 | 1980-11-20 | Fabrication of semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5787176A true JPS5787176A (en) | 1982-05-31 |
Family
ID=15776137
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP16355680A Pending JPS5787176A (en) | 1980-11-20 | 1980-11-20 | Fabrication of semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5787176A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5147813A (en) * | 1990-08-15 | 1992-09-15 | Intel Corporation | Erase performance improvement via dual floating gate processing |
| US5229631A (en) * | 1990-08-15 | 1993-07-20 | Intel Corporation | Erase performance improvement via dual floating gate processing |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5259585A (en) * | 1975-10-29 | 1977-05-17 | Intel Corp | Method of producing mos polycrystalline ic |
| JPS5488087A (en) * | 1977-12-23 | 1979-07-12 | Ibm | Method of fabricating fet |
-
1980
- 1980-11-20 JP JP16355680A patent/JPS5787176A/en active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5259585A (en) * | 1975-10-29 | 1977-05-17 | Intel Corp | Method of producing mos polycrystalline ic |
| JPS5488087A (en) * | 1977-12-23 | 1979-07-12 | Ibm | Method of fabricating fet |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5147813A (en) * | 1990-08-15 | 1992-09-15 | Intel Corporation | Erase performance improvement via dual floating gate processing |
| US5229631A (en) * | 1990-08-15 | 1993-07-20 | Intel Corporation | Erase performance improvement via dual floating gate processing |
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