JPS55111161A - Semiconductor device and manufacturing method thereof - Google Patents

Semiconductor device and manufacturing method thereof

Info

Publication number
JPS55111161A
JPS55111161A JP1882279A JP1882279A JPS55111161A JP S55111161 A JPS55111161 A JP S55111161A JP 1882279 A JP1882279 A JP 1882279A JP 1882279 A JP1882279 A JP 1882279A JP S55111161 A JPS55111161 A JP S55111161A
Authority
JP
Japan
Prior art keywords
opening
film
films
gate
region
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1882279A
Other languages
Japanese (ja)
Inventor
Toru Tsujiide
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP1882279A priority Critical patent/JPS55111161A/en
Publication of JPS55111161A publication Critical patent/JPS55111161A/en
Pending legal-status Critical Current

Links

Landscapes

  • Electrodes Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

PURPOSE: To reduce the distance between an opening and a gate region on a mask and miniaturize a memory cell, by providing two prescribed insulating films and making the lower film thin.
CONSTITUTION: A p-type substrate 100 having a gate insulating film 104, a polycrystalline silicon wiring 103, a polycrystalline silicon gate electrode 102 and a field insulating film 101 is prepared. An oxide film 105 is grown. A source region 106 and a drain region 107 are produced. After an Si3N4 film 108 is grown, the first opening is privided by etching the film 108 and an SiO2 film 109. Both the films are made so thin that the extension of the opening is made small. After a thick PSG film 110 is coated, the second opening is provided on the first opening. Aluminum lead wires 111, 112, 113 are provided. Even if the second opening is enlarged, the lead wires do not communicate with the films under the second opening. The distance between the opening and a gate region on a mask can thus be reduced.
COPYRIGHT: (C)1980,JPO&Japio
JP1882279A 1979-02-20 1979-02-20 Semiconductor device and manufacturing method thereof Pending JPS55111161A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1882279A JPS55111161A (en) 1979-02-20 1979-02-20 Semiconductor device and manufacturing method thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1882279A JPS55111161A (en) 1979-02-20 1979-02-20 Semiconductor device and manufacturing method thereof

Publications (1)

Publication Number Publication Date
JPS55111161A true JPS55111161A (en) 1980-08-27

Family

ID=11982249

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1882279A Pending JPS55111161A (en) 1979-02-20 1979-02-20 Semiconductor device and manufacturing method thereof

Country Status (1)

Country Link
JP (1) JPS55111161A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58216467A (en) * 1982-06-10 1983-12-16 Toshiba Corp Manufacture of mis type semiconductor device
US4868137A (en) * 1987-12-29 1989-09-19 Nec Corporation Method of making insulated-gate field effect transistor
US5270237A (en) * 1991-08-24 1993-12-14 Samsung Electronics Co., Ltd. Method for manufacturing mask ROMs by using a protection layer

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5388571A (en) * 1977-01-14 1978-08-04 Toshiba Corp Production of semiconductor device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5388571A (en) * 1977-01-14 1978-08-04 Toshiba Corp Production of semiconductor device

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58216467A (en) * 1982-06-10 1983-12-16 Toshiba Corp Manufacture of mis type semiconductor device
US4868137A (en) * 1987-12-29 1989-09-19 Nec Corporation Method of making insulated-gate field effect transistor
US5270237A (en) * 1991-08-24 1993-12-14 Samsung Electronics Co., Ltd. Method for manufacturing mask ROMs by using a protection layer

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