JPS6010644A - 半導体装置の製造方法 - Google Patents

半導体装置の製造方法

Info

Publication number
JPS6010644A
JPS6010644A JP58117083A JP11708383A JPS6010644A JP S6010644 A JPS6010644 A JP S6010644A JP 58117083 A JP58117083 A JP 58117083A JP 11708383 A JP11708383 A JP 11708383A JP S6010644 A JPS6010644 A JP S6010644A
Authority
JP
Japan
Prior art keywords
film
silicon
films
silicon oxynitride
semiconductor device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP58117083A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0226374B2 (enExample
Inventor
Toshiyo Itou
伊藤　敏代
Jiro Oshima
次郎 大島
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP58117083A priority Critical patent/JPS6010644A/ja
Priority to US06/626,386 priority patent/US4543707A/en
Publication of JPS6010644A publication Critical patent/JPS6010644A/ja
Publication of JPH0226374B2 publication Critical patent/JPH0226374B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H10P50/283—
    • H10P50/667—
    • H10P50/73—
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/042—Doping, graded, for tapered etching
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/082—Ion implantation FETs/COMs
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/161—Tapered edges

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Weting (AREA)
  • Formation Of Insulating Films (AREA)
  • Electrodes Of Semiconductors (AREA)
JP58117083A 1983-06-30 1983-06-30 半導体装置の製造方法 Granted JPS6010644A (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP58117083A JPS6010644A (ja) 1983-06-30 1983-06-30 半導体装置の製造方法
US06/626,386 US4543707A (en) 1983-06-30 1984-06-29 Method of forming through holes by differential etching of stacked silicon oxynitride layers

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58117083A JPS6010644A (ja) 1983-06-30 1983-06-30 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
JPS6010644A true JPS6010644A (ja) 1985-01-19
JPH0226374B2 JPH0226374B2 (enExample) 1990-06-08

Family

ID=14702968

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58117083A Granted JPS6010644A (ja) 1983-06-30 1983-06-30 半導体装置の製造方法

Country Status (2)

Country Link
US (1) US4543707A (enExample)
JP (1) JPS6010644A (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63244651A (ja) * 1987-03-30 1988-10-12 Nec Corp 半導体装置

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US4623912A (en) 1984-12-05 1986-11-18 At&T Bell Laboratories Nitrided silicon dioxide layers for semiconductor integrated circuits
JPS62150826A (ja) * 1985-12-25 1987-07-04 Toshiba Corp 半導体装置の製造方法
US4705760A (en) * 1986-01-16 1987-11-10 Rca Corporation Preparation of a surface for deposition of a passinating layer
US4717631A (en) * 1986-01-16 1988-01-05 Rca Corporation Silicon oxynitride passivated semiconductor body and method of making same
US5528058A (en) * 1986-03-21 1996-06-18 Advanced Power Technology, Inc. IGBT device with platinum lifetime control and reduced gaw
EP0252179B1 (en) * 1986-07-11 1992-05-27 International Business Machines Corporation Process for producing undercut mask profiles
US4676869A (en) * 1986-09-04 1987-06-30 American Telephone And Telegraph Company At&T Bell Laboratories Integrated circuits having stepped dielectric regions
USRE33622E (en) * 1986-09-04 1991-06-25 At&T Bell Laboratories Integrated circuits having stepped dielectric regions
US5169680A (en) * 1987-05-07 1992-12-08 Intel Corporation Electroless deposition for IC fabrication
JPH01138734A (ja) * 1987-11-25 1989-05-31 Mitsubishi Electric Corp 複導電体層を有する半導体装置およびその製造方法
NL8900989A (nl) * 1989-04-20 1990-11-16 Philips Nv Halfgeleiderinrichting met een in een kunststof omhulling ingebed halfgeleiderlichaam.
KR0185375B1 (ko) * 1989-05-23 1999-03-20 엔. 라이스 머레트 분리 금속 플레이트 캐패시터 및 이의 제조 방법
JP2625602B2 (ja) * 1991-01-18 1997-07-02 インターナショナル・ビジネス・マシーンズ・コーポレイション 集積回路デバイスの製造プロセス
US5391503A (en) * 1991-05-13 1995-02-21 Sony Corporation Method of forming a stacked semiconductor device wherein semiconductor layers and insulating films are sequentially stacked and forming openings through such films and etchings using one of the insulating films as a mask
US5187121A (en) * 1991-12-18 1993-02-16 International Business Machines Corporation Process for fabrication of a semiconductor structure and contact stud
US5302534A (en) * 1992-03-02 1994-04-12 Motorola, Inc. Forming a vertical PNP transistor
US5304840A (en) * 1992-07-24 1994-04-19 Trw Inc. Cryogenic radiation-hard dual-layer field oxide for field-effect transistors
US5362666A (en) * 1992-09-18 1994-11-08 Micron Technology, Inc. Method of producing a self-aligned contact penetrating cell plate
US5365104A (en) * 1993-03-25 1994-11-15 Paradigm Technology, Inc. Oxynitride fuse protective/passivation film for integrated circuit having resistors
US5429974A (en) * 1993-10-22 1995-07-04 United Microelectronics Corporation Post passivation mask ROM programming method
JP2682403B2 (ja) * 1993-10-29 1997-11-26 日本電気株式会社 半導体装置の製造方法
DE69433836D1 (de) * 1993-12-28 2004-07-15 Applied Materials Inc Verfahren zur plasma-unterstützten chemischen Dampfabscheidung von Silizium-Oxynitridschichten
US5528082A (en) * 1994-04-28 1996-06-18 Xerox Corporation Thin-film structure with tapered feature
US5541141A (en) * 1995-02-27 1996-07-30 Hyundai Electronics Industries Co., Ltd. Method for forming an oxynitride film in a semiconductor device
KR0171128B1 (ko) * 1995-04-21 1999-02-01 김우중 수직형 바이폴라 트랜지스터
US5622596A (en) * 1995-05-08 1997-04-22 International Business Machines Corporation High density selective SiO2 :Si3 N4 etching using a stoichiometrically altered nitride etch stop
US5702959A (en) * 1995-05-31 1997-12-30 Texas Instruments Incorporated Method for making an isolated vertical transistor
US5710067A (en) * 1995-06-07 1998-01-20 Advanced Micro Devices, Inc. Silicon oxime film
US6022799A (en) * 1995-06-07 2000-02-08 Advanced Micro Devices, Inc. Methods for making a semiconductor device with improved hot carrier lifetime
US6323139B1 (en) 1995-12-04 2001-11-27 Micron Technology, Inc. Semiconductor processing methods of forming photoresist over silicon nitride materials
US5926739A (en) 1995-12-04 1999-07-20 Micron Technology, Inc. Semiconductor processing method of promoting photoresist adhesion to an outer substrate layer predominately comprising silicon nitride
US6300253B1 (en) 1998-04-07 2001-10-09 Micron Technology, Inc. Semiconductor processing methods of forming photoresist over silicon nitride materials, and semiconductor wafer assemblies comprising photoresist over silicon nitride materials
JPH10173052A (ja) * 1996-12-13 1998-06-26 Fujitsu Ltd 半導体装置及びその製造方法
US6136700A (en) * 1996-12-20 2000-10-24 Texas Instruments Incorporated Method for enhancing the performance of a contact
US5899748A (en) * 1997-05-21 1999-05-04 Taiwan Semiconductor Manufacturing Co., Ltd. Method for anchoring via/contact in semiconductor devices and devices formed
US5976987A (en) * 1997-10-03 1999-11-02 Vlsi Technology, Inc. In-situ corner rounding during oxide etch for improved plug fill
US6124206A (en) * 1997-12-29 2000-09-26 Siemens Aktiengesellschaft Reduced pad erosion
US6767794B2 (en) * 1998-01-05 2004-07-27 Advanced Micro Devices, Inc. Method of making ultra thin oxide formation using selective etchback technique integrated with thin nitride layer for high performance MOSFET
US5985771A (en) * 1998-04-07 1999-11-16 Micron Technology, Inc. Semiconductor wafer assemblies comprising silicon nitride, methods of forming silicon nitride, and methods of reducing stress on semiconductive wafers
US6635530B2 (en) * 1998-04-07 2003-10-21 Micron Technology, Inc. Methods of forming gated semiconductor assemblies
US6316372B1 (en) 1998-04-07 2001-11-13 Micron Technology, Inc. Methods of forming a layer of silicon nitride in a semiconductor fabrication process
US6287959B1 (en) 1998-04-23 2001-09-11 Advanced Micro Devices, Inc. Deep submicron metallization using deep UV photoresist
JP3185871B2 (ja) * 1998-05-01 2001-07-11 日本電気株式会社 半導体装置の製造方法
US6218314B1 (en) * 1999-04-01 2001-04-17 Taiwan Semiconductor Manufacturing Company Silicon dioxide-oxynitride continuity film as a passivation film
US6121149A (en) * 1999-04-22 2000-09-19 Advanced Micro Devices, Inc. Optimized trench/via profile for damascene filling
TW517260B (en) * 1999-05-15 2003-01-11 Semiconductor Energy Lab Semiconductor device and method for its fabrication
US6580107B2 (en) * 2000-10-10 2003-06-17 Sanyo Electric Co., Ltd. Compound semiconductor device with depletion layer stop region
US6498088B1 (en) * 2000-11-09 2002-12-24 Micron Technology, Inc. Stacked local interconnect structure and method of fabricating same
US6410461B1 (en) * 2001-05-07 2002-06-25 Advanced Micro Devices, Inc. Method of depositing sion with reduced defects
US6803305B2 (en) * 2002-04-10 2004-10-12 Chartered Semiconductor Manufacturing Limited Method for forming a via in a damascene process
US8940645B2 (en) 2007-05-25 2015-01-27 Cypress Semiconductor Corporation Radical oxidation process for fabricating a nonvolatile charge trap memory device
US8633537B2 (en) 2007-05-25 2014-01-21 Cypress Semiconductor Corporation Memory transistor with multiple charge storing layers and a high work function gate electrode
US9299568B2 (en) 2007-05-25 2016-03-29 Cypress Semiconductor Corporation SONOS ONO stack scaling
US9449831B2 (en) 2007-05-25 2016-09-20 Cypress Semiconductor Corporation Oxide-nitride-oxide stack having multiple oxynitride layers
US20090179253A1 (en) 2007-05-25 2009-07-16 Cypress Semiconductor Corporation Oxide-nitride-oxide stack having multiple oxynitride layers
US8643124B2 (en) 2007-05-25 2014-02-04 Cypress Semiconductor Corporation Oxide-nitride-oxide stack having multiple oxynitride layers
US8614124B2 (en) 2007-05-25 2013-12-24 Cypress Semiconductor Corporation SONOS ONO stack scaling
US9431549B2 (en) 2007-12-12 2016-08-30 Cypress Semiconductor Corporation Nonvolatile charge trap memory device having a high dielectric constant blocking region
US9448964B2 (en) 2009-05-04 2016-09-20 Cypress Semiconductor Corporation Autonomous control in a programmable system
US8487655B1 (en) 2009-05-05 2013-07-16 Cypress Semiconductor Corporation Combined analog architecture and functionality in a mixed-signal array
US8179161B1 (en) 2009-05-05 2012-05-15 Cypress Semiconductor Corporation Programmable input/output circuit
US9612987B2 (en) 2009-05-09 2017-04-04 Cypress Semiconductor Corporation Dynamically reconfigurable analog routing circuits and methods for system on a chip
CN104395991B (zh) * 2012-06-29 2017-06-20 株式会社半导体能源研究所 半导体装置
US10276669B2 (en) 2017-01-19 2019-04-30 Infineon Technologies Austria Ag Sloped field plate and contact structures for semiconductor devices and methods of manufacturing thereof

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS51148361A (en) * 1975-06-14 1976-12-20 Fujitsu Ltd Formation method of insulation film

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52147063A (en) * 1976-06-02 1977-12-07 Toshiba Corp Semiconductor electrode forming method
DE2658448C3 (de) * 1976-12-23 1979-09-20 Deutsche Itt Industries Gmbh, 7800 Freiburg Verfahren zum Ätzen einer auf einem Halbleiterkörper aufgebrachten Schicht aus Siliciumnitrid in einem Gasplasma
DE2832388C2 (de) * 1978-07-24 1986-08-14 Siemens Ag, 1000 Berlin Und 8000 Muenchen Verfahren zum Herstellen von MNOS- und MOS-Transistoren in Silizium-Gate-Technologie auf einem Halbleitersubstrat
JPS55163860A (en) * 1979-06-06 1980-12-20 Toshiba Corp Manufacture of semiconductor device
JPS5640260A (en) * 1979-09-11 1981-04-16 Mitsubishi Electric Corp Manufacture of semiconductor device
JPS5693344A (en) * 1979-12-26 1981-07-28 Fujitsu Ltd Manufacture of semiconductor device
US4484978A (en) * 1983-09-23 1984-11-27 Fairchild Camera & Instrument Corp. Etching method
US4484979A (en) * 1984-04-16 1984-11-27 At&T Bell Laboratories Two-step anisotropic etching process for patterning a layer without penetrating through an underlying thinner layer

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS51148361A (en) * 1975-06-14 1976-12-20 Fujitsu Ltd Formation method of insulation film

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63244651A (ja) * 1987-03-30 1988-10-12 Nec Corp 半導体装置

Also Published As

Publication number Publication date
US4543707A (en) 1985-10-01
JPH0226374B2 (enExample) 1990-06-08

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