JPS5842624B2 - シンキナホウネツコウゾウタイオシヨウシタ シユウセキカイロパツケ−ジ - Google Patents

シンキナホウネツコウゾウタイオシヨウシタ シユウセキカイロパツケ−ジ

Info

Publication number
JPS5842624B2
JPS5842624B2 JP50159796A JP15979675A JPS5842624B2 JP S5842624 B2 JPS5842624 B2 JP S5842624B2 JP 50159796 A JP50159796 A JP 50159796A JP 15979675 A JP15979675 A JP 15979675A JP S5842624 B2 JPS5842624 B2 JP S5842624B2
Authority
JP
Japan
Prior art keywords
heatsink
mold
plastic
integrated circuit
heat
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP50159796A
Other languages
English (en)
Other versions
JPS51114068A (en
Inventor
エツチ ホツジ ロビン
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
National Semiconductor Corp
Original Assignee
National Semiconductor Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by National Semiconductor Corp filed Critical National Semiconductor Corp
Publication of JPS51114068A publication Critical patent/JPS51114068A/ja
Publication of JPS5842624B2 publication Critical patent/JPS5842624B2/ja
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49541—Geometry of the lead-frame
    • H01L23/49548—Cross section geometry
    • H01L23/49551—Cross section geometry characterised by bent parts
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/565—Moulds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/42—Fillings or auxiliary members in containers or encapsulations selected or arranged to facilitate heating or cooling
    • H01L23/433—Auxiliary members in containers characterised by their shape, e.g. pistons
    • H01L23/4334—Auxiliary members in encapsulations
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49171—Fan-out arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01019—Potassium [K]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01067—Holmium [Ho]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49121—Beam lead frame or beam lead device

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Geometry (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Injection Moulding Of Plastics Or The Like (AREA)
  • Moulds For Moulding Plastics Or The Like (AREA)

Description

【発明の詳細な説明】 本発明はパッケージ内の放熱器の構造を改良した集積回
路パッケージに関する。
一般に、電力応用に対して使用される例えば１４リード
のデュアル・イン・ライン・パッケージの如き集積回路
（ＩＣ）実装パッケージはリードフレーム内のチップパ
ッド上に装着されたＩＣチップによって発生される熱を
逃すための放熱器を組込んでいる。
第１図及び第２図は従来の典型的なＩＣパッケージを示
す図である。
この周知のリードフレーム構造体は２つの側支持スｔ−
ＩＪツブ１１及び１２を具備し、これらは長手方向のリ
ードフレームストリップに沿い、かつそれらの間で複数
の別々のＩ ＣＩＪ−ドフレーム支持構造体を支持する
。
各態別のリードフレーム構造体はフレーム内で中心に位
置決めされかつ１対のパッド支持構１４及び１５によっ
て支持されたＩＣアタッチメントパッド１３を具備する
。
これら支持棒１４及び１５は外向きに伸び、それらの体
側端は側支持ストリップ１１及び１２と一体となってい
る。
２つのパッド支持棒は１６及び１７でわずかに下方に曲
げられ、フレーム構造体の他の部分よりもわずかに低い
レベルでグイアタッチメントパッド１３を保持する。
ＩＣチップ１８は、ハンダ付等によってグイアタッチメ
ントパッド１３の上方表面に固着されており、チップ１
８の上方表面はフレーム構造体の上記した他の部分と同
一レベルである。
細長い銅の放熱器１９は使用時にＩＣから熱を取去るた
めにグイアタッチメントパッド１９の下側にハンダ付さ
れている。
、 。従来のこの放熱器は実装
の際にモールドの壁表面にか存＜装着されないこととプ
ラスチックが放熱部材の外部表面を覆ってしまう欠点が
あった。
この欠点は、モールドされたパッケージがモールドから
取外された後に、放熱器を覆ったプラスチックを取って
放熱器を露出させ、使用時にＩＣパッケージから熱を取
去るようにさせることを保障するためにハンダ付は等に
よって放熱器を外部放熱素子に熱的に結合する附加的な
工程を必要とする。
更に、従来の放熱器はリードフレームのダイパッドにハ
ンダ付ませしめられるその小さな面積部分に比し大きい
ことをびこれによって放熱器が熔融プラスチックの導入
時にモールド内でうき上ったり下ったりする傾向がある
という欠点がある。
これらの欠点によって、放熱器は往々リードフレームの
別個の接触リードと接触したりあるいはこれら接触リー
ドを互に短絡させたりする。
また、この放熱器のうき上り下り作用の結果、１つのユ
ニットから次のユニットまでの放熱器を覆うプラスチッ
クフィルムの厚味は一定ではなくなり種々のパッケージ
の放熱器を露出させるに必要な研磨の程度を変えねばな
らず、製造処理に変化をきたすという欠点もあった。
本発明の目的は、内部放熱器がＩＣチップ装着パッドに
結合されかつ頂部から底部へプラスチック実装部を貫通
して伸びるようにした新規な集積回路パッケージを提供
することである。
本発明においてはモールド空胴壁はプラスチックがモー
ルド空胴に実装される開放熱器がモールド内にかたく保
持されるように作用する。
このようにして、放熱器はうき上り下りせず、リードフ
レーム内のリード接続部と接触しない。
放熱器はその両端から上方に伸びる２対の一体的な可撓
性のフィンガを設けている。
これらフィンガの端部はプラスチック実装工程時にモー
ルド空胴の上方壁がＩＣ構造体の周りに下って近づく際
にこの壁面に係合する。
可撓性フィンガはプラスチックが放熱器の下方表面を覆
わないようにするために放熱器の底部表面を空胴モール
ドの下方壁に対して押圧する。
以下に図面を参照して本発明の実施例について詳細に説
明する。
第３図ないし第５図は本発明の集積回路パッケージの実
施例を示す図である。
この実施例は基部３１を具備した銅の放熱器を具備する
。
基部３１はダイパッド１３に取付けられる区域を含む。
基部３１の２対のＬ形の可撓性フィンガ３２及び３３は
一体に形成されて基部３１の両端から内方に伸びる。
フィンガ対３２は支持棒１４をはさみフィンガ対３３は
支持棒１５をはさむ。
これらフィンガは関連した支持棒から離れている。
基部３１の走部表面からフィンガ３２．３３のチップま
での放熱器の高さは、上方及び下方モールド表面２５及
び２５′がそれぞれ閉じた際の空胴の内部高さよりもわ
ずかに犬である。
従って、モールド２５．２５’がリードフレーム構造体
上で閉じた時に、上方表面２５は放熱器３１の下側表面
を下方モールド表面２５′に対してしっかりと弾性押圧
する可撓性フィンガ３２，３３のチップと係合する。
従って、放熱器の下側表面とモールド空胴の下方表面２
５′との間で圧力接触が得られる。
熔融プラスチックはこの放熱区域には入り込み得ない。
従って、放熱器の基部表面区域にはプラスチックフィル
ムが与えられず、実装材料２６が硬化した際にこの銅の
放熱表面を露出させるため研磨等を行なう必要はない。
【図面の簡単な説明】
第１図はＩＣチップを適所に装着した従来技術によるＩ
ＣＩＪ−ドフレームの上面図、第２図は従来技術に従
って熔融プラスチックを導入する前にプラスチック空胴
モールド内にある第１図の構造体の横断面図、第３図は
本発明のＩＣ装置に組込まれる新規な放熱器の実施例を
示す図、第４図は空胴モールド内の新規な装置を示す断
面図、第５図は実装された装置を示す断面図である。 図で、３１は基部、３３．３３は２対のＬ形可撓性フィ
ンガを示す。

Claims (1)

    【特許請求の範囲】
  1. １ 集積回路装置のモールド実装時にモールド空胴の側
    と係合し放熱器をモールド空胴の対抗側に弾性押圧する
    弾性フィンガーを放熱器の横方向に延在させて設けたこ
    とを特徴とする集積回路パッケージ。
JP50159796A 1975-03-17 1975-12-26 シンキナホウネツコウゾウタイオシヨウシタ シユウセキカイロパツケ−ジ Expired JPS5842624B2 (ja)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US558643A US3930114A (en) 1975-03-17 1975-03-17 Integrated circuit package utilizing novel heat sink structure

Publications (2)

Publication Number Publication Date
JPS51114068A JPS51114068A (en) 1976-10-07
JPS5842624B2 true JPS5842624B2 (ja) 1983-09-21

Family

ID=24230359

Family Applications (1)

Application Number Title Priority Date Filing Date
JP50159796A Expired JPS5842624B2 (ja) 1975-03-17 1975-12-26 シンキナホウネツコウゾウタイオシヨウシタ シユウセキカイロパツケ−ジ

Country Status (7)

Country Link
US (1) US3930114A (ja)
JP (1) JPS5842624B2 (ja)
BR (1) BR7601510A (ja)
CA (1) CA1040747A (ja)
DE (1) DE2611531A1 (ja)
FR (1) FR2305026A1 (ja)
GB (1) GB1538556A (ja)

Families Citing this family (76)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3039440C2 (de) * 1980-10-18 1984-02-16 ANT Nachrichtentechnik GmbH, 7150 Backnang Anordnung zur Aufnahme von elektrischen und/oder elektronischen Bauelementen
US4063267A (en) * 1976-06-21 1977-12-13 Mcdonnell Douglas Corporation MNOS Memory device
JPS53132975A (en) * 1977-04-26 1978-11-20 Toshiba Corp Semiconductor device
JPS5425381A (en) * 1977-07-27 1979-02-26 Matsushita Electric Ind Co Ltd Home-use electric appliance
US4137546A (en) * 1977-10-14 1979-01-30 Plessey Incorporated Stamped lead frame for semiconductor packages
US4132856A (en) * 1977-11-28 1979-01-02 Burroughs Corporation Process of forming a plastic encapsulated molded film carrier CML package and the package formed thereby
US4195193A (en) * 1979-02-23 1980-03-25 Amp Incorporated Lead frame and chip carrier housing
FR2456390A1 (fr) * 1979-05-11 1980-12-05 Thomson Csf Grille d'encapsulation, microboitier de circuit electronique utilisant cette grille et procede d'encapsulation de circuit electronique en microboitier
US4258411A (en) * 1979-05-21 1981-03-24 Bell Telephone Laboratories, Incorporated Electronic device packaging arrangement
FR2487580A1 (fr) * 1980-07-22 1982-01-29 Thomson Csf Mat Tel Dispositif semiconducteur a enrobage isolant comportant un dissipateur de chaleur apparent, et son procede de fabrication
US4331831A (en) * 1980-11-28 1982-05-25 Bell Telephone Laboratories, Incorporated Package for semiconductor integrated circuits
FR2498377A1 (fr) * 1981-01-16 1982-07-23 Thomson Csf Mat Tel Procede de fabrication de dispositifs semiconducteurs sur bande metallique
JPS57147260A (en) * 1981-03-05 1982-09-11 Matsushita Electronics Corp Manufacture of resin-sealed semiconductor device and lead frame used therefor
IT1218271B (it) * 1981-04-13 1990-04-12 Ates Componenti Elettron Procedimento per la fabbricazione di contenitori in plastica con dissipatore termico per circuiti integrati e combinazione di stampo e dissipatori utilizzabile con tale procedimento
US4451973A (en) * 1981-04-28 1984-06-05 Matsushita Electronics Corporation Method for manufacturing a plastic encapsulated semiconductor device and a lead frame therefor
CA1195782A (en) * 1981-07-06 1985-10-22 Mikio Nishikawa Lead frame for plastic encapsulated semiconductor device
WO1983003712A1 (en) * 1982-04-05 1983-10-27 Motorola Inc A self-positioning heat spreader
JPS5979417A (ja) * 1982-10-28 1984-05-08 Sony Corp 磁気ヘツド装置
US4521828A (en) * 1982-12-23 1985-06-04 At&T Technologies, Inc. Component module for piggyback mounting on a circuit package having dual-in-line leads
US4617708A (en) * 1982-12-23 1986-10-21 At&T Technologies, Inc. Component module for piggyback mounting on a circuit package having dual-in-line leads, and methods of fabricating same
US4630172A (en) * 1983-03-09 1986-12-16 Printed Circuits International Semiconductor chip carrier package with a heat sink
IT1213140B (it) * 1984-02-17 1989-12-14 Ates Componenti Elettron Componente elettronico integrato per assemblaggio di superficie.
EP0206771B1 (en) * 1985-06-20 1992-03-11 Kabushiki Kaisha Toshiba Packaged semiconductor device
US4751611A (en) * 1986-07-24 1988-06-14 Hitachi Chemical Co., Ltd. Semiconductor package structure
US4868349A (en) * 1988-05-09 1989-09-19 National Semiconductor Corporation Plastic molded pin-grid-array power package
JPH0732215B2 (ja) * 1988-10-25 1995-04-10 三菱電機株式会社 半導体装置
US4916506A (en) * 1988-11-18 1990-04-10 Sprague Electric Company Integrated-circuit lead-frame package with low-resistance ground-lead and heat-sink means
US5015803A (en) * 1989-05-31 1991-05-14 Olin Corporation Thermal performance package for integrated circuit chip
US5334872A (en) * 1990-01-29 1994-08-02 Mitsubishi Denki Kabushiki Kaisha Encapsulated semiconductor device having a hanging heat spreading plate electrically insulated from the die pad
US5065281A (en) * 1990-02-12 1991-11-12 Rogers Corporation Molded integrated circuit package incorporating heat sink
US5014117A (en) * 1990-03-30 1991-05-07 International Business Machines Corporation High conduction flexible fin cooling module
ATE186795T1 (de) * 1990-07-21 1999-12-15 Mitsui Chemicals Inc Halbleiteranordnung mit einer packung
IT1247649B (it) * 1990-10-31 1994-12-28 Sgs Thomson Microelectronics Procedimento di incapsulamento in resina di un dispositivo a semiconduttore di potenza montato su dissipatore allontanando i reofori dal dissipatore mediante l'azione del controstampo in fase di chiusura dello stampo
US5139973A (en) * 1990-12-17 1992-08-18 Allegro Microsystems, Inc. Method for making a semiconductor package with the distance between a lead frame die pad and heat spreader determined by the thickness of an intermediary insulating sheet
IT1246743B (it) * 1990-12-28 1994-11-26 Sgs Thomson Microelectronics Stampo per la fabbricazione di contenitori in plastica, per circuiti integrati,con dissipatore termico incorporato.
US5403784A (en) * 1991-09-03 1995-04-04 Microelectronics And Computer Technology Corporation Process for manufacturing a stacked multiple leadframe semiconductor package using an alignment template
US5200809A (en) * 1991-09-27 1993-04-06 Vlsi Technology, Inc. Exposed die-attach heatsink package
JPH05190721A (ja) * 1992-01-08 1993-07-30 Fujitsu Ltd 半導体装置及びその製造方法
US5263245A (en) * 1992-01-27 1993-11-23 International Business Machines Corporation Method of making an electronic package with enhanced heat sinking
US5387554A (en) * 1992-09-10 1995-02-07 Vlsi Technology, Inc. Apparatus and method for thermally coupling a heat sink to a lead frame
US5608267A (en) * 1992-09-17 1997-03-04 Olin Corporation Molded plastic semiconductor package including heat spreader
US5289344A (en) * 1992-10-08 1994-02-22 Allegro Microsystems Inc. Integrated-circuit lead-frame package with failure-resistant ground-lead and heat-sink means
KR940016724A (ko) * 1992-12-03 1994-07-23 빈센트 비. 인그라시아 표면 실장형 집적 회로 파워 패키지용 리드 프레임 어셈블리
DE9300865U1 (de) * 1993-01-22 1994-05-26 Siemens Ag Einstückiges Kunststoffteil, insbesondere Spritzgießteil
US5394607A (en) * 1993-05-20 1995-03-07 Texas Instruments Incorporated Method of providing low cost heat sink
US5420752A (en) * 1993-08-18 1995-05-30 Lsi Logic Corporation GPT system for encapsulating an integrated circuit package
US5441684A (en) * 1993-09-24 1995-08-15 Vlsi Technology, Inc. Method of forming molded plastic packages with integrated heat sinks
US5444909A (en) * 1993-12-29 1995-08-29 Intel Corporation Method of making a drop-in heat sink
US5609889A (en) * 1995-05-26 1997-03-11 Hestia Technologies, Inc. Apparatus for encapsulating electronic packages
JP3435271B2 (ja) * 1995-11-30 2003-08-11 三菱電機株式会社 半導体装置
US5825623A (en) * 1995-12-08 1998-10-20 Vlsi Technology, Inc. Packaging assemblies for encapsulated integrated circuit devices
JPH09199645A (ja) * 1996-01-17 1997-07-31 Mitsubishi Electric Corp 半導体装置および半導体モジュール
US5672547A (en) * 1996-01-31 1997-09-30 Industrial Technology Research Institute Method for bonding a heat sink to a die paddle
US5872395A (en) * 1996-09-16 1999-02-16 International Packaging And Assembly Corporation Bent tip method for preventing vertical motion of heat spreaders during injection molding of IC packages
US5859387A (en) * 1996-11-29 1999-01-12 Allegro Microsystems, Inc. Semiconductor device leadframe die attach pad having a raised bond pad
US6001672A (en) * 1997-02-25 1999-12-14 Micron Technology, Inc. Method for transfer molding encapsulation of a semiconductor die with attached heat sink
JP2924854B2 (ja) * 1997-05-20 1999-07-26 日本電気株式会社 半導体装置、その製造方法
US5869883A (en) * 1997-09-26 1999-02-09 Stanley Wang, President Pantronix Corp. Packaging of semiconductor circuit in pre-molded plastic package
US6198163B1 (en) 1999-10-18 2001-03-06 Amkor Technology, Inc. Thin leadframe-type semiconductor package having heat sink with recess and exposed surface
US6678121B2 (en) 2000-06-27 2004-01-13 Seagate Technology Llc Fiber reinforced laminate actuator arm for disc drives
US7220615B2 (en) 2001-06-11 2007-05-22 Micron Technology, Inc. Alternative method used to package multimedia card by transfer molding
US6396130B1 (en) 2001-09-14 2002-05-28 Amkor Technology, Inc. Semiconductor package having multiple dies with independently biased back surfaces
EP1318544A1 (en) * 2001-12-06 2003-06-11 STMicroelectronics S.r.l. Method for manufacturing semiconductor device packages
US20030112710A1 (en) * 2001-12-18 2003-06-19 Eidson John C. Reducing thermal drift in electronic components
US7190060B1 (en) 2002-01-09 2007-03-13 Bridge Semiconductor Corporation Three-dimensional stacked semiconductor package device with bent and flat leads and method of making same
US6936495B1 (en) 2002-01-09 2005-08-30 Bridge Semiconductor Corporation Method of making an optoelectronic semiconductor package device
US6891276B1 (en) 2002-01-09 2005-05-10 Bridge Semiconductor Corporation Semiconductor package device
US6987034B1 (en) 2002-01-09 2006-01-17 Bridge Semiconductor Corporation Method of making a semiconductor package device that includes singulating and trimming a lead
US7375415B2 (en) * 2005-06-30 2008-05-20 Sandisk Corporation Die package with asymmetric leadframe connection
JP4634498B2 (ja) * 2008-11-28 2011-02-16 三菱電機株式会社 電力用半導体モジュール
CN104009008A (zh) 2013-02-27 2014-08-27 飞思卡尔半导体公司 具有集成散热器的半导体器件
CN104576565A (zh) 2013-10-18 2015-04-29 飞思卡尔半导体公司 具有散热体的半导体器件及其组装方法
US9385060B1 (en) 2014-07-25 2016-07-05 Altera Corporation Integrated circuit package with enhanced thermal conduction
US9355945B1 (en) 2015-09-02 2016-05-31 Freescale Semiconductor, Inc. Semiconductor device with heat-dissipating lead frame
JP6929788B2 (ja) * 2015-12-04 2021-09-01 ローム株式会社 パワーモジュール装置、および電気自動車またはハイブリッドカー
JP7169771B2 (ja) * 2018-05-25 2022-11-11 Koa株式会社 抵抗器

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3444309A (en) * 1967-12-26 1969-05-13 Motorola Inc Unitized assembly plastic encapsulation providing outwardly facing nonplastic surfaces
NL6903229A (ja) * 1969-03-01 1970-09-03
FR2116353B1 (ja) * 1970-10-19 1976-04-16 Ates Componenti Elettron
US3729573A (en) * 1971-01-25 1973-04-24 Motorola Inc Plastic encapsulation of semiconductor devices
US3767839A (en) * 1971-06-04 1973-10-23 Wells Plastics Of California I Plastic micro-electronic packages
US3839660A (en) * 1973-02-05 1974-10-01 Gen Motors Corp Power semiconductor device package

Also Published As

Publication number Publication date
GB1538556A (en) 1979-01-24
JPS51114068A (en) 1976-10-07
BR7601510A (pt) 1976-09-14
US3930114A (en) 1975-12-30
CA1040747A (en) 1978-10-17
FR2305026A1 (fr) 1976-10-15
FR2305026B1 (ja) 1982-04-30
DE2611531A1 (de) 1976-09-30

Similar Documents

Publication Publication Date Title
JPS5842624B2 (ja) シンキナホウネツコウゾウタイオシヨウシタ シユウセキカイロパツケ−ジ
JP2547449B2 (ja) 合成樹脂被覆ピングリッドアレイパワーパッケイジ
US5065281A (en) Molded integrated circuit package incorporating heat sink
TW319905B (ja)
KR100214549B1 (ko) 버텀리드 반도체 패키지
KR960019689A (ko) 다운세트된 노출 다이 장착 패드 리드프레임 및 패키지
WO1993006621A1 (en) Exposed die-attach heatsink package
TW447096B (en) Semiconductor packaging with exposed die
KR960026690A (ko) 반도체 패키지
US5489805A (en) Slotted thermal dissipater for a semiconductor package
US6639306B2 (en) Semiconductor package having a die pad with downward-extended tabs
JP2857648B2 (ja) 電子部品の製造方法
JP2770947B2 (ja) 樹脂封止型半導体装置及びその製造方法
JPH0263142A (ja) モールド・パッケージおよびその製造方法
JP2005191147A (ja) 混成集積回路装置の製造方法
JPH03222464A (ja) 半導体装置及びその製造方法
KR960702678A (ko) 모울드된 리드프레임 및 그 제조방법(a molded lead frame and method of making same)
JPS6329413B2 (ja)
JPH0419805Y2 (ja)
KR0124827Y1 (ko) 기판실장형 반도체 패키지
KR100597762B1 (ko) 반도체 패키지
KR0132405Y1 (ko) 반도체 패키지
JPS62224049A (ja) 電子装置
JPH03263862A (ja) 電子部品の冷却装置
JPS6332956A (ja) パツケ−ジ