JPS5768033A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPS5768033A JPS5768033A JP14362280A JP14362280A JPS5768033A JP S5768033 A JPS5768033 A JP S5768033A JP 14362280 A JP14362280 A JP 14362280A JP 14362280 A JP14362280 A JP 14362280A JP S5768033 A JPS5768033 A JP S5768033A
- Authority
- JP
- Japan
- Prior art keywords
- film
- substrate
- oxidiation
- approx
- thick
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/76202—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO
- H01L21/76205—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO in a region being recessed from the surface, e.g. in a recess, groove, tub or trench region
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Drying Of Semiconductors (AREA)
- Weting (AREA)
Abstract
PURPOSE:To completely remove a damaged layer produced by ion etching by carrying out a reactive ion etching on the surface of a semiconductor substrate, and then oxidizing or wet etching at least more than 100Angstrom on the surface. CONSTITUTION:An SiO2 film 2 of approx. 100Angstrom thick and an Si3N4 film 3 of approx. 1,000Angstrom thick are laminated on an Si substrate 1, a resist mask 4 is covered on an element forming region, is etched with reactive ions to remove the expose film 3 and then the film 3, and the field region of the substrate is exposed. Then, the surface of the exposed region 5 is removed at least in the amount of more than 100Angstrom by wet etching with aqueous alkaline solution or low temperature oxidiation including steam under higher than 9 atms at lower than 700Angstrom , or anodic oxidiation, thereby removing the damaged layer, and a field oxidized film 6 is formed thereon. In this manner, the corner 3'' of the remaining film 3 almost becomes vertical, and the length of bird beak introduced between the films 2 and 3 at the end of the film 5 constructed therewith can be extremely reduced.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14362280A JPS5768033A (en) | 1980-10-16 | 1980-10-16 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14362280A JPS5768033A (en) | 1980-10-16 | 1980-10-16 | Manufacture of semiconductor device |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5768033A true JPS5768033A (en) | 1982-04-26 |
JPH0133933B2 JPH0133933B2 (en) | 1989-07-17 |
Family
ID=15343027
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP14362280A Granted JPS5768033A (en) | 1980-10-16 | 1980-10-16 | Manufacture of semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5768033A (en) |
Cited By (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS59110119A (en) * | 1982-12-15 | 1984-06-26 | Nec Corp | Surface processing for semiconductor layer |
JPS61270831A (en) * | 1985-05-24 | 1986-12-01 | Nec Corp | Si surface processing method after removal of sio2 film by dry etching |
JPS61281523A (en) * | 1985-06-07 | 1986-12-11 | Nippon Gakki Seizo Kk | Formation of contact |
JPS6294937A (en) * | 1985-10-21 | 1987-05-01 | Nec Corp | Manufacture of semiconductor integrated circuit device |
JPS62133760A (en) * | 1985-12-02 | 1987-06-16 | インタ−ナショナル ビジネス マシ−ンズ コ−ポレ−ション | Manufacture of bipolar transistor |
JPS63224329A (en) * | 1987-03-13 | 1988-09-19 | Fuji Electric Co Ltd | Manufacture of semiconductor element |
JPH02148833A (en) * | 1988-11-30 | 1990-06-07 | Toshiba Corp | Selective vapor growth method |
JPH02295131A (en) * | 1989-05-09 | 1990-12-06 | Nec Corp | Manufacture of mos transistor |
US5065218A (en) * | 1988-06-28 | 1991-11-12 | Mitsubishi Denki Kabushiki Kaisha | Locos type field isolating film and semiconductor memory device formed therewith |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS54124683A (en) * | 1978-03-20 | 1979-09-27 | Nippon Telegr & Teleph Corp <Ntt> | Processing method of silicon wafer |
JPS56123377A (en) * | 1980-03-03 | 1981-09-28 | Shunpei Yamazaki | Plasma cleaning and etching method |
JPS56129326A (en) * | 1980-03-15 | 1981-10-09 | Semiconductor Res Found | Dry etching |
JPS56144544A (en) * | 1980-04-14 | 1981-11-10 | Toshiba Corp | Manufacture of semiconductor device |
JPS5724540A (en) * | 1980-07-19 | 1982-02-09 | Nippon Telegr & Teleph Corp <Ntt> | Rinsing of through hole in semiconductor device |
-
1980
- 1980-10-16 JP JP14362280A patent/JPS5768033A/en active Granted
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS54124683A (en) * | 1978-03-20 | 1979-09-27 | Nippon Telegr & Teleph Corp <Ntt> | Processing method of silicon wafer |
JPS56123377A (en) * | 1980-03-03 | 1981-09-28 | Shunpei Yamazaki | Plasma cleaning and etching method |
JPS56129326A (en) * | 1980-03-15 | 1981-10-09 | Semiconductor Res Found | Dry etching |
JPS56144544A (en) * | 1980-04-14 | 1981-11-10 | Toshiba Corp | Manufacture of semiconductor device |
JPS5724540A (en) * | 1980-07-19 | 1982-02-09 | Nippon Telegr & Teleph Corp <Ntt> | Rinsing of through hole in semiconductor device |
Cited By (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS59110119A (en) * | 1982-12-15 | 1984-06-26 | Nec Corp | Surface processing for semiconductor layer |
JPS61270831A (en) * | 1985-05-24 | 1986-12-01 | Nec Corp | Si surface processing method after removal of sio2 film by dry etching |
JPS61281523A (en) * | 1985-06-07 | 1986-12-11 | Nippon Gakki Seizo Kk | Formation of contact |
JPS6294937A (en) * | 1985-10-21 | 1987-05-01 | Nec Corp | Manufacture of semiconductor integrated circuit device |
JPS62133760A (en) * | 1985-12-02 | 1987-06-16 | インタ−ナショナル ビジネス マシ−ンズ コ−ポレ−ション | Manufacture of bipolar transistor |
JPS63224329A (en) * | 1987-03-13 | 1988-09-19 | Fuji Electric Co Ltd | Manufacture of semiconductor element |
US5065218A (en) * | 1988-06-28 | 1991-11-12 | Mitsubishi Denki Kabushiki Kaisha | Locos type field isolating film and semiconductor memory device formed therewith |
JPH02148833A (en) * | 1988-11-30 | 1990-06-07 | Toshiba Corp | Selective vapor growth method |
JPH02295131A (en) * | 1989-05-09 | 1990-12-06 | Nec Corp | Manufacture of mos transistor |
Also Published As
Publication number | Publication date |
---|---|
JPH0133933B2 (en) | 1989-07-17 |
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