JPS5678121A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS5678121A
JPS5678121A JP15459579A JP15459579A JPS5678121A JP S5678121 A JPS5678121 A JP S5678121A JP 15459579 A JP15459579 A JP 15459579A JP 15459579 A JP15459579 A JP 15459579A JP S5678121 A JPS5678121 A JP S5678121A
Authority
JP
Japan
Prior art keywords
substrate
characteristic
elevate
polycrystalline
piled
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15459579A
Other languages
Japanese (ja)
Inventor
Shoichi Kitane
Shigeru Honjo
Kenji Azetsubo
Fumio Tobioka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP15459579A priority Critical patent/JPS5678121A/en
Publication of JPS5678121A publication Critical patent/JPS5678121A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Bipolar Transistors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

PURPOSE:To improve the forward and reverse directional characteristic of a semiconductor device and to elevate the reliability by a method wherein dual structural electrodes consisting of doped polycrystalline Si and Al are provided on a semiconductor substrate. CONSTITUTION:After openings 13 are formed in an oxide film on the surface of an N type Si substrate 10 being formed a diffusion layer according with a prescribed method, polycrystalline Si 15 being added with B is piled up and is annealed in H2 gas. When the concentration of B made to be 1X10<16>/cm<3> or more, the contact resistance with the substrate 10 is reduced to elevate the forward characteristic. Then Al 16 is piled up. The Al 16, the polycrystalline Si 15 are etched selectively to form electrodes 17, and an electrode 18 is equipped at the back face of the substrate. By this constitution, the reaction of the Al 16 and Si in the SiO2 13 during the annealing can be prevented, and the deterioration of withstand voltage can be prevented to elevate the reverse characteristic. By this way, a device having a favorable characteristic can be obtained.
JP15459579A 1979-11-29 1979-11-29 Manufacture of semiconductor device Pending JPS5678121A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15459579A JPS5678121A (en) 1979-11-29 1979-11-29 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15459579A JPS5678121A (en) 1979-11-29 1979-11-29 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS5678121A true JPS5678121A (en) 1981-06-26

Family

ID=15587614

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15459579A Pending JPS5678121A (en) 1979-11-29 1979-11-29 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS5678121A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6411365A (en) * 1987-07-03 1989-01-13 Nippon Telegraph & Telephone Semiconductor device and manufacture thereof

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50140059A (en) * 1974-04-26 1975-11-10
JPS51103769A (en) * 1975-03-10 1976-09-13 Fujitsu Ltd Handotaisochino seizohoho
JPS51116675A (en) * 1975-04-05 1976-10-14 Fujitsu Ltd Manufacturing method for a semiconductor device
JPS54145488A (en) * 1979-03-01 1979-11-13 Toshiba Corp Semiconductor device

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50140059A (en) * 1974-04-26 1975-11-10
JPS51103769A (en) * 1975-03-10 1976-09-13 Fujitsu Ltd Handotaisochino seizohoho
JPS51116675A (en) * 1975-04-05 1976-10-14 Fujitsu Ltd Manufacturing method for a semiconductor device
JPS54145488A (en) * 1979-03-01 1979-11-13 Toshiba Corp Semiconductor device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6411365A (en) * 1987-07-03 1989-01-13 Nippon Telegraph & Telephone Semiconductor device and manufacture thereof

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