JPS57111059A - Memory cell and manufacture thereof - Google Patents

Memory cell and manufacture thereof

Info

Publication number
JPS57111059A
JPS57111059A JP55186907A JP18690780A JPS57111059A JP S57111059 A JPS57111059 A JP S57111059A JP 55186907 A JP55186907 A JP 55186907A JP 18690780 A JP18690780 A JP 18690780A JP S57111059 A JPS57111059 A JP S57111059A
Authority
JP
Japan
Prior art keywords
dielectric film
high concentration
impurities
substrate
electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP55186907A
Other languages
Japanese (ja)
Inventor
Masao Taguchi
Nobuo Toyokura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP55186907A priority Critical patent/JPS57111059A/en
Publication of JPS57111059A publication Critical patent/JPS57111059A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells

Landscapes

  • Semiconductor Memories (AREA)

Abstract

PURPOSE:To enable to form a reversely conductive type high concentration impurity region of a memory cell without discrepancy of position by a method wherein impurities contained in a dielectric film of the capacitor part are made to diffuse in a substrate by the thermal treatment after a capacitor electrode is formed. CONSTITUTION:The dielectric film 7 being mixed with impurities and a polycrystalline Si layer 1 to constitute the capacitor electrode are adhered selectively on the whole surface of the P type substrate 4 having field oxide films 5. The surface thereof is oxidized to form a gate dielectric film 8 of transfer MOSFET, and a gate electrode 2 is adhered. After patterning of the dielectric film 7 is performed, the high concentration impurities adder region 6 of the capacitor part is formed by thermal diffusion of impurities contained therein to the substrate. Accordingly the electrode region can be formed accurately in high concentration without discrepancy of positions.
JP55186907A 1980-12-26 1980-12-26 Memory cell and manufacture thereof Pending JPS57111059A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55186907A JPS57111059A (en) 1980-12-26 1980-12-26 Memory cell and manufacture thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55186907A JPS57111059A (en) 1980-12-26 1980-12-26 Memory cell and manufacture thereof

Publications (1)

Publication Number Publication Date
JPS57111059A true JPS57111059A (en) 1982-07-10

Family

ID=16196763

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55186907A Pending JPS57111059A (en) 1980-12-26 1980-12-26 Memory cell and manufacture thereof

Country Status (1)

Country Link
JP (1) JPS57111059A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006262644A (en) * 2005-03-17 2006-09-28 Mitsubishi Electric Corp Alternator

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006262644A (en) * 2005-03-17 2006-09-28 Mitsubishi Electric Corp Alternator

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