JPS5563839A - Manufacture of semiconductor integrated circuit - Google Patents
Manufacture of semiconductor integrated circuitInfo
- Publication number
- JPS5563839A JPS5563839A JP13732478A JP13732478A JPS5563839A JP S5563839 A JPS5563839 A JP S5563839A JP 13732478 A JP13732478 A JP 13732478A JP 13732478 A JP13732478 A JP 13732478A JP S5563839 A JPS5563839 A JP S5563839A
- Authority
- JP
- Japan
- Prior art keywords
- epitaxial layer
- bipolar transistor
- layer
- coexistence
- polymerized
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000004519 manufacturing process Methods 0.000 title 1
- 239000004065 semiconductor Substances 0.000 title 1
- 238000005530 etching Methods 0.000 abstract 3
- 230000003321 amplification Effects 0.000 abstract 2
- 238000003199 nucleic acid amplification method Methods 0.000 abstract 2
- 239000013078 crystal Substances 0.000 abstract 1
- 239000007788 liquid Substances 0.000 abstract 1
- 238000000034 method Methods 0.000 abstract 1
- 239000000758 substrate Substances 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/0203—Particular design considerations for integrated circuits
- H01L27/0214—Particular design considerations for integrated circuits for internal polarisation, e.g. I2L
- H01L27/0229—Particular design considerations for integrated circuits for internal polarisation, e.g. I2L of bipolar structures
- H01L27/0233—Integrated injection logic structures [I2L]
- H01L27/0244—I2L structures integrated in combination with analog structures
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Element Separation (AREA)
- Bipolar Integrated Circuits (AREA)
- Logic Circuits (AREA)
Abstract
PURPOSE:To enable the coexistence of a bipolar transistor and a I<2>L by providing a step on the surface of an epitaxial layer and etching it, thereby improving a current amplification factor. CONSTITUTION:An epitaxial layer 2 is grown on a p-type substrate 1 through an n<+> embedded layer 4, and after forming a pattern of oxide film 12, it is again subjected to epitaxial growth. The growth on the oxide film 12 is turned into a poly crystal Si 14 (a). And then, a layer 14 polymerized with a HF family etching liquid is selectively etched. Since the etching rate in the polymerized Si is fast, a stap is formed during this process (b). After forming a I<2>L on the thinner portion of the epitaxial layer as well as a conventional bipolar transistor on the thick portion thereof (c), electrodes 13 are provided (d). Like these, the thickness of the epitaxial layer of I<2>L can be made thinner and arbitrarily selected, so that the current amplification factor of I<2>L can be greatly improved on one hand, and the high dielectric strength of the bipolar transistor can be maintained on the other hand. Thus, the coexistence of two elements can be allowed.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP13732478A JPS5563839A (en) | 1978-11-09 | 1978-11-09 | Manufacture of semiconductor integrated circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP13732478A JPS5563839A (en) | 1978-11-09 | 1978-11-09 | Manufacture of semiconductor integrated circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5563839A true JPS5563839A (en) | 1980-05-14 |
Family
ID=15196006
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP13732478A Pending JPS5563839A (en) | 1978-11-09 | 1978-11-09 | Manufacture of semiconductor integrated circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5563839A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4882294A (en) * | 1988-08-17 | 1989-11-21 | Delco Electronics Corporation | Process for forming an epitaxial layer having portions of different thicknesses |
-
1978
- 1978-11-09 JP JP13732478A patent/JPS5563839A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4882294A (en) * | 1988-08-17 | 1989-11-21 | Delco Electronics Corporation | Process for forming an epitaxial layer having portions of different thicknesses |
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