GB1494328A - Process for thinning silicon with special application to producing silicon on insulator - Google Patents

Process for thinning silicon with special application to producing silicon on insulator

Info

Publication number
GB1494328A
GB1494328A GB5246774A GB5246774A GB1494328A GB 1494328 A GB1494328 A GB 1494328A GB 5246774 A GB5246774 A GB 5246774A GB 5246774 A GB5246774 A GB 5246774A GB 1494328 A GB1494328 A GB 1494328A
Authority
GB
United Kingdom
Prior art keywords
layer
forming
silicon
etching
dec
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB5246774A
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Texas Instruments Inc
Original Assignee
Texas Instruments Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Texas Instruments Inc filed Critical Texas Instruments Inc
Publication of GB1494328A publication Critical patent/GB1494328A/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76297—Dielectric isolation using EPIC techniques, i.e. epitaxial passivated integrated circuit
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/30604—Chemical etching

Landscapes

  • Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • General Chemical & Material Sciences (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Element Separation (AREA)
  • Weting (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Bipolar Transistors (AREA)

Abstract

1494328 Integrated circuit manufacture TEXAS INSTRUMENTS Inc 4 Dec 1974 [28 Dec 1973] 52467/74 Heading H1K An integrated circuit structure is made from a preferably (100) orientated silicon wafer comprising a first layer, 21, in Fig. 2c, of one conductivity type and a second e.g. epitaxial layer 23 of the opposite type of at least ten times the resistivity of the first layer by the steps of forming an oxide layer 25 over the second layer and forming apertures in it so dimensioned that when next treated in an orientation dependent etch etching stops above or at the junction with the first layer, covering the etched surface with an oxide layer 29, forming a layer 31 of polycrystalline silicon over the oxide layers, etching the first layer away using a mixture of 1 part by weight HF, 3 parts HNO 3 and 8 to 12 parts acetic acid, and then forming device structures in the surface of the second layer thus exposed. To prevent etching of the second layer by the above solution its doping is selected to be less than 1À5 x 10<SP>19</SP> or 7 x 10<SP>18</SP> atoms/c.c. according to whether it is of P or N type.
GB5246774A 1973-12-28 1974-12-04 Process for thinning silicon with special application to producing silicon on insulator Expired GB1494328A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US42922873A 1973-12-28 1973-12-28

Publications (1)

Publication Number Publication Date
GB1494328A true GB1494328A (en) 1977-12-07

Family

ID=23702356

Family Applications (1)

Application Number Title Priority Date Filing Date
GB5246774A Expired GB1494328A (en) 1973-12-28 1974-12-04 Process for thinning silicon with special application to producing silicon on insulator

Country Status (4)

Country Link
JP (1) JPS5828731B2 (en)
DE (1) DE2460653C2 (en)
FR (1) FR2256537B1 (en)
GB (1) GB1494328A (en)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54110783A (en) * 1978-02-20 1979-08-30 Hitachi Ltd Semiconductor substrate and its manufacture
DE3300400A1 (en) 1982-01-06 1983-07-14 Canon K.K., Tokyo SEMICONDUCTOR COMPONENT
JPS6066825A (en) * 1983-09-22 1985-04-17 Toshiba Corp Manufacture of semiconductor device
US5416354A (en) * 1989-01-06 1995-05-16 Unitrode Corporation Inverted epitaxial process semiconductor devices
DE3922671A1 (en) * 1989-07-10 1991-01-24 Siemens Ag Acousto-electronic device with surface wave arrangement - and IC on support, with layer structure with semiconductor crystal layer on another part of support

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4936792B1 (en) * 1970-10-15 1974-10-03

Also Published As

Publication number Publication date
JPS5099272A (en) 1975-08-06
DE2460653A1 (en) 1975-07-10
FR2256537B1 (en) 1979-03-16
JPS5828731B2 (en) 1983-06-17
FR2256537A1 (en) 1975-07-25
DE2460653C2 (en) 1986-02-06

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Legal Events

Date Code Title Description
PS Patent sealed
PE20 Patent expired after termination of 20 years

Effective date: 19941203