JPS5533051A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPS5533051A JPS5533051A JP10521178A JP10521178A JPS5533051A JP S5533051 A JPS5533051 A JP S5533051A JP 10521178 A JP10521178 A JP 10521178A JP 10521178 A JP10521178 A JP 10521178A JP S5533051 A JPS5533051 A JP S5533051A
- Authority
- JP
- Japan
- Prior art keywords
- layer
- type
- opening
- mask
- substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Bipolar Transistors (AREA)
- Weting (AREA)
- Junction Field-Effect Transistors (AREA)
Abstract
PURPOSE: To place the edge of a diffused layer as near to a semiconductor layer as possible, by producing the diffused layer in the opening of a buride insulating layer by self-alignment so that the diffeused layer is used as an emitter or gate.
CONSTITUTION: An SiO2 layer 2, which is used as the buried insulating layer, a P+-type polycrystalline silicon layer 3, another SiO2 layer 4 and an Si3N4 layer 9 are sequentially produced on an N-type silicon substrate 1. A photoresist film 10 having an opening 10a is coated on the layer 9. The film 10 is used as a mask to sequentially and partly remove the layers 9, 4, 32 by photoetching to expose the surface of the substrate 1. At that time, the opening of each layer is made larger than that of the resist 10 because of a side etching effect. The layer 9 is then used as mask to implant impurity ions to make an N+-type region 7. A P--type layer is epitaxially grown on the surface of the substrate 1. At that time, a P+-type layer 8 is produced near the opening of the layer 3. The layer 9 is thereafter used as a mask to produce an N-type region 6 by self-alignment. As a result, the region 6 and the layer 8 are located greatly near each other.
COPYRIGHT: (C)1980,JPO&Japio
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP10521178A JPS5533051A (en) | 1978-08-29 | 1978-08-29 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP10521178A JPS5533051A (en) | 1978-08-29 | 1978-08-29 | Manufacture of semiconductor device |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5533051A true JPS5533051A (en) | 1980-03-08 |
JPS6122866B2 JPS6122866B2 (en) | 1986-06-03 |
Family
ID=14401321
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP10521178A Granted JPS5533051A (en) | 1978-08-29 | 1978-08-29 | Manufacture of semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5533051A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5893373A (en) * | 1981-11-30 | 1983-06-03 | Nec Corp | Semiconductor device and manufacture thereof |
JPS594165A (en) * | 1982-06-30 | 1984-01-10 | Fujitsu Ltd | Semiconductor device |
JPS59161867A (en) * | 1983-03-07 | 1984-09-12 | Hitachi Ltd | Semiconductor device |
-
1978
- 1978-08-29 JP JP10521178A patent/JPS5533051A/en active Granted
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5893373A (en) * | 1981-11-30 | 1983-06-03 | Nec Corp | Semiconductor device and manufacture thereof |
JPS594165A (en) * | 1982-06-30 | 1984-01-10 | Fujitsu Ltd | Semiconductor device |
JPS59161867A (en) * | 1983-03-07 | 1984-09-12 | Hitachi Ltd | Semiconductor device |
Also Published As
Publication number | Publication date |
---|---|
JPS6122866B2 (en) | 1986-06-03 |
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