JPS54132177A - Semiconductor device and its manufacture - Google Patents

Semiconductor device and its manufacture

Info

Publication number
JPS54132177A
JPS54132177A JP4074678A JP4074678A JPS54132177A JP S54132177 A JPS54132177 A JP S54132177A JP 4074678 A JP4074678 A JP 4074678A JP 4074678 A JP4074678 A JP 4074678A JP S54132177 A JPS54132177 A JP S54132177A
Authority
JP
Japan
Prior art keywords
film
groove
region
type
epitaxial layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4074678A
Other languages
Japanese (ja)
Inventor
Masaru Nakamura
Hidefumi Tomiki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP4074678A priority Critical patent/JPS54132177A/en
Publication of JPS54132177A publication Critical patent/JPS54132177A/en
Pending legal-status Critical Current

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  • Element Separation (AREA)

Abstract

PURPOSE: To secure an assured isolation for the semiconductor device containing the thick epitaxial layer by forming the groove and then burying the organic resin insulator into the groove when forming the inter-element isolation layer reaching the semiconductor substrate containing the epitaxial layer.
CONSTITUTION: P-type base region 3 and collector region 5 are formed by diffusion within layer 2 of P-type Si substrate 1 containing N-type epitaxial layer 2, and N-type emitter region 4 is provided within region 3. The entire surface is covered with SiO2 film 6 with the opening drilled to insulator isolation region 8, and then groove 9 reaching substrate 1 is formed through etching with photo resist film 7 used as the mask. After this, film 7 is removed to grow SiO2 film 6' to the inner wall of groove 9 through the heat treatment. And the entire surface is covered with resist film 7' again, and then the optical polymerization is applied to film 7' with matching of the mask pattern to change film 7' into the high-molecular structure. After this, film 7' is removed except for groove 9, and the high-molecular structure is baked to convert it into hard film 10. And resist film pattern 11 is provided on the surface with Al wiring 15 coated to each region.
COPYRIGHT: (C)1979,JPO&Japio
JP4074678A 1978-04-05 1978-04-05 Semiconductor device and its manufacture Pending JPS54132177A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4074678A JPS54132177A (en) 1978-04-05 1978-04-05 Semiconductor device and its manufacture

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4074678A JPS54132177A (en) 1978-04-05 1978-04-05 Semiconductor device and its manufacture

Publications (1)

Publication Number Publication Date
JPS54132177A true JPS54132177A (en) 1979-10-13

Family

ID=12589188

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4074678A Pending JPS54132177A (en) 1978-04-05 1978-04-05 Semiconductor device and its manufacture

Country Status (1)

Country Link
JP (1) JPS54132177A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57128944A (en) * 1981-02-03 1982-08-10 Nec Corp Maufacture of semiconductor device
JPH06334031A (en) * 1993-05-25 1994-12-02 Nec Corp Element-isolation method for semiconductor device

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57128944A (en) * 1981-02-03 1982-08-10 Nec Corp Maufacture of semiconductor device
JPS6217863B2 (en) * 1981-02-03 1987-04-20 Nippon Electric Co
JPH06334031A (en) * 1993-05-25 1994-12-02 Nec Corp Element-isolation method for semiconductor device

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