JPS6457641A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPS6457641A JPS6457641A JP21292487A JP21292487A JPS6457641A JP S6457641 A JPS6457641 A JP S6457641A JP 21292487 A JP21292487 A JP 21292487A JP 21292487 A JP21292487 A JP 21292487A JP S6457641 A JPS6457641 A JP S6457641A
- Authority
- JP
- Japan
- Prior art keywords
- trench
- sidewall
- epitaxial growth
- oxide film
- fill
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Element Separation (AREA)
Abstract
PURPOSE:To obtain a manufacturing method excellent in miniaturizing an isolation region, by forming a trench having a sidewall almost vertical to a semiconductor substrate, forming a thin film for isolation on the sidewall, and performing selective epitaxial growth so as to fill the trench. CONSTITUTION:A trench 104 having an almost vertical sidewall is formed in the selected region of a semiconductor substrate 101, and a thin film 105a for element isolation is selectively formed on the sidewall of the trench 104. Then epitaxial growth is selectively performed on the semiconductor 101 surface exposed on the bottom surface of the trench 104 to fill the trench 104. For example, an oxide film is formed on the whole surface of a silicon substrate 101, and an oxide film pattern 103 is formed. By anisotropic etching, a trench 104 whose sidewall is almost vertical is formed, and an oxide film 105 is formed in the inner wall of the trench 104 by thermal oxidizing. The oxide film 105 on the bottom surface of the trench 104 is selectively eliminated, and selective epitaxial growth for the silicon substrate 101 surface exposed in the bottom of the trench 104 is performed to fill the trench 104 with an epitaxial growth silicon layer 206.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP21292487A JPS6457641A (en) | 1987-08-28 | 1987-08-28 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP21292487A JPS6457641A (en) | 1987-08-28 | 1987-08-28 | Manufacture of semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6457641A true JPS6457641A (en) | 1989-03-03 |
Family
ID=16630541
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP21292487A Pending JPS6457641A (en) | 1987-08-28 | 1987-08-28 | Manufacture of semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6457641A (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5712199A (en) * | 1990-10-16 | 1998-01-27 | Canon Kabushiki Kaisha | Method for making semiconductor body and photovoltaic device |
| JP2008227278A (en) * | 2007-03-14 | 2008-09-25 | Nec Electronics Corp | Semiconductor device and its manufacturing method |
| JP2010045335A (en) * | 2008-06-30 | 2010-02-25 | Infineon Technologies Austria Ag | Method for producing material layer in semiconductor body |
| US8319261B2 (en) | 2008-09-30 | 2012-11-27 | Infineon Technologies Austria Ag | Semiconductor component structure with vertical dielectric layers |
-
1987
- 1987-08-28 JP JP21292487A patent/JPS6457641A/en active Pending
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5712199A (en) * | 1990-10-16 | 1998-01-27 | Canon Kabushiki Kaisha | Method for making semiconductor body and photovoltaic device |
| JP2008227278A (en) * | 2007-03-14 | 2008-09-25 | Nec Electronics Corp | Semiconductor device and its manufacturing method |
| JP2010045335A (en) * | 2008-06-30 | 2010-02-25 | Infineon Technologies Austria Ag | Method for producing material layer in semiconductor body |
| US8319261B2 (en) | 2008-09-30 | 2012-11-27 | Infineon Technologies Austria Ag | Semiconductor component structure with vertical dielectric layers |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| EP0004298B1 (en) | Method of fabricating isolation of and contact to burried layers of semiconductor structures | |
| US4056413A (en) | Etching method for flattening a silicon substrate utilizing an anisotropic alkali etchant | |
| IE833068L (en) | Producing a semiconductor device having isolation regions¹between elements | |
| KR880014691A (en) | Manufacturing Method of Semiconductor Device | |
| JPS6451650A (en) | Method of forming dish region in highn density cmos circuit | |
| US4389294A (en) | Method for avoiding residue on a vertical walled mesa | |
| EP0029552A3 (en) | Method for producing a semiconductor device | |
| JPS6457641A (en) | Manufacture of semiconductor device | |
| JPS6450439A (en) | Manufacture of semiconductor device | |
| EP0078890A3 (en) | Method of fabrication of dielectrically isolated cmos device with an isolated slot | |
| EP0239384A3 (en) | Process for isolating semiconductor devices on a substrate | |
| JPS56157044A (en) | Insulating isolation of semiconductor element | |
| JPS57204144A (en) | Insulating and isolating method for semiconductor integrated circuit | |
| JPS5420678A (en) | Production of silicon monocrystaline island regions | |
| JPS6428962A (en) | Semiconductor device and manufacture thereof | |
| JPS57157540A (en) | Semiconductor device | |
| JPS54153583A (en) | Semiconductor device | |
| JPS57211747A (en) | Manufacture of semiconductor device | |
| JPS57100733A (en) | Etching method for semiconductor substrate | |
| JPS5783042A (en) | Manufacture of semiconductor device | |
| JPS6482668A (en) | Manufacture of bipolar transistor | |
| JPS5577134A (en) | Formation of fine pattern | |
| JPS57106048A (en) | Manufacture of semiconductor device | |
| JPS6421940A (en) | Manufacture of semiconductor device | |
| JPS6415974A (en) | Semiconductor device |