JPS5669833A - Fine processing method of thin film - Google Patents

Fine processing method of thin film

Info

Publication number
JPS5669833A
JPS5669833A JP14516079A JP14516079A JPS5669833A JP S5669833 A JPS5669833 A JP S5669833A JP 14516079 A JP14516079 A JP 14516079A JP 14516079 A JP14516079 A JP 14516079A JP S5669833 A JPS5669833 A JP S5669833A
Authority
JP
Japan
Prior art keywords
film
separating space
fine separating
fine
semiconductor substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP14516079A
Other languages
Japanese (ja)
Other versions
JPS5719571B2 (en
Inventor
Masakazu Shiozaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP14516079A priority Critical patent/JPS5669833A/en
Publication of JPS5669833A publication Critical patent/JPS5669833A/en
Publication of JPS5719571B2 publication Critical patent/JPS5719571B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Drying Of Semiconductors (AREA)
  • Weting (AREA)

Abstract

PURPOSE:To obtain precise and fine separating space, in the case a polycrystalline Si film used for wiring layers and the like are formed on a semiconductor substrate and the film is separated by the fine separating space, by performing etching using a metal mask having a steep step depending on the fine separating space. CONSTITUTION:The polycrystalline layer 2 to be etched used for the wiring layers and the like is deposited on the semiconductor substrate 1. An SiO2 film 3 is formed so that the film reaches the position where the fine separating space is to be provided. Then, an Al film 6 is evaporated on all the surface in a vacuum, a step 5 is provided at the end surface of the film 3. The Al film 6a at the stepped part is roughened at a lower density. The etching speed in this place is several times- several tens times faster than the speed at the other part of the film 6. Then, the product is immersed in the etchant whose main components are phosphoric acid and nitric acid, the Al film 6a is removed, thereby an Al film pattern 7 with fine separating space is obtained. With this as a mask, the Si film 2 which is the groundwork is etched, and divided by the separation of 0.5-1.0mum. The unnecessary pattern is removed.
JP14516079A 1979-11-09 1979-11-09 Fine processing method of thin film Granted JPS5669833A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14516079A JPS5669833A (en) 1979-11-09 1979-11-09 Fine processing method of thin film

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14516079A JPS5669833A (en) 1979-11-09 1979-11-09 Fine processing method of thin film

Publications (2)

Publication Number Publication Date
JPS5669833A true JPS5669833A (en) 1981-06-11
JPS5719571B2 JPS5719571B2 (en) 1982-04-23

Family

ID=15378807

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14516079A Granted JPS5669833A (en) 1979-11-09 1979-11-09 Fine processing method of thin film

Country Status (1)

Country Link
JP (1) JPS5669833A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5893343A (en) * 1981-11-30 1983-06-03 Toshiba Corp Forming method for isolation region of semiconductor integrated circuit
JPS5952848A (en) * 1982-09-20 1984-03-27 Mitsubishi Electric Corp Manufacture of semiconductor device
JPS5978542A (en) * 1982-10-27 1984-05-07 Nippon Telegr & Teleph Corp <Ntt> Manufacture of semiconductor device

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6211241U (en) * 1985-07-02 1987-01-23

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5893343A (en) * 1981-11-30 1983-06-03 Toshiba Corp Forming method for isolation region of semiconductor integrated circuit
JPS5952848A (en) * 1982-09-20 1984-03-27 Mitsubishi Electric Corp Manufacture of semiconductor device
JPS5978542A (en) * 1982-10-27 1984-05-07 Nippon Telegr & Teleph Corp <Ntt> Manufacture of semiconductor device
JPH0586659B2 (en) * 1982-10-27 1993-12-13 Nippon Telegraph & Telephone

Also Published As

Publication number Publication date
JPS5719571B2 (en) 1982-04-23

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